HT48E06

8-Bit I/O Type MCU (With EEPROM)

Block Diagram

Rev. 0.00

January 12, 2004

General Description

The HT48E06 is an 8-bit high performance, RISC archi-
tecture microcontroller device specifically designed for
multiple I/O control product applications.

The advantages of low power consumption, I/O flexibil-
ity, timer functions, oscillator options, HALT and

wake-up functions, watchdog timer, buzzer driver, as
well as low cost, enhance the versatility of these devices
to suit a wide range of application possibilities such as
industrial control, consumer products, subsystem con-
trollers, etc.

Features

Operating voltage:
f

SYS

=4MHz: 2.2V~5.5V

SYS

=8MHz: 3.3V~5.5V

Low voltage reset function

13 bidirectional I/O lines (max.)

Interrupt input shared with an I/O line

8-bit programmable timer/event counter with overflow
interrupt and 8-stage prescaler

On-chip crystal and RC oscillator

Watchdog Timer

1024

´14 program memory ROM (MTP)

128

´8 data memory EEPROM

´8 data memory RAM

Buzzer driving pair and PFD supported

HALT function and wake-up feature reduce power
consumption

Two-level subroutine nesting

Up to 0.5

ms instruction cycle with 8MHz system clock

at V

=5V

Bit manipulation instruction

14-bit table read instruction

63 powerful instructions

erase/write cycles EEPROM data memory

EEPROM data retention > 10 years

All instructions in one or two machine cycles

In system programming (ISP)

16-pin SSOP package
18-pin DIP/SOP package

I N T / P C 0

O S C 2

O S C 1

R E S

V D D

M U X

P A C

P A

P O R T A

P A 0 ~ P A 7

T M R / P C 1

S Y S

/ 4

W D T S

W D T

P C C

P C

P O R T C

P C 0 ~ P C 1

P B C

P B

P O R T B

P B 0 ~ P B 2

T M R

T M R C

V S S

P r e s c a l e r

S Y S

B Z / B Z

P C 0

P C 1

P r o g r a m

R O M

P r o g r a m

C o u n t e r

I n t e r r u p t

C i r c u i t

S T A C K 0
S T A C K 1

I N T C

D A T A

M e m o r y

I n s t r u c t i o n

R e g i s t e r

I n s t r u c t i o n

D e c o d e r

S T A T U S

A L U

S h i f t e r

T i m i n g

G e n e r a t o r

A C C

R C O S C

W D T P r e s c a l e r

M P

D a t a M e m o r y

E E P R O M

E E C R

Preliminary

Pin Assignment

Pad Assignment

* The IC substrate should be connected to VSS in the PCB layout artwork.

HT48E06

Rev. 0.00

January 12, 2004

Preliminary

P A 4
P A 5
P A 6
P A 7
O S C 2
O S C 1
V D D
R E S
P C 1 / T M R

P A 3
P A 2
P A 1
P A 0
P B 2

P B 1 / B Z
P B 0 / B Z

V S S

P C 0 / I N T

1 8
1 7
1 6
1 5
1 4
1 3
1 2
1 1
1 0

1
2
3
4
5
6
7
8
9

H T 4 8 E 0 6

1 8 D I P - A / S O P - A

1 6
1 5
1 4
1 3
1 2
1 1
1 0

1
2
3
4
5
6
7
8

H T 4 8 E 0 6

1 6 S S O P - A

P A 4
P A 5
P A 6
P A 7
O S C 2
O S C 1
V D D
R E S

P A 3
P A 2
P A 1
P A 0

P B 0 / B Z

V S S

P C 0 / I N T

P C 1 / T M R

P A 2

T R I M 1

T R I M 2
T R I M 3

P A 1

P A 0
P B 2

P B 0 / B Z

1
/
T
M

O S C 1

O S C 2

P A 7

P A 6

P B 1 / B Z

0
/
I
N

( 0 , 0 )

2 1 2 0

2
3

4
5

6
7

1 0

1 1

1 2 1 3

1 4

1 5

1 9
1 8

1 7
1 6

Pad Description

Pad Name

I/O

Options

Description

PA0~PA7

I/O

Pull-high*

Wake-up

Bidirectional 8-bit input/output port. Each bit can be configured as a
wake-up input by options. Software instructions determine the CMOS
output or Schmitt trigger input with pull-high resistor (determined by
pull-high options).

PB0/BZ
PB1/BZ
PB2~PB7

I/O

Pull-high*

PB0 or BZ
PB1 or BZ

Bidirectional 8-bit input/output port. Software instructions determine the
CMOS output or Schmitt trigger input with pull-high resistor (deter-
mined by pull-high options).
The PB0 and PB1 are pin-shared with BZ and BZ, respectively. Once
PB0 or PB1 is selected as buzzer driving output, the output signals
come from an internal PFD generator (shared with timer/event coun-
ter).

VSS

Negative power supply, ground

PC0/INT
PC1/TMR

I/O

Pull-high*

Bidirectional I/O lines. Software instructions determine the CMOS out-
put or Schmitt trigger input with pull-high resistor (determined by
pull-high options). The external interrupt and timer input are pin-shared
with PC0 and PC1, respectively. The external interrupt input is acti-
vated on a high to low transition.

RES

Schmitt trigger reset input. Active low.

VDD

Positive power supply

OSC1
OSC2

Crystal or RC

OSC1and OSC2 are connected to an RC network or Crystal (deter-
mined by options) for the internal system clock. In the case of RC oper-
ation, OSC2 is the output terminal for 1/4 system clock.

Note:

²*² All pull-high resistors are controlled by an option bit.

Absolute Maximum Ratings

Supply Voltage ...........................V

-0.3V to V

+6.0V

Storage Temperature ............................

-50°C to 125°C

Input Voltage..............................V

-0.3V to V

+0.3V

Operating Temperature...........................

-40°C to 85°C

Note: These are stress ratings only. Stresses exceeding the range specified under

²Absolute Maximum Ratings² may

cause substantial damage to the device. Functional operation of this device at other conditions beyond those
listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliabil-
ity.

HT48E06

Rev. 0.00

January 12, 2004

Preliminary

D.C. Characteristics

Ta=25

°C

Symbol

Parameter

Test Conditions

Min.

Typ.

Max.

Unit

Conditions

Operating Voltage

¾ f

SYS

=4MHz

2.2

5.5

¾ f

SYS

=8MHz

3.3

5.5

DD1

Operating Current (Crystal OSC)

No load, f

SYS

=4MHz

0.6

1.5

DD2

Operating Current (RC OSC)

No load, f

SYS

=4MHz

0.8

1.5

2.5

DD3

Operating Current (Crystal OSC)

No load, f

SYS

=8MHz

STB1

Standby Current (WDT Enabled)

No load, system HALT

STB2

Standby Current (WDT Disabled)

No load, system HALT

IL1

Input Low Voltage for I/O Ports

0.3V

IH1

Input High Voltage for I/O Ports

0.7V

IL2

Input Low Voltage (RES)

0.4V

IH2

Input High Voltage (RES)

0.9V

LVR

Low Voltage Reset Voltage

¾ LVR enabled

2.7

3.0

3.3

I/O Port Sink Current

=0.1V

I/O Port Source Current

=0.9V

-2

-4

=0.9V

-5

-10

Pull-high Resistance

HT48E06

Rev. 0.00

January 12, 2004

Preliminary

A.C. Characteristics

Ta=25

°C

Symbol

Parameter

Test Conditions

Min.

Typ.

Max.

Unit

Conditions

SYS1

System Clock (Crystal OSC)

¾ 2.2V~5.5V

400

4000

kHz

¾ 3.3V~5.5V

400

8000

kHz

SYS2

System Clock (RC OSC)

¾ 2.2V~5.5V

400

4000

kHz

¾ 3.3V~5.5V

400

8000

kHz

TIMER

Timer I/P Frequency (TMR)

¾ 2.2V~5.5V

4000

kHz

¾ 3.3V~5.5V

4000

kHz

WDTOSC

Watchdog Oscillator Period

180

130

WDT1

Watchdog Time-out Period (WDT OSC)

Without WDT prescaler

WDT2

Watchdog Time-out Period (System Clock)

¾ Without WDT prescaler

1024

SYS

RES

External Reset Low Pulse Width

SST

System Start-up Timer Period

¾ Wake-up from HALT

1024

SYS

INT

Interrupt Pulse Width

HT48E06

Rev. 0.00

January 12, 2004

Preliminary

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Document Outline

Ð­Ð»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: HT48E06

Document Outline

ÐÐ»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: HT48E06