8,388,608 W O R D S x 8 BIT
C M O S D Y N A M I C R A M

D escription

Features

* 8,388,608 W o r d s x 8 Bit
* Extended Data Out (EDO) M ode Capability
* Fast A ccess Tim e & C y cle Tim e

*Pow er dissipation
- A ctive : 522m W / 486m W (M A X)
- Standby : 1.8 m W ( CM OS lev el : M A X )
0.54m W ( L-Ver sion : M A X)
*EDO page mode capability
*A ccess tim e : 50ns/ 60ns (m ax)
*Refresh cycles
- RA S only Refresh
4096 cycles/ 64 m s (GM 71V 65803C)
4096 cycles/ 128m s (GM 71V S65803CL)(L_Ver sion)
*CBR & H i d d en Refresh
4096 cycles/ 64 m s (GM 71V 65803C)
4096 cycles/ 128 m s (GM 71V S65803CL)( L-Ver sion )
*4 v ariations of refresh
-RA S-only refresh
-CA S-before-RA S r efresh
-H i d d en refresh
-Self refresh (L-V er sion)
*Single Pow er Supply of 3.3V+/ -10 % w i t h a built-in VBB generator
*Battery Back Up Operation ( L-Version )

(Unit: ns)

Pin Configuration

T h e G M 7 1 V ( S ) 6 5 8 0 3 C / C L i s t h e n e w
generation dynamic RA M organized 8,388,608
w o r d s by 8 b i t s. T h e GM 71V (S)65803C/ C L
utilizes advanced CM O S Silicon Gate Process
T e c h n o l o g y a s w e l l a s a d v a n c e d c i r c u i t
t ech n i q u es f o r w i d e operating margins, both
i n t er n al l y a n d t o t h e system u ser . Sy st e m
oriented f eatures include single pow er supply of
3.3V + / - 1 0 % t o l e r a n c e , d i r ect i n t er f a c i n g
capability w ith high performance logic families
su ch as Schottky TTL.

T h e GM 71V (S)65803C/ C L o f f e r s Extended
D ata Out (EDO) M ode as a high speed access
m o d e.

G M 71V (S)65803C/ CL-5

G M 71V (S)65803C/ CL-6

R A C

A A

H PC

104

C A C

IO2

(Top View)

VCC

IO0

IO1

IO3

VCC

/WE

/RAS

VCC

VSS

A10

A11

/OE

/CAS

VSS

IO6

IO7

VSS

IO4

IO5

32 SOJ / TSOP II

G M 71V S65803C L

G M 71V 65803C

Rev 0.1 / Apr'01

Pin D escription

Pin

Function

Pin

Function

A 0-A 11

RA S

C A S

W E

N C

A d d r ess Inputs

Refresh A d d r ess Inputs

Row A d d r ess Strobe

Column A d d r ess Strobe

W r i t e Enable

Pow er (+3.3V)

Ground

N o Connection

A b solute M aximum Ratings*

Symbol

Param eter

Rating

U n i t

STG

O U T

-55 to 125

-0.5 to V

+ 0.5

(M A X ; 4.6V)

-0.5 to 4.6

Storage Tem p er ature (Plastic)

Voltage on any Pin Relative to V

Voltage on V

Relative to V

Short Circuit Output Current

m A

1.0

Pow er D i ssipation

*N ote : Operation at or above A bsolute M aximum Ratings can adversely affect device reliability.

Recom m ended D C O p erating Conditions (T

= 0 ~ 70C)

Symbol

Param eter

U n i t

I H

I L

Supply Voltage

Input H igh Voltage

Input Low V oltage

M ax

3.6

V cc+0.3

0.8

T y p

3.3

M in

3.0

2.0

-0.3

Output Enable

I/ O0 - I/ O7

D ata Input / Output

O rdering I n f orm ation

Type N o.

A ccess T i m e

Pack age

G M 71V(S)65803C/ CLJ-5
G M 71V(S)65803C/ CLJ-6

50ns
60ns

400 M il
32Pin
Plastic SO J

G M 71V(S)65803C/ CLT-5
G M 71V(S)65803C/ CLT-6

50ns
60ns

400 M il
32Pin
Plastic TSOP II

N otes

1,2

Supply Voltage

A m bient Temper ature under Bias

G M 71V S65803C L

G M 71V 65803C

Rev 0.1 / Apr'01

D C Electrical Characteristics: (V

= 3.3V + / -10%, T

= 0 ~ 70C)

Symbol

Parameter

N ote

O H

O L

O u t p u t L ev el
O u t p u t L ev el Voltage (I

O U T

= -2m A )

Unit

M ax

0.4

M in

2.4

O u t p u t L ev el
O u t p u t L ev el Voltage (I

O U T

= 2m A )

CC1

145

O p er ating Current (

min)

50ns

m A

60ns

135

CC2

m A

Standby Current (TTL interface)
Pow er Su p p l y St an d b y C u r r ent
(RA S, CA S= V

I H

, D

O U T

= High-Z)

CC3

m A

RA S-Only Refresh C u r r ent
( t

= t

m i n )

CC4

m A

Extended Data Out page M ode Cu r r ent

(RA S = V I L , C A S, A d d r ess Cycling: t H P C = t H P C m i n )

50ns

60ns

110

50ns

60ns

100

CC6

m A

CA S-before-RA S Refresh C u r r ent
(t

= t

m i n )

50ns

60ns

CC8

m A

Standby Current (CM O S)
Pow er Su p p l y St an d b y C u r r ent
RA S = V

I H

, CA S = V

I L

O U T

= Enable

I(L)

-5

O(L)

-5

I n p u t L eakage Current, A n y I n p u t
(0V < = V

I N

<=V cc)

O u t p u t L eak age Current
(D

O U T

is D i sabl ed , 0V < = V

O U T

<=V cc)

N ote: 1. I

C C

d ep ends on output load condition w hen the device is selected. I

CC(max)

i s sp ecified at the

output open condition.
2. A d d r ess can be changed once or less w h i l e RA S = V

I L

3. M easu r ed w i t h o n e sequ ential address change per EDO cycle, t

H PC

4. V

I H

> = V

-0.2V , 0V < = V

I L

<=0.2V

5. L -Version

145

135

145

135

500

400

Battery Back Up Operating Current(Standby w ith CBR)
(tRC=31.25u s,tRA S=300ns,D o u t =High-Z)

Self Refresh Current
(RA S, CA S <=0.2V ,D o u t =High-Z)

CC7

CC9

Standby Current(L_Ver sion)

u A

300

u A

m A

CM OS i n t er f ace
(RA S, CA S> = V

C C

-0.2V , D

O U T

= H ig h -Z )

0.5

CC5

1,2

1,3

4, 5

u A

G M 71V S65803C L

G M 71V 65803C

Rev 0.1 / Apr'01

Symbol

Parameter

N ote

I / O

Input Capacitance (A d d r ess)

Input Capacitance (Clocks)

Output Capacitance

(Data-in,Data-Out)

1, 2

Unit

p F

M ax

Typ

N ote: 1. Cap acitance m easu r ed with Boonton M eter or effective capacitance m easu r i n g m ethod.
2. RA S, C A S = V

I H

to disable D

O U T

Capacitance (V

= 3.3V + / -10%, T

= 25C)

Read, W rite, Read-M odify-W rite and Refresh C y cles (Com m on Param eters)

A C C h aracteristics (V

= 3.3V + / -10%, T

= 0 ~ 70C, N otes 1, 2,19)

T est Conditions

Input rise and fall times : 2ns Output timing reference lev els : V

O L

/ V

O H

= 0.8/ 2.0V

Input lev el : V

I L

/ V

I H

= 0.0/ 3.0V Output load : 1 TTL gate+C

(100pF)

Input timing ref er ence levels : V

I L

/ V

I H

= 0.8/ 2.0V (Including scope and jig)

Symbol

Param eter

M i
n

G M 71V (S)65803C/CL-5

M ax

Ran d o m Read or Write Cycle Time

RA S Pr echarge T i m e

RA S

RA S Pulse W i d t h

C A S

C A S Pulse W i d t h

A SR

Row A d d r ess Set-up Time

RA H

Row A d d r ess H old Time

A SC

Column A d d r ess Set-u p T i m e

C A H

Column A d d r ess H old Time

R C D

RA S to CA S D elay Time

RA D

RA S t o C o l u m n A d d r ess D elay Time

RSH

RA S H old Time

C SH

C A S H old Time

CRP

C A S to RA S Pr echarge Time

M ax

M i
n

104

10000

U n i t

N ote

n s

TransitionTime (Rise and Fall)

n s

O D D

OE to D

I N

D elay Time

D Z O

OE Delay Time from D

I N

D Z C

C A S D elay Time f r o m D

I N

n s

G M 71V (S)65803C/CL-6

C A S Pr echarge Time

n s

10000

REF

Refresh Period

m s

Refresh Period ( L-Version )

128

m s

4096

cycles

4096

cycles

G M 71V S65803C L

G M 71V 65803C

Rev 0.1 / Apr'01

Read Cycles

Symbol

Param eter

M i
n

G M 71V (S)65803C/CL-5 G M 71V (S)65803C/CL-6

M ax

M i
n

U n i t

N otes

RA C

C A C

A A

RCS

R C H

RRH

RA L

C A L

A ccess Tim e f r o m R A S

A ccess Tim e f r o m C A S

A ccess Tim e f r o m C o l u m n A d d r ess

Read C o m m and Set-up Time

Read C o m m and H old Time to CA S

Read C o m m and H old Time to RA S

Column A d d r ess to RA S L ead T i m e

Column A d d r ess to CA S L ead T i m e

8,9

O A C

A ccess Tim e from OE

9,10,17

9,11,17

R D D

W D D

RA S to D

I N

D elay Time

OFR

Output Buffer Turn-off Delay Time f r o m R A S

W EZ

Output Buffer Turn-off Delay Time f r o m W E

C L Z

O H

C D D

C A S to Output in Low - Z

O u t p u t D ata H old Time

C A S to D

I N

D elay Time

O H R

O E Z

O u t p u t D ata H old Time from RA S

Output Buffer Turn-off Delay Time from OE

W E to D

I N

D elay Time

13,21

R C H R

Read C o m m and H old Time f r o m R A S

O H O

Output data hold time from OE

Output Buffer Turn-off Delay Time f r o m C A S

13,21

G M 71V S65803C L

G M 71V 65803C

Rev 0.1 / Apr'01

Электронный компонент: GM71VS65803CCL-6