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Электронный компонент: 8431CM-11

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8431EM-11
www.icst.com/products/hiperclocks.html
REV. B SEPTEMBER 11, 2002
1
Integrated
Circuit
Systems, Inc.
ICS8431-11
255MH
Z
, L
OW
J
ITTER
, C
RYSTAL
O
SCILLATOR
-
TO
-3.3V LVPECL F
REQUENCY
S
YNTHESIZER
G
ENERAL
D
ESCRIPTION
The ICS8431-11 is a general purpose clock
frequency synthesizer for IA64/32 application and
a member of the HiPerClockSTM family of High
Performance Clock Solutions from ICS. The VCO
operates at a frequency range of 190MHz to
510MHz providing an output frequency range of 95MHz to
255MHz. The output frequency can be programmed using the
parallel interface, M0 thru M8, to the configuration logic.
Spread spectrum clocking is programmed via the control
inputs SSC_CTL0 and SSC_CTL1.
Programmable features of the ICS8431-11 support four
operational modes. The four modes are spread spectrum
clocking (SSC), non-spread spectrum clock and two test
modes which are controlled by the SSC_CTL[1:0] pins. Un-
like other synthesizers, the ICS8431-11 can immediately
change spread-spectrum operation without having to reset
the device.
In SSC mode, the output clock is modulated in order to
achieve a reduction in EMI. In one of the PLL bypass test
modes, the PLL is disconnected as the source to the
differential output allowing an external source to be
connnected to the TEST_I/O pin. This is useful for in-
circuit testing and allows the differential output to be driven
at a lower frequency throughout the system clock tree. In the
other PLL bypass mode, the oscillator divider is used as the
source to both the M and the Fout divide by 2. This is useful
for characterizing the oscillator and internal dividers.
XTAL1
XTAL2
M0:M8
PLL
FOUT
nFOUT
16
TEST_I/O
OSC
VCO
2
PHASE
DETECTOR
M
SSC
Control
Logic
Configuration
Logic
nP_LOAD
SSC_CTL0
F
EATURES
Fully integrated PLL
Differential 3.3V LVPECL output
Crystal oscillator interface
Output frequency range: 95MHz to 255MHz
Crystal input frequency range: 14MHz to 20MHz
VCO range: 190MHz to 510MHz
Programmable PLL loop divider for generating a variety
of output frequencies
Spread Spectrum Clocking (SSC) fixed at 1/2% modulation
for environments requiring ultra low EMI
PLL bypass modes supporting in-circuit testing and on-chip
functional block characterization
Cycle-to-cycle jitter: 30ps (maximum)
3.3V supply voltage
0C to 85C ambient operating temperature
B
LOCK
D
IAGRAM
P
IN
A
SSIGNMENT
SSC_CTL1
M0
M1
M2
M3
M4
M5
M6
M7
M8
SSC_CTL0
SSC_CTL1
V
EE
TEST_I/O
V
CC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
nP_LOAD
V
CC
XTAL2
XTAL1
nc
nc
V
CCA
V
EE
MR
nc
V
CCO
FOUT
nFOUT
V
EE
ICS8431-11
28-Lead SOIC
7.5mm x 18.05mm x 2.25mm package body
M Package
Top View
HiPerClockSTM
,&6
8431EM-11
www.icst.com/products/hiperclocks.html
REV. B SEPTEMBER 11, 2002
2
Integrated
Circuit
Systems, Inc.
ICS8431-11
255MH
Z
, L
OW
J
ITTER
, C
RYSTAL
O
SCILLATOR
-
TO
-3.3V LVPECL F
REQUENCY
S
YNTHESIZER
F
UNCTIONAL
D
ESCRIPTION
The ICS8431-11 features a fully integrated PLL and therefore requires no external components for setting the loop bandwidth.
A 16MHz series-resonant, fundamental crystal is used as the input to the on-chip oscillator. The output of the oscillator is divided by
16 prior to the phase detector. With a 16MHz crystal this provides a 1MHz reference frequency. The VCO of the PLL operates over
a range of 190MHz to 510MHz. The output of the M divider is also applied to the phase detector.
The phase detector and the M divider force the VCO output frequency to be M times the reference frequency by adjusting the
VCO control voltage. Note that for some values of M (either too high or too low), the PLL will not achieve lock. The output of the
VCO is scaled by a divider prior to being sent to the LVPECL output buffer. The divider provides a 50% output duty cycle.
The programmable features of the ICS8431-11 support four output operational modes and a programmable M divider and
output divider. The four output operational modes are spread spectrum clocking (SSC), non-spread spectrum clock and
two test modes and are controlled by the SSC_CTL[1:0] pins.
The PLL loop divider or M divider is programmed by using inputs M0 through M8. While the nP_LOAD input is held LOW, the
data present at M0:M8 is transparent to the M divider. On the LOW-to-HIGH transition of nP_LOAD, the M0:M8 data is latched
into the M divider and any further changes at the M0:M8 inputs will not be seen by the M divider until the next LOW transition
on nP_LOAD.
The relationship between the VCO frequency, the crystal frequency and the M divider is defined as follows:
The M value and the required values of M0:M8 for programming the VCO are shown in
Table 3B, Programmable VCO Frequency
Function Table. The frequency out is defined as follows:
For the ICS8431-11, the output divider equals 2. Valid M values for which the PLL will achieve lock are defined as 190
M
510.
16
M
fVCO =
fxtal x
2
FOUT =
fVCO
=
32
fxtal x M
8431EM-11
www.icst.com/products/hiperclocks.html
REV. B SEPTEMBER 11, 2002
3
Integrated
Circuit
Systems, Inc.
ICS8431-11
255MH
Z
, L
OW
J
ITTER
, C
RYSTAL
O
SCILLATOR
-
TO
-3.3V LVPECL F
REQUENCY
S
YNTHESIZER
T
ABLE
1. P
IN
D
ESCRIPTIONS
T
ABLE
2. P
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C
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8431EM-11
www.icst.com/products/hiperclocks.html
REV. B SEPTEMBER 11, 2002
4
Integrated
Circuit
Systems, Inc.
ICS8431-11
255MH
Z
, L
OW
J
ITTER
, C
RYSTAL
O
SCILLATOR
-
TO
-3.3V LVPECL F
REQUENCY
S
YNTHESIZER
T
ABLE
3A. SSC C
ONTROL
I
NPUT
F
UNCTION
T
ABLE
T
ABLE
3B. P
ROGRAMMABLE
VCO F
REQUENCY
F
UNCTION
T
ABLE
(NOTE 1)
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8431EM-11
www.icst.com/products/hiperclocks.html
REV. B SEPTEMBER 11, 2002
5
Integrated
Circuit
Systems, Inc.
ICS8431-11
255MH
Z
, L
OW
J
ITTER
, C
RYSTAL
O
SCILLATOR
-
TO
-3.3V LVPECL F
REQUENCY
S
YNTHESIZER
A
BSOLUTE
M
AXIMUM
R
ATINGS
Supply Voltage, V
CC
X
4.6V
Inputs, V
CC
-0.5V to V
CC
+ 0.5 V
Outputs, V
CCO
-0.5V to V
CCO
+ 0.5V
Package Thermal Impedance,
JA
46.2C/W (0 lfpm)
Storage Temperature, T
STG
-65C to 150C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are
stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the
DC
Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may
affect product reliability.
T
ABLE
4B. LVCMOS / LVTTL DC C
HARACTERISTICS
,
V
CC
= V
CCA
= V
CCO
= 3.3V5%, T
A
= 0C
TO
85C
T
ABLE
4C. LVPECL DC C
HARACTERISTICS
,
V
CC
= V
CCA
= V
CCO
= 3.3V5%, T
A
= 0C
TO
85C
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