8531AY-01
www.icst.com/products/hiperclocks.html
REV. B OCTOBER 2, 2002
1
Integrated
Circuit
Systems, Inc.
ICS8531-01
L
OW
S
KEW
, 1-
TO
-9
D
IFFERENTIAL
-
TO
-3.3V LVPECL F
ANOUT
B
UFFER
G
ENERAL
D
ESCRIPTION
The ICS8531-01 is a low skew, high performance
1-to-9 Differential-to-3.3V LVPECL Fanout Buffer
and a member of the HiPerClockSTM family of High
Performance Clock Solutions from ICS. The
ICS8531-01 has two selectable clock inputs. The
CLK, nCLK pair can accept most standard differential input
levels. The PCLK, nPCLK pair can accept LVPECL, CML, or
SSTL input levels. The clock enable is internally synchronized
to eliminate runt pulses on the outputs during asynchronous
assertion/deassertion of the clock enable pin.
Guaranteed output skew and part-to-part skew characteristics
make the ICS8531-01 ideal for high performance workstation
and server applications.
HiPerClockSTM
,&6
F
EATURES
9 differential 3.3V LVPECL outputs
Selectable differential CLK, nCLK or LVPECL clock inputs
CLK, nCLK pair can accept the following differential
input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL
PCLK, nPCLK supports the following input types:
LVPECL, CML, SSTL
Maximum output frequency: 500MHz
Translates any single ended input signal (LVCMOS, LVTTL,
GTL) to 3.3V LVPECL levels with resistor bias on nCLK input
Output skew: 50ps (maximum)
Part-to-part skew: 250ps (maximum)
Propagation delay: 2ns (maximum)
3.3V operating supply
0C to 70C ambient operating temperature
Industrial temperature information available upon request
B
LOCK
D
IAGRAM
P
IN
A
SSIGNMENT
32 31 30 29 28 27 26 25
9 1 0 1 1 1 2 1 3 1 4 1 5 1 6
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
V
CCO
Q3
nQ3
Q4
nQ4
Q5
nQ5
V
CCO
ICS8531-01
Vcco
Q6
nQ6
Q7
nQ7
Q8
nQ8
Vcco
V
CCO
nQ2
Q2
nQ1
Q1
nQ0
Q0
V
CCO
V
CC
CLK
nCLK
CLK_SEL
PCLK
nPCLK
V
EE
CLK_EN
32-Lead LQFP
7mm x 7mm x 1.4mm package body
Y package
Top View
Q0
nQ0
Q1
nQ1
Q2
nQ2
Q3
nQ3
Q4
nQ4
Q5
nQ5
Q6
nQ6
Q7
nQ7
Q8
nQ8
CLK
nCLK
PCLK
nPCLK
D
Q
LE
CLK_EN
CLK_SEL
0
1
8531AY-01
www.icst.com/products/hiperclocks.html
REV. B OCTOBER 2, 2002
4
Integrated
Circuit
Systems, Inc.
ICS8531-01
L
OW
S
KEW
, 1-
TO
-9
D
IFFERENTIAL
-
TO
-3.3V LVPECL F
ANOUT
B
UFFER
A
BSOLUTE
M
AXIMUM
R
ATINGS
Supply Voltage, V
CCx
4.6V
Inputs, V
I
-0.5V to V
CC
+ 0.5V
Outputs, V
O
-0.5V to V
CCO
+ 0.5V
Package Thermal Impedance,
JA
47.9C/W (0 lfpm)
Storage Temperature, T
STG
-65C to 150C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings
are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the
DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended peri-
ods may affect product reliability.
T
ABLE
4A. P
OWER
S
UPPLY
DC C
HARACTERISTICS
,
V
CC
= V
CCO
= 3.3V5%, T
A
= 0C
TO
70C
T
ABLE
4B. LVCMOS / LVTTL DC C
HARACTERISTICS
,
V
CC
= V
CCO
= 3.3V5%, T
A
= 0C
TO
70C
T
ABLE
4C. D
IFFERENTIAL
DC C
HARACTERISTICS
,
V
CC
= V
CCO
= 3.3V5%, T
A
= 0C
TO
70C
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