858011AK
www.icst.com/products/hiperclocks.html
REV. A JULY 12, 2004
1
Integrated
Circuit
Systems, Inc.
ICS858011
L
OW
S
KEW
, 1-
TO
-2
D
IFFERENTIAL
-
TO
-CML F
ANOUT
B
UFFER
PRELIMINARY
G
ENERAL
D
ESCRIPTION
The ICS858011 is a high speed 1-to-2 Differential-
to-CML Fanout Buffer and is a member of the
HiPerClockS
TM
family of high performance clock
solutions from ICS. The ICS858011 is optimized
for high speed and very low output skew, making
it suitable for use in demanding applications such as SONET,
1 Gigabit and 10 Gigabit Ethernet, and Fibre Channel. The
internally terminated differential input and V
REF
_
AC
pin allow
other differential signal families such as LVDS, LVHSTL and
CML to be easily interfaced to the input with minimal use of
external components. The ICS858011 is packaged in a small
3mm x 3mm 16-pin VFQFN package which makes it ideal for
use in space-constrained applications.
F
EATURES
2 differential CML outputs
1 differential LVPECL clock input
IN, nIN pair can accept the following differential input levels:
LVPECL, LVDS, CML, SSTL
Output frequency: > 2.5GHz (typical)
Output skew: TBD
Part-to-part skew: TBD
Additive phase jitter, RMS: <100fs (design target)
Propagation delay: 388ps (typical)
Operating voltage supply range:
V
CC
= 2.375V to 3.63V, V
EE
= 0V
-40C to 85C ambient operating temperature
Pin compatible with SY58011U
B
LOCK
D
IAGRAM
P
IN
A
SSIGNMENT
HiPerClockSTM
ICS
IN
V
T
nIN
Q0
nQ0
Q1
nQ1
V
REF_AC
ICS858011
16-Lead VFQFN
3mm x 3mm x 0.95 package body
K Package
Top View
IN
V
T
V
REF
_
AC
nIN
Q0
nQ0
nQ1
Q1
V
CC
V
EE
V
EE
V
CC
V
CC
V
EE
V
EE
V
CC
1
2
3
4
12
11
10
9
5 6 7 8
16 15 14 13
The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial
product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice.
858011AK
www.icst.com/products/hiperclocks.html
REV. A JULY 12, 2004
2
Integrated
Circuit
Systems, Inc.
ICS858011
L
OW
S
KEW
, 1-
TO
-2
D
IFFERENTIAL
-
TO
-CML F
ANOUT
B
UFFER
PRELIMINARY
T
ABLE
1. P
IN
D
ESCRIPTIONS
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858011AK
www.icst.com/products/hiperclocks.html
REV. A JULY 12, 2004
3
Integrated
Circuit
Systems, Inc.
ICS858011
L
OW
S
KEW
, 1-
TO
-2
D
IFFERENTIAL
-
TO
-CML F
ANOUT
B
UFFER
PRELIMINARY
T
ABLE
2A. P
OWER
S
UPPLY
DC C
HARACTERISTICS
,
V
CC
= 2.375V
TO
3.63V; V
EE
= 0V
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A
BSOLUTE
M
AXIMUM
R
ATINGS
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage
to the device. These ratings are stress specifi-
cations only. Functional operation of product at
these conditions or any conditions beyond those
listed in the
DC Characteristics or AC Character-
istics is not implied. Exposure to absolute maxi-
mum rating conditions for extended periods may
affect product reliability.
Supply Voltage, V
CC
4.6V (CML mode, V
EE
= 0)
Inputs, V
I
-0.5V to V
CC
+ 0.5 V
Outputs, I
O
Continuous Current
20mA
Surge Current
40mA
Input Current, IN, nIN
50mA
V
T
Current, I
VT
100mA
Input Sink/Source, I
REF_AC
0.5mA
Operating Temperature Range, TA -40C to +85C
Storage Temperature, T
STG
-65C to 150C
Package Thermal Impedance,
JA
51.5C/W (0 lfpm)
(Junction-to-Ambient)
T
ABLE
2B. DC C
HARACTERISTICS
,
V
CC
= 2.375V
TO
3.63V; V
EE
= 0V
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CC
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858011AK
www.icst.com/products/hiperclocks.html
REV. A JULY 12, 2004
4
Integrated
Circuit
Systems, Inc.
ICS858011
L
OW
S
KEW
, 1-
TO
-2
D
IFFERENTIAL
-
TO
-CML F
ANOUT
B
UFFER
PRELIMINARY
T
ABLE
3. AC C
HARACTERISTICS
,
V
CC
= 0V; V
EE
= -3.63V
TO
-2.375V
OR
V
CC
= 2.375
TO
3.63V; V
EE
= 0V
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858011AK
www.icst.com/products/hiperclocks.html
REV. A JULY 12, 2004
5
Integrated
Circuit
Systems, Inc.
ICS858011
L
OW
S
KEW
, 1-
TO
-2
D
IFFERENTIAL
-
TO
-CML F
ANOUT
B
UFFER
PRELIMINARY
P
ARAMETER
M
EASUREMENT
I
NFORMATION
O
UTPUT
L
OAD
AC T
EST
C
IRCUIT
D
IFFERENTIAL
I
NPUT
L
EVEL
O
UTPUT
S
KEW
P
ART
-
TO
-P
ART
S
KEW
O
UTPUT
R
ISE
/F
ALL
T
IME
P
ROPAGATION
D
ELAY
S
INGLE
E
NDED
& D
IFFERENTIAL
I
NPUT
V
OLTAGE
S
WING
V
EE
nIN
V
CC
IN
tsk(pp)
tsk(o)
nQx
Qx
nQy
Qy
PART 1
PART 2
nQx
Qx
nQy
Qy
Clock
Outputs
20%
80%
80%
20%
t
R
t
F
V
SW I N G
t
PD
nIN
Q0, Q1
nQ0, nQ1
IN
V
IN
, V
OUT
400mV
(typical)
V
DIFF_IN
, V
DIFF_OUT
800mV
(typical)
V
IH
Cross Points
V
IN
V
IL
SCOPE
nQx
Qx
Power
Supply
V
EE
V
CC
Float
GND
GND
3.3V 5%
or
2.5V 5%
CML with Internal Pullup
+
-
V
IN
V
DIF_IN
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