8725
www.icst.com/products/hiperclocks.html
REV. A MARCH 5, 2001
1
Integrated
Circuit
Systems, Inc.
ICS8725
1-
TO
-5
D
IFFERENTIAL
-
TO
-LVHSTL Z
ERO
D
ELAY
B
UFFER
PRELIMINARY
G
ENERAL
D
ESCRIPTION
The ICS8725 is a high performance LVHSTL
zero delay buffer and a member of the
HiPerClockSTM family of High Performance
Clocks Solutions from ICS. The VCO operates
at a frequency range of 250MHz to 500MHz.
Utilizing one of the outputs as feedback to the PLL output
frequencies up to 500MHz can be regenerated with zero
delay with respect to the input. Dual reference clock inputs
support redundant clock or multiple reference applications.
B
LOCK
D
IAGRAM
P
IN
A
SSIGNMENT
F
EATURES
Fully integrated PLL
5 LVHSTL outputs each with the ability to drive 50
to
ground
Voh (max) = 1.2V
31.25MHz to 500MHz output frequency range
Spread SmartTM for regenerating spread spectrum clocks
Differential reference clock inputs accept any differential
input signal
Differential reference clock inputs will accept single ended
input signal with one of the inputs biased with a resistor
network
31.25MHz to 622MHz input frequency range
LVCMOS / LVTTL control inputs
3.3V core, 1.8V output operating supply voltage
32 lead low-profile QFP (LQFP), 7mm x 7mm x 1.4mm
package body, 0.8mm package lead pitch
0C to 70C ambient operating temperature
Industrial temperature version available upon request
HiPerClockSTM
,&6
The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial
product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice.
Q0
nQ0
Q1
nQ1
Q2
nQ2
Q3
nQ3
Q4
nQ4
DIV_SEL0
DIV_SEL1
REF_CLK1
nREF_CLK1
REF_CLK2
nREF_CLK2
REF_SEL
REF_DIV
FB_IN
nFB_IN
PLL_SEL
MR
0
1
PLL
1
2
4
8
0
1
8
0
1
32 31 30 29 28 27 26 25
9 10 11 12 13 14 15 16
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
VDDO
Q3
nQ3
Q2
nQ2
Q1
nQ1
VDDO
DIV_SEL0
DIV_SEL1
REF_CLK1
nREF_CLK1
REF_CLK2
nREF_CLK2
REF_SEL
MR
VDDO
Q0
nQ0
VEE
REF_DIV
FB_IN
nFB_IN
VDDI
VDDO
nQ4
Q4
VEE
VEE
VDDA
PLL_SEL
VDDi
32-Lead LQFP
Y Package
Top View
ICS8725
8725
www.icst.com/products/hiperclocks.html
REV. A MARCH 5, 2001
3
Integrated
Circuit
Systems, Inc.
ICS8725
1-
TO
-5
D
IFFERENTIAL
-
TO
-LVHSTL Z
ERO
D
ELAY
B
UFFER
PRELIMINARY
T
ABLE
2. P
IN
C
HARACTERISTICS
T
ABLE
3. C
ONTROL
I
NPUTS
F
UNCTION
T
ABLE
T
ABLE
4. PLL I
NPUT
R
EFERENCE
C
HARACTERISTICS
,
VDDI=VDDA=3.3V5%, VDDO=1.8V5%, T
A
=0C
TO
70C
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8725
www.icst.com/products/hiperclocks.html
REV. A MARCH 5, 2001
4
Integrated
Circuit
Systems, Inc.
ICS8725
1-
TO
-5
D
IFFERENTIAL
-
TO
-LVHSTL Z
ERO
D
ELAY
B
UFFER
PRELIMINARY
T
ABLE
5A. P
OWER
S
UPPLY
DC C
HARACTERISTICS
,
VDDI=VDDA=3.3V5%, VDDO=1.8V5%, T
A
=0C
TO
70C
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A
BSOLUTE
M
AXIMUM
R
ATINGS
Supply Voltage
4.6V
Inputs
-0.5V to VDD+0.5 V
Outputs
-0.5V to VDD+0.5V
Ambient Operating Temperature 0C to 70C
Storage Temperature
-65C to 150C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are
stress specifications only and functional operation of the device at these or any conditions beyond those listed in the
DC Character-
istics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product
reliability.
T
ABLE
5C. LVCMOS DC C
HARACTERISTICS
,
VDDI=VDDA=3.3V5%, VDDO=1.8V5%, T
A
=0C
TO
70C
T
ABLE
5B. D
IFFERENTIAL
DC C
HARACTERISTICS
,
VDDI=VDDA=3.3V5%, VDDO=1.8V5%, T
A
=0C
TO
70C
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8725
www.icst.com/products/hiperclocks.html
REV. A MARCH 5, 2001
5
Integrated
Circuit
Systems, Inc.
ICS8725
1-
TO
-5
D
IFFERENTIAL
-
TO
-LVHSTL Z
ERO
D
ELAY
B
UFFER
PRELIMINARY
T
ABLE
6. AC C
HARACTERISTICS
,
VDDI=VDDA=3.3V5%, VDDO=1.8V5%, T
A
=0C
TO
70C
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