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Электронный компонент: ICS87339

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ICS87339-01 Final Data Sheet
background image
87339AG-01
www.icst.com/products/hiperclocks.html
REV. A AUGUST 15, 2002
1
Integrated
Circuit
Systems, Inc.
ICS87339-01
L
OW
S
KEW
,
2/4,
4/6,
D
IFFERENTIAL
-
TO
-3.3V LVPECL / ECL C
LOCK
G
ENERATOR
G
ENERAL
D
ESCRIPTION
The ICS87339-01 is a low skew, high perfor-
mance Differential-to-3.3V LVPECL / ECL Clock
G e n e r a t o r / D i v i d e r a n d a m e m b e r o f t h e
HiPerClockSTM family of High Performance Clock
Solutions from ICS. The ICS87339-01 has one
differential clock input pair. The CLK, nCLK pair can accept
most standard differential input levels. The clock enable is
internally synchronized to eliminate runt pulses on the
outputs during asynchronous assertion/deassertion of the
clock enable pin.
Guaranteed output and part-to-part skew characteristics
make the ICS87339-01 ideal for clock distribution applications
demanding well defined performance and repeatability.
F
EATURES
2 divide by 2/4 differential 3.3V LVPECL outputs;
2 divide by 4/6 differential 3.3V LVPECL outputs
1 differential CLK, nCLK input pair
CLK, nCLK pair can accept the following differential
input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL
Maximum input frequency: 1GHz
Translates any single ended input signal (LVCMOS, LVTTL,
GTL) to LVPECL levels with resistor bias on nCLK input
Output skew: 50ps (maximum)
Part-to-part skew: 200ps (maximum)
LVPECL mode operating voltage supply range:
V
CC
= 3V to 3.8V, V
EE
= 0V
ECL mode operating voltage supply range:
V
CC
= 0V, V
EE
= -3V to -3.8V
0C to 70C ambient operating temperature
Industrial temperature information available upon request
Compatible with MC100LVEL39
B
LOCK
D
IAGRAM
P
IN
A
SSIGNMENT
ICS87339-01
20-Lead TSSOP, G Package
6.5mm x 4.4mm x 0.92mm
body package
Top View
ICS87339-01
20-Lead SOIC, M Package
7.5mm x 12.8mm x 2.25
package body
Top View
HiPerClockSTM
,&6
QA0
nQA0
QA1
nQA1
D
Q
LE
DIV_SELA
nCLK_EN
CLK
nCLK
MR
DIV_SELB
QB0
nQB0
QB1
nQB1
2,
4
R
R
4,
6
V
CC
nCLK_EN
DIV_SELB
CLK
nCLK
nc
MR
V
CC
nc
DIV_SELA
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
CC
QA0
nQA0
QA1
nQA1
QB0
nQB0
QB1
nQB1
V
EE
background image
87339AG-01
www.icst.com/products/hiperclocks.html
REV. A AUGUST 15, 2002
2
Integrated
Circuit
Systems, Inc.
ICS87339-01
L
OW
S
KEW
,
2/4,
4/6,
D
IFFERENTIAL
-
TO
-3.3V LVPECL / ECL C
LOCK
G
ENERATOR
T
ABLE
3. C
ONTROL
I
NPUT
F
UNCTION
T
ABLE
T
ABLE
2. P
IN
C
HARACTERISTICS
T
ABLE
1. P
IN
D
ESCRIPTIONS
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background image
87339AG-01
www.icst.com/products/hiperclocks.html
REV. A AUGUST 15, 2002
3
Integrated
Circuit
Systems, Inc.
ICS87339-01
L
OW
S
KEW
,
2/4,
4/6,
D
IFFERENTIAL
-
TO
-3.3V LVPECL / ECL C
LOCK
G
ENERATOR
A
BSOLUTE
M
AXIMUM
R
ATINGS
Supply Voltage, V
CC
4.6V
Inputs, V
I
-0.5V to V
CC
+ 0.5V
Outputs, V
O
-0.5V to V
CC
+ 0.5V
Package Thermal Impedance,
JA
73.2C/W (0 lfpm)
Storage Temperature, T
STG
-65C to 150C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings
are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the
DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended peri-
ods may affect product reliability.
T
ABLE
4A. P
OWER
S
UPPLY
DC C
HARACTERISTICS
,
V
CC
= 3.3V0.3V, T
A
= 0C
TO
70C
T
ABLE
4B. LVCMOS / LVTTL DC C
HARACTERISTICS
,
V
CC
= 3.3V0.3V, T
A
= 0C
TO
70C
T
ABLE
4C. D
IFFERENTIAL
DC C
HARACTERISTICS
,
V
CC
= 3.3V0.3V, T
A
= 0C
TO
70C
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.
background image
87339AG-01
www.icst.com/products/hiperclocks.html
REV. A AUGUST 15, 2002
4
Integrated
Circuit
Systems, Inc.
ICS87339-01
L
OW
S
KEW
,
2/4,
4/6,
D
IFFERENTIAL
-
TO
-3.3V LVPECL / ECL C
LOCK
G
ENERATOR
T
ABLE
5. AC C
HARACTERISTICS
,
V
CC
= 3.3V0.3V, T
A
= 0C
TO
70C
T
ABLE
4D. LVPECL DC C
HARACTERISTICS
,
V
CC
= 3.3V0.3V, T
A
= 0C
TO
70C
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background image
87339AG-01
www.icst.com/products/hiperclocks.html
REV. A AUGUST 15, 2002
5
Integrated
Circuit
Systems, Inc.
ICS87339-01
L
OW
S
KEW
,
2/4,
4/6,
D
IFFERENTIAL
-
TO
-3.3V LVPECL / ECL C
LOCK
G
ENERATOR
P
ARAMETER
M
EASUREMENT
I
NFORMATION
3.3V O
UTPUT
L
OAD
T
EST
C
IRCUIT
SCOPE
Qx
nQx
LVPECL
V
CC
= 2V
V
CC
V
EE
= -1.3V
0.3V
D
IFFERENTIAL
I
NPUT
L
EVEL
V
CMR
Cross Points
V
PP
nCLK
CLK
V
EE
V
CC

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