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Электронный компонент: 6167LA

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FEBRUARY 2001
DSC-2981/08
1
2000 Integrated Device Technology, Inc.
Features
x
x
x
x
x
High-speed (equal access and cycle time)
Military: 25/35/45/55/70/85/100ns (max.)
Commercial: 15/20/25ns (max.)
x
x
x
x
x
Low power consumption
x
x
x
x
x
Battery backup operation -- 2V data retention voltage
(IDT6167LA only)
x
x
x
x
x
Available in 20-pin CERDIP and Plastic DIP, and 20-pin SOJ
x
x
x
x
x
Produced with advanced CMOS high-performance
technology
x
x
x
x
x
CMOS process virtually eliminates alpha particle
soft-error rates
x
x
x
x
x
Separate data input and output
x
x
x
x
x
Military product compliant to MIL-STD-883, Class B
Description
The lDT6167 is a 16,384-bit high-speed static RAM organized
as 16K x 1. The part is fabricated using IDT's high-performance,
high reliability CMOS technology.
Access times as fast as 15ns are available. The circuit also offers
a reduced power standby mode. When
CS goes HIGH, the circuit
will automatically go to, and remain in, a standby mode as long as
CS
remains HIGH. This capability provides significant system-level power
and cooling savings. The low-power (LA) version also offers a battery
backup data retention capability where the circuit typically consumes
only 1W operating off a 2V battery.
All inputs and the output of the IDT6167 are TTL-compatible and
operate from a single 5V supply, thus simplifying system designs.
The IDT6167 is packaged in a space-saving 20-pin, 300 mil Plastic
DIP or CERDIP and a Plastic 20-pin providing high board-level packing
densities.
Military grade product is manufactured in compliance with the
latest revision of MIL-STD-883, Class B, making it ideally suited to
military temperature applications demanding the highest level of
performance and reliability.
Functional Block Diagram
ADDRESS
DECODE
16,384-BIT
MEMORY ARRAY
2981 drw 01
WE
V
CC
GND
D
OUT
A
0
A
13
D
IN
I/O CONTROL
CS
CONTROL
LOGIC
,
CMOS Static RAM
16K (16K x 1-Bit)
IDT6167SA
IDT6167LA
2
IDT6167SA/LA
CMOS Static RAM 16K (16K x 1-Bit) Military and Commercial Temperature Ranges
Pin Configurations
DIP
Top View
Pin Descriptions
Recommended Operating
Temperature and Supply Voltage
Truth Table
(1)
Capacitance
(T
A
= +25C, f = 1.0MHz)
Recommended DC Operating
Conditions
Absolute Maximum Ratings
(1)
2981 drw 02
5
6
7
8
9
10
A
0
1
2
3
4
20
P20-1
D20-1
A
1
A
2
A
3
A
4
A
5
A
6
V
CC
CS
A
13
A
12
D
IN
WE
GND
A
11
A
10
D
OUT
19
18
17
16
15
14
13
12
11
A
9
A
8
A
7
,
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS
may cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these or any other conditions above those
indicated in the operational sections of this specification is not implied. Exposure
to absolute maximum rating conditions for extended periods may affect
reliability.
Symbol
Rating
Com'l.
Mil.
Unit
V
TERM
Terminal Voltage
with Respect
to GND
-0.5 to +7.0
-0.5 to +7.0
V
T
A
Operating
Temperature
0 to +70
-55 to +125
o
C
T
BIAS
Temperature
Under Bias
-55 to +125
-65 to +135
o
C
T
STG
Storage Temperature
-55 to +125
-65 to +150
o
C
P
T
Power Dissipation
1.0
1.0
W
I
OUT
DC Output Current
50
50
mA
2981 tbl 03
Name
Description
A
0
- A
13
Address Inputs
CS
Chip Select
WE
Write Enable
V
CC
Power
D
IN
DATA
IN
D
OUT
DATA
OUT
GND
Ground
2981 tbl 01
NOTE:
1. H = V
IH
, L = V
IL
, X = Don't Care.
Mode
CS
WE
Output
Power
Standby
H
X
High-Z
Standby
Read
L
H
DATA
OUT
Active
Write
L
L
High-Z
Active
2981 tbl 02
Grade
Temperature
GND
Vcc
Military
-55
O
C to +125
O
C
0V
5V 10%
Commercial
0
O
C to +70
O
C
0V
5V 10%
2981 tbl 06
NOTE:
1. This parameter is determined by device characterization, but is not production
tested.
Symbol
Parameter
(1)
Conditions
Max.
Unit
C
IN
Input Capacitance
V
IN
= 0V
7
pF
C
OUT
Output Capacitance
V
OUT
= 0V
7
pF
2981 tbl 04
NOTE:
1. V
IL
(min.) = 3.0V for pulse width less than 20ns, once per cycle.
Symbol
Parameter
Min.
Typ.
Max.
Unit
V
CC
Supply Voltage
4.5
5.0
5.5
V
GND
Ground
0
0
0
V
V
IH
Input High Voltage
2.2
____
6.0
V
V
IL
Input Low Voltage
-0.5
(1)
____
0.8
V
2981 tbl 05
6.42
IDT6167SA/LA
CMOS Static RAM 16K (16K x 1-Bit) Military and Commercial Temperature Ranges
3
DC Electrical Characteristics
(1)
(V
CC
= 5.0V 10%, V
LC
= 0.2V, V
HC
= V
CC
0.2V)
DC Electrical Characteristics
(1)
(con't.)
(V
CC
= 5.0V 10%, V
LC
= 0.2V, V
HC
= V
CC
0.2V)
Symbol
Parameter
Power
6167SA/LA15
6167SA/LA20
6167SA/LA25
Unit
Com'l.
Com'l.
Com'l.
Mil.
I
CC1
Operating Power Supply Current
CS < V
IL
, Outputs Open
V
CC
= Max., f
=
0
(3)
SA
90
90
90
90
mA
LA
55
55
55
60
I
CC2
Dynamic Operating Current
CS < V
IL
, Outputs Open
V
CC
= Max., f = f
MAX
(3)
SA
120
100
100
100
mA
LA
100
80
70
75
I
SB
Standby Power Supply Current (TTL Level)
CS > V
IH
, Outputs Open
V
CC
= Max., f = f
MAX
(3)
SA
50
35
35
35
mA
LA
35
30
25
25
I
SB1
Full Standby Power Supply Current (CMOS Level)
CS > V
HC
, V
CC
= Max.,
V
IN
> V
HC
or V
IN
< V
LC
, f = 0
(3)
SA
5
5
5
10
mA
LA
0.9
0.05
0.05
0.9
2981 tbl 07
NOTES:
1. All values are maximum guaranteed values.
2. 55C to +125C temperature range only. Also available; 85ns and 100ns Military devices.
3. f
MAX
= 1/t
RC
, only address inputs cycling at f
MAX
. f = 0 means no address inputs change.
Symbol
Parameter
Power
6167SA/LA35
(2)
6167SA/LA45
(2)
6167SA/LA55
(2)
6167SA/LA70
(2)
Unit
Mil.
Mil.
Mil.
Mil.
I
CC1
Operating Power Supply Current
CS < V
IL
, Outputs Open
V
CC
= Max., f
=
0
(3)
SA
90
90
90
90
mA
LA
60
60
60
60
I
CC2
Dynamic Operating Current
CS < V
IL
, Outputs Open
V
CC
= Max., f = f
MAX
(3)
SA
100
100
100
100
mA
LA
70
65
60
60
I
SB
Standby Power Supply Current
(TTL Level)
CS > V
IH
, Outputs Open
V
CC
= Max., f = f
MAX
(3)
SA
35
35
35
35
mA
LA
20
20
20
15
I
SB1
Full Standby Power Supply
Current (CMOS Level)
CS > V
HC
, V
CC
= Max.,
V
IN
> V
HC
or V
IN
< V
LC
, f = 0
(3)
SA
10
10
10
10
mA
LA
0.9
0.9
0.9
0.9
2981 tbl 08
4
IDT6167SA/LA
CMOS Static RAM 16K (16K x 1-Bit) Military and Commercial Temperature Ranges
DC Electrical Characteristics
(V
CC
= 5.0V 10%)
Data Retention Characteristics Over All Temperature Ranges
(LA Version Only) (V
LC
= 0.2V, V
HC
= V
CC
0.2V)
Low V
CC
Data Retention Waveform
2981 drw 03
DATA
RETENTION
MODE
4.5V
4.5V
V
DR
2V
V
IH
V
IH
t
R
t
CDR
V
CC
CS
V
DR
,
NOTES:
1. T
A
= +25C.
2. t
RC
= Read Cycle Time.
3. This parameter is guaranteed by device characterization, but is not production tested.
Typ.
(1)
V
CC
@
Max.
V
CC
@
Symbol
Parameter
Test Condition
Min.
2.0V
3.0V
2.0V
3.0V
Unit
V
DR
V
CC
for Data Retention
____
2.0
____
____
____
____
V
I
CCDR
Data Retention Current
MIL.
COM'L.
____
____
0.5
0.5
1.0
1.0
200
20
300
30
A
t
CDR
Chip Deselect to Data
Retention Time
CS > V
HC
V
IN
> V
HC
or < V
LC
0
____
____
____
____
ns
t
R
(3)
Operation Recovery Time
t
RC
(2)
____
____
____
____
ns
I
I
LI
I
(3)
Input Leakage Current
____
____
____
2
2
A
2981 tbl 10
Symbol
Parameter
Test Conditions
IDT6167SA
IDT6167LA
Unit
Min.
Max.
Min.
Max.
|I
LI
|
Input Leakage Current
V
CC
= Max.,
V
IN
=
GND to V
CC
MIL.
COM'L.
____
____
10
5
____
____
5
2
A
|I
LO
|
Output Leakage Current
V
CC
= Max.,
CS = V
IH
,
V
OUT
= GND to V
CC
MIL.
COM'L.
____
____
10
5
____
____
5
2
A
V
OL
Output Low Voltage
I
OL
= 8mA, V
CC
= Min.
____
0.4
____
0.4
V
V
OH
Output High Voltage
I
OH
= -4mA, V
CC
= Min.
2.4
____
2.4
____
V
2981 tbl 09
6.42
IDT6167SA/LA
CMOS Static RAM 16K (16K x 1-Bit) Military and Commercial Temperature Ranges
5
AC Test Conditions
Figure 2. AC Test Load
(for t
CLZ
, t
CHZ
, t
WHZ
and t
OW
)
*Includes scope and jig.
Figure 1. AC Test Load
AC Electrical Characteristics
(V
CC
= 5.0V 10%, All Temperature Ranges)
2981 drw 04
480
30pF*
255
DATA
OUT
5V
,
2981 drw 05
480
5pF*
255
DATA
OUT
5V
,
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
AC Test Load
GND to 3.0V
5ns
1.5V
1.5V
See Figures 1 and 2
2981 tbl 11
NOTES:
1. 55C to +125C temperature range only. Also available: 85ns and 100ns Military devices.
2. This parameter is guaranteed with AC Load (Figure 2) by device characterization, but is not production tested.
3. 0C to +70C temperature range only.
Symbol
Parameter
6167SA15
(3)
6167SA20
(3)
/25
6167LA20
(3)
/25
6167SA35
(1)
/45
(1)
6167LA35
(1)
/45
(1)
6167SA55
(1)
/70
(1)
6167LA55
(1)
/70
(1)
Unit
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
Read Cycle
t
RC
Read Cycle Time
15
____
20/25
____
35/45
____
55/70
____
ns
t
AA
Address Access Time
____
15
____
20/25
____
35/45
____
55/70
ns
t
ACS
Chip Select Access Time
____
15
____
20/25
____
35/45
____
55/70
ns
t
CLZ
(2)
Chip De select to Output in Low-Z
3
____
5/5
____
5/5
____
5/5
____
ns
t
CHZ
(2)
Chip S elect to Output in High-Z
____
10
____
10/10
____
15/30
____
40/40
ns
t
OH
Output Hold from Address Change
3
____
5/5
____
5/5
____
5/5
____
ns
t
PU
(2)
Chip Select to Power-Up Time
0
____
0/0
____
0/0
____
0/0
____
ns
t
PD
(2)
Chip Deselect to Power-Down Time
____
15
____
20/25
____
35/45
____
55/70
ns
Write Cycle
t
WC
Write Cycle Time
15
____
20/20
____
30/45
____
55/70
____
ns
t
CW
Chip Select to End-of-Write
15
____
15/20
____
30/40
____
45/55
____
ns
t
AW
Address Valid to End-of-Write
15
____
15/20
____
30/40
____
45/55
____
ns
t
AS
Address Set-up Time
0
____
0/0
____
0/0
____
0/0
____
ns
t
WP
Write Pulse Width
13
____
15/20
____
30/30
____
35/40
____
ns
t
WR
Write Recovery Time
0
____
0/0
____
0/0
____
0/0
____
ns
t
DW
Data Valid to End-of-Write
10
____
12/15
____
17/20
____
25/30
____
ns
t
DH
Data Hold Time
0
____
0/0
____
0/0
____
0/0
____
ns
t
WHZ
(2)
Write Enable to Output in High-Z
____
7
____
8/8
____
15/30
____
40/40
ns
t
OW
(2)
Output Active from End-of-Write
0
____
0/0
____
0/0
____
0/0
____
ns
2981 tbl 12