2000 Integrated Device Technology, Inc.
JANUARY 2001
DSC-5616/2
1
Features
x
x
x
x
x
High-speed clock-to-data output times
Commercial: 20/25ns (max.)
Industrial: 20/25ns (max.)
x
x
x
x
x
Low-power operation
IDT70V914S
Active: 250 mW (typ.)
Standby: 10 mW (typ.)
x
x
x
x
x
Architecture based on Dual-Port RAM cells
Allows full simultaneous access from both ports
x
x
x
x
x
Synchronous operation
5ns setup to clock, 1ns hold on all control, data, and address
inputs
Functional Block Diagram
Data input, address, and control registers
Fast 20ns clock to data out
Self-timed write allows fast cycle times
20ns cycle times, 50MHz operation
x
x
x
x
x
LVTTL-compatible, single 3.3V (+ 0.3V) power supply
x
x
x
x
x
Clock Enable feature
x
x
x
x
x
Guaranteed data output hold times
x
x
x
x
x
Available in an 80-pin TQFP
x
x
x
x
x
Industrial temperature range (-40C to +85C) is available
HIGH SPEED 3.3V
(4K X 9) SYNCHRONOUS
DUAL-PORT RAM
IDT70V914S
MEMOR
Y
ARRAY
I/O
0-8L
OE
L
CLK
L
CLKEN
L
R/
W
L
CE
L
Self-
timed
Write
Logic
REG
REG
en
REG
en
REGI
S
T
ER
REG
I
S
T
ER
MEMORY
ARRAY
WRITE
LOGIC
SENSE
AMPS
WRITE
LOGIC
SENSE
AMPS
DECODER DECODER
Self-
timed
Write
Logic
REG
I/O
0-8R
OE
R
CLK
R
CLKEN
R
R/
W
R
CE
R
5616 drw 01
A
0L
- A
11L
A
0R
- A
11R
6.42
IDT70V914S
High-Speed 3.3V
(4K x 9) Synchronous Dual-Port Static RAM Industrial and Commercial Temperature Ranges
2
NOTES:
1. All V
CC
pins must be connected to power supply.
2. All ground pins must be connected to ground supply.
3. Package body is approximately 14mm x 14mm x 1.4mm.
4. This package code is used to reference the package diagram.
5. This text does not indicate orientation of the actual part-marking.
Pin Configurations
(1,2,3)
Description
The IDT70V914 is a high-speed 4K x 9 bit synchronous Dual-Port
RAM. The memory array is based on Dual-Port memory cells to allow
simultaneous access from both ports. Registers on control, data, and
address inputs provide low set-up and hold times. The timing latitude
provided by this approach allow systems to be designed with very short
cycle times. With an input data register, this device has been optimized for
applications having unidirectional data flow or bi-directional data flow in
bursts.
The IDT70V914 utilizes a 9-bit wide data path to allow for parity at the
user's option. This feature is especially useful in data communication
applications where it is necessary to use a parity bit for transmission/
reception error checking.
Fabricated using IDT's CMOS high-performance technology, these
Dual-Ports typically operate on only 250mW of power at maximum high-
speed clock-to-data output times as fast as 20ns. An automatic power
down feature, controlled by
CE, permits the on-chip circuitry of each port
to enter a very low standby power mode.
The IDT70V914 is packaged in an 80-pin TQFP.
Reference
N/C
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
3490 drw 02
IDT70V914PF
PN80-1
(4)
80-Pin TQFP
Top View
(5)
N/C
A
6L
A
7L
A
8L
A
9L
A
10L
A
11L
N/C
OE
L
V
CC
R/
W
L
N/C
CE
L
GND
I/O
8L
I/O
7L
I/O
6L
N/C
A
7R
A
8R
A
9R
A
10R
A
1
1R
N/C
OE
R
GND
GND
R/
W
R
N/C
CE
R
GND
I/O
8R
I/O
7R
I/O
6R
N/C
C
L
K
E
N
L
C
L
K
E
N
R
N/C
N/C
N/C
N/C
N
/
C
N
/
C
I
/
O
5
L
V
C
C
I
/
O
4
L
I
/
O
3
L
I
/
O
2
L
I
/
O
1
L
I
/
O
0
L
G
N
D
G
N
D
I
/
O
0
R
I
/
O
1
R
I
/
O
2
R
I
/
O
3
R
V
C
C
I
/
O
4
R
I
/
O
5
R
N
/
C
N
/
C
N
/
C
N
/
C
A
5
L
A
4
L
A
3
L
A
2
L
A
1
L
A
0
L
C
L
K
L
C
L
K
R
A
0
R
A
1
R
A
2
R
A
3
R
A
4
R
A
5
R
A
6
R
N
/
C
,
6.42
IDT70V914S
High-Speed 3.3V
(4K x 9) Synchronous Dual-Port Static RAM Industrial and Commercial Temperature Ranges
3
DC Electrical Characteristics Over the Operating
Temperature and Supply Voltage Range
(V
CC
= 3.3V 0.3)
Recommended DC Operating
Conditions
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may
cause permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated
in the operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect reliability.
2. V
TERM
must not exceed V
CC
+ 10% for more than 25% of the cycle time or 10ns
maximum, and is limited to < 20mA for the period of V
TERM
> V
cc
+ 10%.
Absolute Maximum Ratings
(1)
Maximum Operating Temperature
and Supply Voltage
(1,2)
NOTES:
1. These parameters are determined by device characterization, but are not
production tested.
2. 3dV references the interpolated capacitance when the input and output switch
from 0V to 3V or from 3V to 0V.
Capacitance
(T
A
= +25C, f = 1.0MH
z
)
TQFP Only
NOTES:
1. This is the parameter T
A
. This is the "instant on" case temperature.
NOTES:
1. V
IL
> -1.5V for pulse width less than 10ns.
2. V
TERM
must not exceed V
CC
+ 0.3V.
NOTE:
1. At V
CC
< 2.0V, input leakages are undefined
Symbol
Rating
Commercial
& Industrial
Unit
V
TERM
(2)
Terminal Voltage
with Respect to GND
-0.5 to +4.6
V
V
TERM
(2)
Terminal Voltage
-0.5 to V
CC
V
T
BIAS
Temperature
Under Bias
-55 to +125
o
C
T
STG
Storage
Temperature
-65 to +150
o
C
I
OUT
DC Output Current
50
mA
5616 tbl 01
Grade
Ambient Temperature
GND
V
CC
Commercial
0
O
C to +70
O
C
0V
3.3V 0.3
Industrial
-40
O
C to +85
O
C
0V
3.3V 0.3
5616 tbl 02
Sym bol
Param eter
Min.
Typ.
Max.
Unit
V
CC
Supply Voltage
3.0
3.3
3.6
V
GND
Ground
0
0
0
V
V
IH
Input High Voltage
2.2
____
V
CC
+0.3
(2)
V
V
IL
Input Low Voltage
-0.3
(1)
____
0.8
V
5616 tbl 03
Symbol
Parameter
Conditions
Max.
Unit
C
IN
Input Capacitance
V
IN
= 3dV
8
pF
C
OUT
Output Capacitance
V
OUT
= 3dV
9
pF
5616 tbl 04
Symbol
Parameter
Test Conditions
70V914S
Unit
Min.
Max.
|I
LI
|
Input Leakage Current
(1)
V
CC
= 3.6V, V
IN
= 0V to V
CC
___
10
A
|I
LO
|
Output Leakage Current
CE = V
IH
, V
OUT
= 0V to V
CC
___
10
A
V
OL
Output Low Voltage
I
OL
= +4mA
___
0.4
V
V
OH
Output High Voltage
I
OH
= -4mA
2.4
___
V
5616 tbl 05
6.42
IDT70V914S
High-Speed 3.3V
(4K x 9) Synchronous Dual-Port Static RAM Industrial and Commercial Temperature Ranges
4
DC Electrical Characteristics Over the Operating
Temperature and Supply Voltage Range
(4)
(V
CC
= 3.3V 0.3V)
NOTES:
1. At f
MAX
, address and control lines (except Output Enable) are cycling at the maximum frequency clock cycle of 1/t
CYC
, using "AC TEST CONDITIONS" at input levels
of GND to 3V.
2. f = 0 means no address, clock, or control lines change. Applies only to input at CMOS level standby.
3. Port "A" may be either left or right port. Port "B" is the opposite from port "A".
4. Vcc = 3.3V, T
A
= 25C for Typ, and are not production tested. I
CC DC
= 150mA (Typ).
70V914S20
Com'l
& Ind
70V914S25
Com'l
& Ind
Symbol
Parameter
Test Condition
Version
Typ.
(2)
Max.
Typ.
(2)
Max.
Unit
I
CC
Dynamic Operating
Current
(Both Ports Active)
CE
L
and
CE
R
= V
IL
,
Outputs Disabled
f = f
MAX
(1)
COM'L
80
140
75
130
mA
IND
80
200
75
190
I
SB1
Standby Current
(Both Ports - TTL
Level Inputs)
CE
L
and
CE
R
= V
IH
f = f
MAX
(1)
COM'L
30
55
25
50
mA
IND
30
85
25
80
I
SB2
Standby Current
(One Port - TTL
Level Inputs)
CE
"A"
= V
IL
and
CE
"B"
= V
IH
(3)
Active Port Outputs
Disabled, f=f
MAX
(1)
COM'L
55
85
45
80
mA
IND
55
100
45
95
I
SB3
Full Standby
Current (Both
Ports - All CMOS
Level Inputs)
Both Ports
CE
R
and
CE
L
> V
CC
- 0.2V
V
IN
> V
CC
- 0.2V or
V
IN
< 0.2V, f = 0
(2)
COM'L
3
15
3
15
mA
IND
3
15
3
15
I
SB4
Full Standby
Current (One
Port - All CMOS
Level Inputs)
CE
"A"
< 0.2V and
CE
"B"
> V
CC
- 0.2V
(3)
V
IN
> V
CC
- 0.2V or
V
IN
< 0.2V, Active Port
Outputs Disabled
f = f
MAX
(1)
COM'L
55
85
45
80
mA
IND
55
100
45
95
5616 tbl 06
6.42
IDT70V914S
High-Speed 3.3V
(4K x 9) Synchronous Dual-Port Static RAM Industrial and Commercial Temperature Ranges
5
Figure 3. Typical Output Derating (Lumped Capacitive Load).
Figure 1. AC Output Test load.
Figure 2. Output Test Load
(For t
CKLZ
, t
CKHZ
, t
OLZ
, and t
OHZ
)
*Including scope and jig.
AC Test Conditions
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
Output Load
GND to 3.0V
3ns Max.
1.5V
1.5V
Figures 1,2 and 3
5616 tbl 07
5616 drw 04
540
30pF
435
3.3V
DATA
OUT
540
5pF*
435
3.3V
DATA
OUT
5616 drw 03
1
2
3
4
5
6
7
8
20 40
100
60 80
120 140 160 180 200
tCD
(Typical, ns)
Capacitance (pF)
5616 drw 05
-1
0
- 9pF is the I/O capacitance
of this device, and 30pF is the
AC Test Load Capacitance
,
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