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Электронный компонент: 71016

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FEBRUARY 2001
DSC-3210/7
1
2000 Integrated Device Technology, Inc.
Features
x
x
x
x
x
64K x 16 advanced high-speed CMOS Static RAM
x
x
x
x
x
Equal access and cycle times
Commercial and Industrial: 12/15/20ns
x
x
x
x
x
One Chip Select plus one Output Enable pin
x
x
x
x
x
Bidirectional data inputs and outputs directly TTL-
compatible
x
x
x
x
x
Low power consumption via chip deselect
x
x
x
x
x
Upper and Lower Byte Enable Pins
x
x
x
x
x
Commercial and industrial product available in 44-pin
Plastic SOJ package and 44-pin TSOP package
Description
The IDT71016 is a 1,048,576-bit high-speed Static RAM organized
as 64K x 16. It is fabricated using IDT's high-perfomance, high-reliability
CMOS technology. This state-of-the-art technology, combined with
innovative circuit design techniques, provides a cost-effective solution for
high-speed memory needs.
The IDT71016 has an output enable pin which operates as fast as 7ns,
with address access times as fast as 12ns. All bidirectional inputs and
outputs of the IDT71016 are TTL-compatible and operation is from a single
5V supply. Fully static asynchronous circuitry is used, requiring no clocks
or refresh for operation.
The IDT71016 is packaged in a JEDEC standard 44-pin Plastic SOJ
and 44-pin TSOP Type II.
Functional Block Diagram
Output
Enable
Buffer
Address
Buffers
Chip
Enable
Buffer
Write
Enable
Buffer
Byte
Enable
Buffers
OE
A0 - A15
Row / Column
Decoders
CS
WE
BHE
BLE
64K x 16
Memory
Array
Sense
Amps
and
Write
Drivers
16
Low
Byte
I/O
Buffer
8
8
8
8
I/O 8
I/O 15
I/O 7
I/O 0
3210 drw 01
High
Byte
I/O
Buffer
,
CMOS Static RAM
1 Meg (64K x 16-Bit)
IDT71016
6.42
2
IDT71016, CMOS Static RAM
1 Meg (64K x 16-bit) Commercial and Industrial Temperature Ranges
Pin Configurations
SOJ/TSOP
Top View
Truth Table
(1)
Pin Descriptions
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
I/O 7
NC
A12
A13
A14
A15
WE
I/O 6
I/O 5
I/O 4
V
SS
V
CC
I/O 3
I/O 2
I/O 1
I/O 0
CS
A0
A1
A2
A3
A4
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A6
A7
OE
BHE
BLE
I/O 15
I/O 14
I/O 13
I/O 12
V
SS
V
CC
I/O 11
I/O 10
I/O 9
I/O 8
A8
A9
A10
A11
NC
A5
NC
SO44-1
SO44-2
3210 drw 02
,
A
0
- A
15
Address Inputs
Input
CS
Chip Select
Input
WE
Write Enable
Input
OE
Output Enable
Input
BHE
High Byte Enable
Input
BLE
Low Byte Enable
Input
I/O
0
- I/O
15
Data Input/Output
I/O
V
CC
5.0V Power
Pwr
V
SS
Ground
Gnd
3210 tbl 01
NOTE:
1. H = V
IH
, L = V
IL
, X = Don't care.
CS
OE
WE
BLE
BHE
I/O
0
- I/O
7
I/O
8
- I/O
15
Function
H
X
X
X
X
High-Z
High-Z
Deselected - Standby
L
L
H
L
H
DATAOUT
High-Z
Low Byte Read
L
L
H
H
L
High-Z
DATAOUT
High Byte Read
L
L
H
L
L
DATAOUT
DATAOUT`
Word Read
L
X
L
L
L
DATAIN
DATAIN
Word Write
L
X
L
L
H
DATAIN
High-Z
Low Byte Write
L
X
L
H
L
High-Z
DATAIN
High Byte Write
L
H
H
X
X
High-Z
High-Z
Outputs Disabled
L
X
X
H
H
High-Z
High-Z
Outputs Disabled
3210 tbl 02
6.42
IDT71016, CMOS Static RAM
1 Meg (64K x 16-bit) Commercial and Industrial Temperature Ranges
3
DC Electrical Characteristics
(1)
(V
CC
= 5.0V 10%, V
LC
= 0.2V, V
HC
= V
CC
0.2V)
Absolute Maximum Ratings
(1)
Capacitance
(T
A
= +25 C, f = 1.0MHz, SOJ Package)
Recommended DC Operating
Conditions
DC Electrical Characteristics
(V
CC
= 5.0V 10%, Commercial and Industrial Temperature Range)
NOTE:
1. V
IL
(min.) = 1.5V for pulse width less than tRC/2, once per cycle.
Symbol
Parameter
Min.
Typ.
Max.
Unit
V
CC
Supply Voltage
4.5
5.0
5.5
V
GND
Ground
0
0
0
V
V
IH
Input High Voltage
2.2
____
V
DD
+0.5
V
V
IL
Input Low Voltage
-0.5
(1)
____
0.8
V
3210 tbl 05
NOTE:
1. This parameter is guaranteed by device characterization, but not production
tested.
Symbol
Parameter
(1)
Conditions
Max.
Unit
C
IN
Input Capacitance
V
IN
= 3dV
6
pF
C
I/O
I/O Capacitance
V
OUT
= 3dV
7
pF
3210 tbl 06
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may
cause permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
2. V
TERM
must not exceed V
CC
+ 0.5V.
Symbol
Rating
Value
Unit
V
TERM
(2)
Terminal Voltage with
Respect to GND
-0.5 to +7.0
V
T
A
Operating Temperature
0 to +70
o
C
T
BIAS
Temperature
Under Bias
-55 to +125
o
C
T
STG
Storage
Temperature
-55 to +125
o
C
P
T
Power Dissipation
1.25
W
I
OUT
DC Output Current
50
mA
3210 tbl 03
Symbol
Parameter
Test Conditions
Min.
Max.
Unit
|I
LI
|
Input Leakage Current
V
CC
= Max., V
IN
= GND to V
CC
___
5
A
|I
LO
|
Output Leakage Current
V
CC
= Max.,
CS = V
IH
, V
OUT
= GND to V
CC
___
5
A
V
OL
Output Low Voltage
I
OL
= 8mA, V
CC
= Min.
___
0.4
V
V
OH
Output High Voltage
I
OH
= -4mA, V
CC
= Min.
2.4
___
V
3210 tbl 07
NOTES:
1. All values are maximum guaranteed values.
2. f
MAX
= 1/t
RC
(all address inputs are cycling at f
MAX
); f = 0 means no address input lines are changing
.
71016S12
71016S15
71016S20
Symbol
Parameter
Com'l.
Ind.
Com'l.
Ind.
Com'l.
Ind.
Unit
I
CC
Dynamic Operating Current
CS < V
IL
, Outputs Open, V
CC
= Max., f = f
MAX
(2)
210
210
180
180
170
170
mA
I
SB
Standby Power Supply Current (TTL Level)
CS > V
IH
, Outputs Open, V
CC
= Max., F = f
MAX
(2)
60
60
50
50
45
45
mA
I
SB1
Standby Power Supply Current (CMOS Level)
CS > V
HC
, Outputs Open, V
CC
= Max., f = 0
(2)
V
IN
< V
LC
or V
IN
> V
HC
10
10
10
10
10
10
mA
3210 tbl 08
Grade
Temperature
GND
V
CC
Commercial
0C to +70C
0V
5.0V 10%
Industrial
40C to +85C
0V
5.0V 10%
3210 tbl 04
Recommended Operating
Temperature and Supply Voltage
6.42
4
IDT71016, CMOS Static RAM
1 Meg (64K x 16-bit) Commercial and Industrial Temperature Ranges
AC Test Conditions
Figure 1. AC Test Load
Figure 2. AC Test Load
(for t
CLZ
, t
OLZ
, t
CHZ
, t
OHZ
, t
OW,
and t
WHZ
)
*Including jig and scope capacitance.
Figure 3. Output Capacitive Derating
AC Test Loads
1
2
3
4
5
6
7
20 40
60 80 100 120 140 160 180 200
t
AA,
t
ACS
(Typical, ns)
CAPACITANCE (pF)
8
3210 drw 05
,
3210 drw 04
480
255
5pF*
DATA
OUT
5V
,
480
255
30pF*
DATA
OUT
5V
3210 drw 03
,
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
AC Test Load
GND to 3.0V
1.5ns
1.5V
1.5V
See Figure 1, 2 and 3
3210 tbl 09
6.42
IDT71016, CMOS Static RAM
1 Meg (64K x 16-bit) Commercial and Industrial Temperature Ranges
5
Timing Waveform of Read Cycle No. 1
(1,2,3)
NOTES:
1.
WE is HIGH for Read Cycle.
2. Device is continuously selected,
CS is LOW.
3.
OE, BHE, and BLE are LOW.
AC Electrical Characteristics
(
V
CC = 5.0V 10%,
Commercial and Industrial Range
)
DATA
OUT
ADDRESS
3210 drw 06
t
RC
t
AA
t
OH
t
OH
DATA
OUT
VALID
PREVIOUS DATA
OUT
VALID
,
NOTE:
1. This parameter is guaranteed with the AC Load (Figure 2) by device characterization, but is not production tested.
71016S12
71016S15
71016S20
Symbol
Parameter
Min.
Max.
Min.
Max.
Min.
Max.
Unit
READ CYCLE
t
RC
Read Cycle Time
12
____
15
____
20
____
ns
t
AA
Address Access Time
____
12
____
15
____
20
ns
t
ACS
Chip Select Access Time
____
12
____
15
____
20
ns
t
CLZ
(1)
Chip Select Low to Output in Low-Z
4
____
5
____
5
____
ns
t
CHZ
(1)
Chip Select High to Output in High-Z
____
6
____
6
____
8
ns
t
OE
Output Enable Low to Output Valid
____
7
____
8
____
10
ns
t
OLZ
(1)
Output Enable Low to Output in Low-Z
0
____
0
____
0
____
ns
t
OHZ
(1)
Output Enable High to Output in High-Z
____
6
____
6
____
8
ns
t
OH
Output Hold from Address Change
4
____
4
____
5
____
ns
t
BE
Byte Enable Low to Output Valid
____
7
____
8
____
10
ns
t
BLZ
(1)
Byte Enable Low to Output in Low-Z
0
____
0
____
0
____
ns
t
BHZ
(1)
Byte Enable High to Output in High-Z
____
6
____
6
____
8
ns
WRITE CYCLE
t
WC
Write Cycle Time
12
____
15
____
20
____
ns
t
AW
Address Valid to End of Write
9
____
10
____
12
____
ns
t
CW
Chip Select Low to End of Write
9
____
10
____
12
____
ns
t
BW
Byte Enable Low to End of Write
9
____
10
____
12
____
ns
t
AS
Address Set-up Time
0
____
0
____
0
____
ns
t
WR
Address Hold from End of Write
0
____
0
____
0
____
ns
t
WP
Write Pulse Width
9
____
10
____
12
____
ns
t
DW
Data Valid to End of Write
7
____
8
____
10
____
ns
t
DH
Data Hold Time
0
____
0
____
0
____
ns
t
OW
(1)
Write Enable High to Output in Low-Z
1
____
1
____
1
____
ns
t
WHZ
(1)
Write Enable Low to Output in High-Z
____
6
____
6
____
8
ns
3210 tbl 10