FEBRUARY 2001
DSC-2966/08
1
2000 Integrated Device Technology, Inc.
Features
x
x
x
x
x
256K x 4 advanced high-speed CMOS static RAM
x
x
x
x
x
Equal access and cycle times
-- Commercial and Industrial: 12/15/20ns
x
x
x
x
x
One Chip Select plus one Output Enable pin
x
x
x
x
x
Bidirectional data inputs and outputs directly
TTL-compatible
x
x
x
x
x
Low power consumption via chip deselect
x
x
x
x
x
Available in 400 mil Plastic SOJ package.
Description
The IDT71028 is a 1,048,576-bit high-speed static RAM orga-
nized as 256K x 4. It is fabricated using IDT's high-perfomance, high-
reliability CMOS technology. This state-of-the-art technology, com-
bined with innovative circuit design techniques, provides a cost-
effective solution for high-speed memory needs.
The IDT71028 has an output enable pin which operates as fast
as 6ns, with address access times as fast as 12ns. All bidirectional
inputs and outputs of the IDT71028 are TTL-compatible and oper-
ation is from a single 5V supply. Fully static asynchronous circuitry
is used, requiring no clocks or refresh for operation.
The IDT71028 is packaged in a 28-pin 400 mil Plastic SOJ.
Functional Block Diagram
A
17
A
0
I/O CONTROL
I/O
0
I/O
3
CONTROL
LOGIC
WE
OE
CS
2966 drw 01
4
4
ADDRESS
DECODER
1,048,576-BIT
MEMORY
ARRAY
CMOS Static RAM
1 Meg (256K x 4-Bit)
IDT71028
6.42
2
IDT71028 CMOS Static RAM
1 Meg (256K x 4-Bit) Commercial and Industrial Temperature Ranges
Symbol
Parameter
Min.
Typ.
Max.
Unit
V
CC
Supply Voltage
4.5
5.0
5.5
V
GND
Ground
0
0
0
V
V
IH
Input High Voltage
2.2
____
V
CC
+0.5
V
V
IL
Input Low Voltage
0.5
(1)
____
0.8
V
2966 tbl 04
Recommended DC Operating
Conditions
Absolute Maximum Ratings
(1)
Pin Configuration
Capacitance
(T
A
= +25C, f = 1.0MHz, SOJ package)
SOJ
Top View
Truth Table
(1,2)
5
6
7
8
9
12
13
14
GND
A
0
A
1
A
2
1
2
3
4
28
27
26
25
24
23
22
21
20
17
16
15
SO28-6
A
3
A
4
A
5
A
7
A
17
A
16
A
15
A
14
NC
A
13
OE
WE
I/O
0
2966 drw 02
A
8
10
19
A
12
A
9
11
18
A
11
A
10
V
CC
A
6
CS
I/O
1
I/O
2
I/O
3
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. V
TERM
must not exceed V
CC
+ 0.5V.
NOTE:
1. This parameter is guaranteed by device characterization, but not production tested.
NOTE:
1. V
IL
(min.) = 1.5V for pulse width less than 10ns, once per cycle.
NOTES:
1. H = V
IH
, L = V
IL
, x = Don't care.
2. V
LC
= 0.2V, V
HC
= V
CC
-0.2V.
3. Other inputs
V
HC
or
V
LC
.
CS
OE
WE
I/O
Function
L
L
H
DATA
OUT
Read Data
L
X
L
DATA
IN
Write Data
L
H
H
High-Z
Output Disabled
H
X
X
High-Z
Deselected Standby (I
SB
)
V
HC
(3)
X
X
High-Z
Deselected Standby (I
SB1
)
2966 tbl 01
Symbol
Rating
Value
Unit
V
TERM
(2)
Terminal Voltage with Respect to GND
0.5 to +7.0
V
T
A
Operating Temperature
0 to +70
o
C
T
BIAS
Temperature Under Bias
55 to +125
o
C
T
STG
Storage Temperature
55 to +125
o
C
P
T
Power Dissipation
1.25
W
I
OUT
DC Output Current
50
mA
2966 tbl 02
Symbol
Parameter
(1)
Conditions
Max.
Unit
C
IN
Input Capacitance
V
IN
= 3dV
8
pF
C
I/O
I/O Capacitance
V
OUT
= 3dV
8
pF
2966 tbl 03
Recommended Operating
Temperature and Supply Voltage
Grade
Temperature
V
SS
V
SS
Commercial
0
O
C to +70
O
C
0V
5.0V 10%
Industrial
40
O
C to +85
O
C
0V
5.0V 10%
2966 tbl 05
6.42
IDT71028 CMOS Static RAM
1 Meg (256K x 4-Bit) Commercial and Industrial Temperature Ranges
3
71028S12
71028S15
71028S20
Symbol
Parameters
Com'l.
Ind.
Com'l.
Ind.
Com'l.
Ind.
Unit
I
CC
Dynamic Operating Current,
CS
V
IL
, Outputs Open,
V
CC
= Max., f = f
MAX
(2)
155
170
150
165
145
160
mA
I
SB
Standby Power Supply Current (TTL Level)
CS
V
IH
, Outputs Open,
V
CC
= Max., f=f
MAX
(2)
40
40
40
40
40
40
mA
I
SB1
Full Standby Power Supply Current
(CMOS Level),
CS
V
HC
, Outputs Open,
V
CC
= Max., f = 0
(2)
, V
IN
V
LC
or V
IN
V
HC
10
10
10
10
10
10
mA
2966 tbl 07
Symbol
Parameter
Test Condition
IDT71028
Unit
Min.
Max.
|I
LI
|
Input Leakage Current
V
CC
= Max., V
IN
= GND to V
CC
___
5
A
|I
LO
|
Output Leakage Current
V
CC
= Max.,
CS = V
IH
, V
OUT
= GND to V
CC
___
5
A
V
OL
Output Low Voltage
I
OL
= 8mA, V
CC
= Min.
___
0.4
V
V
OH
Output High Voltage
I
OH
= 4mA, V
CC
= Min.
2.4
___
V
2966 tbl 06
DC Electrical Characteristics
(1)
(V
CC
= 5.0V 10%, V
LC
= 0.2V, V
HC
= V
CC
0.2V)
*Including jig and scope capacitance.
AC Test Conditions
Figure 1. AC Test Load
Figure 2. AC Test Load
(for t
CLZ
, t
OLZ
, t
CHZ
, t
OHZ
, t
OW,
and t
WHZ
)
DC Electrical Characteristics
(V
CC
= 5.0V 10%, Commercial and Industrial Temperature Ranges)
2966 drw 03
480
255
30pF
DATA
OUT
5V
2966 drw 04
480
255
5pF*
DATA
OUT
5V
AC Test Loads
NOTES:
1. All values are maximum guaranteed values.
2. f
MAX
= 1/t
RC
(all address inputs are cycling at f
MAX
)
;
f = 0 means no address input lines are changing.
Input Pulse Levels
GND to 3.0V
Input Rise/Fall Times
3ns
Input Timing Reference Levels
1.5V
Output Reference Levels
1.5V
AC Test Load
See Figures 1 and 2
2966 tbl 08
6.42
4
IDT71028 CMOS Static RAM
1 Meg (256K x 4-Bit) Commercial and Industrial Temperature Ranges
71028S12
71028S15
71028S20
Symbol
Parameter
Min.
Max.
Min.
Max.
Min.
Max.
Unit
Read Cycle
t
RC
Read Cycle Time
12
--
15
--
20
--
ns
t
AA
Address Access Time
--
12
--
15
--
20
ns
t
ACS
Chip Select Access Time
--
12
--
15
--
20
ns
t
CLZ
(1)
Chip Select to Output in Low-Z
3
--
3
--
3
--
ns
t
CHZ
(1)
Chip Deselect to Output in High-Z
0
6
0
7
0
8
ns
t
OE
Output Enable to Output Valid
--
6
--
7
--
8
ns
t
OLZ
(1)
Output Enable to Output in Low-Z
0
--
0
--
0
--
ns
t
OHZ
(1)
Output Disable to Output in High-Z
0
5
0
5
0
7
ns
t
OH
Output Hold from Address Change
4
--
4
--
4
--
ns
t
PU
(1)
Chip Select to Power-Up Time
0
--
0
--
0
--
ns
t
PD
(1)
Chip Deselect to Power-Down Time
--
12
--
15
--
20
ns
Write Cycle
t
WC
Write Cycle Time
12
--
15
--
20
--
ns
t
AW
Address Valid to End-of-Write
10
--
12
--
15
--
ns
t
CW
Chip Select to End-of-Write
10
--
12
--
15
--
ns
t
AS
Address Set-Up Time
0
--
0
--
0
--
ns
t
WP
Write Pulse Width
10
--
12
--
15
--
ns
t
WR
Write Recovery Time
0
--
0
--
0
--
ns
t
DW
Data Valid to End-of-Write
7
--
8
--
9
--
ns
t
DH
Data Hold Time
0
--
0
--
0
--
ns
t
OW
(1)
Output Active from End-of-Write
3
--
3
--
4
--
ns
t
WHZ
(1)
Write Enable to Output in High-Z
0
5
0
5
0
8
ns
2966 tbl 09
AC Electrical Characteristics
(V
CC
= 5.0V 10%, Commercial and Industrial Temperature Ranges)
NOTE:
1. This parameter guaranteed with the AC load (Figure 2) by device characterization, but is not production tested.
6.42
IDT71028 CMOS Static RAM
1 Meg (256K x 4-Bit) Commercial and Industrial Temperature Ranges
5
Timing Waveform of Read Cycle No. 1
(1)
Timing Waveform of Read Cycle No. 2
(1,2,4)
NOTES:
1.
WE is HIGH for Read Cycle.
2. Device is continuously selected,
CS is LOW.
3. Address must be valid prior to or coincident with the later of
CS transition LOW; otherwise t
AA
is the limiting parameter.
4.
OE is LOW.
5. Transition is measured 200mV from steady state.
DATA
OUT
ADDRESS
2966 drw 06
t
RC
t
AA
t
OH
t
OH
DATA
OUT
VALID
PREVIOUS DATA
OUT
VALID
ADDRESS
2966 drw 05
OE
CS
DATA
OUT
(5)
(5)
(5)
(5)
DATA
OUT
VALID
HIGH IMPEDANCE
t
AA
t
RC
t
OE
t
ACS
t
OLZ
t
CHZ
t
CLZ
(3)
t
OHZ
V
CC
SUPPLY
CURRENT
t
PU
t
PD
I
CC
I
SB
PDF 
ZIP