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Электронный компонент: 7140

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1
JUNE 2000
DSC-2689/10
2000 Integrated Device Technology, Inc.
I/O
Control
Address
Decoder
MEMORY
ARRAY
ARBITRATION
and
INTERRUPT
LOGIC
Address
Decoder
I/O
Control
R/
W
L
CE
L
OE
L
BUSY
L
A
9L
A
0L
2689 drw 01
I/O
0L
- I/O
7L
CE
L
OE
L
R/
W
L
INT
L
BUSY
R
I/O
0R
-I/O
7R
A
9R
A
0R
INT
R
CE
R
OE
R
(2)
(1,2)
(1,2)
(2)
R/
W
R
CE
R
OE
R
10
10
R/
W
R
,
HIGH SPEED
1K X 8 DUAL-PORT
STATIC SRAM
IDT7130SA/LA
IDT7140SA/LA
Features
x
x
x
x
x
High-speed access
Military: 25/35/55/100ns (max.)
Industrial: 55/100ns (max.)
Commercial: 20/25/35/55/100ns (max.)
x
x
x
x
x
Low-power operation
IDT7130/IDT7140SA
--
Active: 550mW (typ.)
--
Standby: 5mW (typ.)
IDT7130/IDT7140LA
--
Active: 550mW (typ.)
--
Standby: 1mW (typ.)
x
x
x
x
x
MASTER IDT7130 easily expands data bus width to 16-or-
more-bits using SLAVE IDT7140
Functional Block Diagram
NOTES:
1.
IDT7130 (MASTER):
BUSY is open drain output and requires pullup resistor.
IDT7140 (SLAVE):
BUSY is input.
2.
Open drain output: requires pullup resistor.
x
x
x
x
x
On-chip port arbitration logic (IDT7130 Only)
x
x
x
x
x
BUSY output flag on IDT7130; BUSY input on IDT7140
x
x
x
x
x
INT flag for port-to-port communication
x
x
x
x
x
Fully asynchronous operation from either port
x
x
x
x
x
Battery backup operation2V data retention (LA only)
x
x
x
x
x
TTL-compatible, single 5V 10% power supply
x
x
x
x
x
Military product compliant to MIL-PRF-38535 QML
x
x
x
x
x
Industrial temperature range (40C to +85C) is available
for selected speeds
x
x
x
x
x
Available in 48-pin DIP and LCC, 52-pin PLCC, and 64-pin
STQFP and TQFP
IDT7130SA/LA and IDT7140SA/LA
High-Speed 1K x 8 Dual-Port Static SRAM Military, Industrial and Commercial Temperature Ranges
2
Description
The IDT7130/IDT7140 are high-speed 1K x 8 Dual-Port Static
RAMs. The IDT7130 is designed to be used as a stand-alone 8-bit
Dual-Port RAM or as a "MASTER" Dual-Port RAM together with the
IDT7140 "SLAVE" Dual-Port in 16-bit-or-more word width systems.
Using the IDT MASTER/SLAVE Dual-Port RAM approach in 16-or-
more-bit memory system applications results in full-speed, error-
free operation without the need for additional discrete logic.
Both devices provide two independent ports with separate con-
trol, address, and I/O pins that permit independent asynchronous
access for reads or writes to any location in memory. An automatic
power down feature, controlled by
CE, permits the on chip circuitry
of each port to enter a very low standby power mode.
Fabricated using IDT's CMOS high-performance tech-nology,
these devices typically operate on only 550mW of power. Low-
power (LA) versions offer battery backup data retention capability,
with each Dual-Port typically consuming 200W from a 2V battery.
The IDT7130/IDT7140 devices are packaged in 48-pin sidebraze
or plastic DIPs, LCCs, flatpacks, 52-pin PLCC, and 64-pin TQFP
and STQFP. Military grade products are manufactured in compli-
ance with the latest revision of MIL-PRF-38535 QML, making it
ideally suited to military temperature applications demanding the
highest level of performance and reliability.
Pin Configurations
(1,2,3)
NOTES:
1. All V
CC
pins must be connected to power supply.
2. All GND pins must be connected to ground supply.
3. P48-1 package body is approximately .55 in x .61 in x .19 in.
C48-2 package body is approximately .62 in x 2.43 in x .15 in.
L48-1 package body is approximately .57 in x .57 in x .68 in.
F48-1 package body is approximately .75 in x .75 in x .11 in.
4. This package code is used to reference the package diagram.
5. This text does not indicate orientation of the actual part-marking.
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
IDT7130/40
P or C
P48-1
(4)
&
C48-2
(4)
48-Pin
DIP
Top View
(5)
2689 drw 02
GND
I/O
6R
I/O
5R
I/O
4R
I/O
3R
I/O
2R
I/O
1R
I/O
0R
I/O
7L
I/O
6L
I/O
5L
I/O
4L
CE
R
CE
L
OE
L
A
0L
INT
L
BUSY
L
R/
W
L
R/
W
R
BUSY
R
INT
R
V
CC
OE
R
A
0R
A
1R
A
2R
A
3R
A
4R
A
5R
A
6R
A
7R
A
8R
A
9R
I/O
7R
I/O
3L
A
1L
A
2L
A
3L
A
4L
A
5L
A
6L
A
7L
A
8L
A
9L
I/O
0L
I/O
1L
I/O
2L
,
IDT7130/40L48 or F
L48-1
(4)
&
F48-1
(4)
48-Pin LCC/ Flatback
Top View
(5)
INDEX
6 5
4 3
2
1
48 47 46 45 44 43
28 29 30
42
41
40
39
38
37
36
35
34
33
32
31
7
8
9
10
11
12
13
14
15
16
17
18
2689 drw 03
G
N
D
C
E
R
C
E
L
O
E
L
A
0
L
O
E
R
A
0R
A
1R
A
2R
A
3R
A
4R
A
5R
A
6R
A
7R
A
8R
A
9R
I/O
7R
I
/
O
3
L
A
1L
A
2L
A
3L
A
4L
A
5L
A
6L
A
7L
A
8L
A
9L
I/O
0L
I/O
1L
I/O
2L
I
N
T
L
B
U
S
Y
L
R
/
W
L
R
/
W
R
B
U
S
Y
R
I
N
T
R
V
C
C
I/O
6R
I
/
O
5
R
I
/
O
4
R
I
/
O
3
R
I
/
O
2
R
I
/
O
1
R
I
/
O
0
R
I
/
O
7
L
I
/
O
6
L
I
/
O
5
L
I
/
O
4
L
25 26
19 20 21 22 23 24
27
,
3
IDT7130SA/LA and IDT7140SA/LA
High-Speed 1K x 8 Dual-Port Static SRAM Military, Industrial and Commercial Temperature Ranges
INDEX
IDT7130/40TF or PF
PP64-1 & PN64-1
(4)
64-Pin STQFP
64-Pin TQFP
Top View
(5)
8
9
10
11
12
13
14
15
16
1
2
3
4
5
6
7
46
45
44
43
42
41
40
39
38
37
36
35
34
47
48
33
I/O
6R
N/C
A
0R
A
1R
A
2R
A
3R
A
4R
A
5R
A
6R
A
7R
A
8R
A
9R
I/O
7R
OE
R
N/C
N/C
I/O
2L
A
0L
OE
L
A
1L
A
2L
A
3L
A
4L
A
5L
A
6L
A
7L
A
8L
A
9L
I/O
0L
I/O
1L
N/C
N/C
2689 drw 05
1
7
1
8
1
9
2
0
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
4
9
5
0
5
1
5
2
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
6
4
N
/
C
N
/
C
N
/
C
N
/
C
N
/
C
N
/
C
G
N
D
N
/
C
N
/
C
G
N
D
N
/
C
R
/
W
R
C
E
R
V
C
C
V
C
C
B
U
S
Y
L
I
N
T
L
I
/
O
3
L
I
/
O
4
L
I
/
O
5
L
I
/
O
6
L
I
/
O
7
L
I
/
O
0
R
I
/
O
1
R
I
/
O
2
R
I
/
O
3
R
I
/
O
4
R
I
/
O
5
R
R
/
W
L
C
E
L
B
U
S
Y
R
I
N
T
R
,
IDT7130/40J
J52-1
(4)
52-Pin PLCC
Top View
(5)
INDEX
N
/
C
G
N
D
N
/
C
N
/
C
C
E
R
C
E
L
O
E
L
A
0
L
OE
R
A
0R
A
1R
A
2R
A
3R
A
4R
A
5R
A
6R
A
7R
A
8R
A
9R
N/C
I/O
7R
46
45
44
43
42
41
40
39
38
37
36
35
34
I/O
3L
A
1L
A
2L
A
3L
A
4L
A
5L
A
6L
A
7L
A
8L
A
9L
I/O
0L
I/O
1L
I/O
2L
8
9
10
11
12
13
14
15
16
17
18
19
20
47
48
49
50
51
52
1
2
3
4
5
6
7
33
32
31
30
29
28
27
26
25
24
23
22
21
2689 drw 04
I
N
T
L
B
U
S
Y
L
R
/
W
L
R
/
W
R
B
U
S
Y
R
I
N
T
R
I
/
O
6
R
V
C
C
I
/
O
5
R
I
/
O
4
R
I
/
O
3
R
I
/
O
2
R
I
/
O
1
R
I
/
O
0
R
I
/
O
7
L
I
/
O
6
L
I
/
O
5
L
I
/
O
4
L
Pin Configurations
(1,2,3)
(con't.)
NOTES:
1. All V
CC
pins must be connected to power supply.
2. All GND pins must be connected to ground supply.
3. J52-1 package body is approximately .75 in x .75 in x .17 in.
PP64-1 package body is approximately 10 mm x 10 mm x 1.4mm.
PN64-1 package body is approximately 14mm x 14mm x 1.4mm.
4. This package code is used to reference the package diagram.
5. This text does not indicate orientation of the actual part-marking.
IDT7130SA/LA and IDT7140SA/LA
High-Speed 1K x 8 Dual-Port Static SRAM Military, Industrial and Commercial Temperature Ranges
4
Absolute Maximum Ratings
(1)
Recommended DC Operating
Conditions
Recommended Operating
Temperature and Supply Voltage
(1,2)
DC Electrical Characteristics Over the Operating
Temperature and Supply Voltage Range
(V
CC
= 5.0V 10%)
NOTES:
1. This parameter is determined by device characterization but is not production
tested.
2.
3dV references the interpolated capacitance when the input and output signals
switch from 0V to 3V or from 3V to 0V.
Capacitance
(T
A
= +25C, f = 1.0MHz)
STQFP and TQFP Packages Only
NOTE:
1. At Vcc
<
2.0V leakages are undefined.
NOTES:
1.
Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may
cause permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in
the operational sections of the specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect reliability.
2.
V
TERM
must not exceed Vcc + 10% for more than 25% of the cycle time or 10ns
maximum, and is limited to < 20mA for the period of V
TERM
> Vcc + 10%.
NOTES:
1.
V
IL
(min.) > -1.5V for pulse width less than 10ns.
2.
V
TERM
must not exceed Vcc + 10%.
NOTES:
1. This is the parameter T
A
. This is the "instant on" case temperature.
2.
Industrial temperature: for specific speeds, packages and powers contact your
sales office.
Symbol
Rating
Commercial
& Industrial
Military
Unit
V
TERM
(2)
Terminal Voltage
with Respect
to GND
-0.5 to +7.0
-0.5 to +7.0
V
T
BIAS
Temperature
Under Bias
-55 to +125
-65 to +135
o
C
T
STG
Storage
Temperature
-65 to +150
-65 to +150
o
C
I
OUT
DC Output
Current
50
50
mA
2689 tbl 01
Symbol
Parameter
Min.
Typ.
Max.
Unit
V
CC
Supply Voltage
4.5
5.0
5.5
V
GND
Ground
0
0
0
V
V
IH
Input High Voltage
2.2
____
6.0
(2)
V
V
IL
Input Low Voltage
-0.5
(1)
____
0.8
V
2689 tbl 02
Grade
Ambient
Temperature
GND
Vcc
Military
-55
O
C to +125
O
C
0V
5.0V
+
10%
Commercial
0
O
C to +70
O
C
0V
5.0V
+
10%
Industrial
-40
O
C to +85
O
C
0V
5.0V
+
10%
2689 tbl 03
Symbol
Parameter
(1)
Conditions
Max.
Unit
C
IN
Input Capacitance
V
IN
= 3dV
9
pF
C
OUT
Output Capacitance
V
OUT
= 3dV
10
pF
2689 tbl 05
Symbol
Parameter
Test Conditions
7130SA
7140SA
7130LA
7140LA
Unit
Min.
Max.
Min.
Max.
|I
LI
|
Input Leakage Current
(1)
V
CC
= 5.5V, V
IN
= 0V to V
CC
___
10
___
5
A
|I
LO
|
Output Leakage Current
(1)
V
CC
- 5.5V,
CE = V
IH
, V
OUT
= 0V to V
CC
___
10
___
5
A
V
OL
Output Low Voltage (I/O
0
-I/O
7
)
I
OL
= 4mA
___
0.4
___
0.4
V
V
OL
Open Drain Output
Low Voltage (
BUSY, INT)
I
OL
= 16mA
___
0.5
___
0.5
V
V
OH
Output High Voltage
I
OH
= -4mA
2.4
___
2.4
___
V
2689 tbl 04
5
IDT7130SA/LA and IDT7140SA/LA
High-Speed 1K x 8 Dual-Port Static SRAM Military, Industrial and Commercial Temperature Ranges
DC Electrical Characteristics Over the Operating
Temperature and Supply Voltage Range
(1,5,7)
(V
CC
= 5.0V 10%)
NOTES:
1. 'X' in part numbers indicates power rating (SA or LA).
2. PLCC and TQFP packages only.
3. At f = f
MAX
, address and control lines (except Output Enable) are cycling at the maximum frequency read cycle of 1/t
CYC
, and using "AC TEST CONDITIONS" of input levels
of GND to 3V.
4. f = 0 means no address or control lines change. Applies only to inputs at CMOS level standby.
5. Vcc = 5V, T
A
=+25C for Typ and is not production tested. Vcc DC = 100 mA (Typ)
6. Port "A" may be either left or right port. Port "B" is opposite from port "A".
7. Industrial temperature: for other speeds, packages and powers contact your sales office.
7130X 20
(2)
7140X 20
(2)
Com 'l Only
7130X 25
7140X 25
Com 'l &
M ilitary
7130X 35
7140X 35
Com 'l &
M ilitary
S ym b ol
P aram eter
Test Con dition
V ersion
Typ .
M ax.
Typ .
M ax.
Typ .
M ax.
Unit
I
CC
Dy nam ic O p e rating
Curre nt
(B o th P o rts A c tiv e )
CE
L
and
CE
R
= V
IL
,
O utp uts Dis ab le d
f = f
MAX
(3)
CO M 'L
S A
LA
110
110
250
200
110
110
220
170
110
110
165
120
m A
M IL &
IND
S A
LA
____
____
____
____
110
110
280
220
110
110
230
170
I
S B 1
S tand b y Curre nt
(B o th P o rts - TTL
Le v e l Inp uts )
CE
L
and
CE
R
= V
IH
f = f
MAX
(3)
CO M 'L
S A
LA
30
30
65
45
30
30
65
45
25
25
65
45
m A
M IL &
IND
S A
LA
____
____
____
____
30
30
80
60
25
25
80
60
I
S B 2
S tand b y Curre nt
(O ne P o rt - TTL
Le v e l Inp uts )
CE
"A "
= V
IL
and
CE
" B "
= V
IH
(6)
A c tiv e P o rt O utp uts Dis ab le d ,
f= f
MA X
(3)
CO M 'L
S A
LA
65
65
165
125
65
65
150
115
50
50
125
90
m A
M IL &
IND
S A
LA
____
____
____
____
65
65
160
125
50
50
150
115
I
S B 3
Full S tand b y Curre nt
(B o th P o rts -
CM O S Le v e l Inp uts )
CE
L
and
CE
R
> V
CC
- 0.2V,
V
IN
> V
CC
- 0.2V o r
V
IN
< 0.2 V, f = 0
(4)
CO M 'L
S A
LA
1.0
0.2
15
5
1.0
0.2
15
5
1.0
0.2
15
4
m A
M IL &
IND
S A
LA
____
____
____
____
1.0
0.2
30
10
1.0
0.2
30
10
I
S B 4
Full S tand b y Curre nt
(O ne P o rt -
CM O S Le v e l Inp uts )
CE
"A "
< 0.2V and
CE
"B "
> V
CC
- 0.2V
(6)
V
IN
> V
CC
- 0.2V o r V
IN
< 0.2V
A c tiv e P o rt O utp uts D is ab le d ,
f = f
MA X
(3)
CO M 'L
S A
LA
60
60
155
115
60
60
145
105
45
45
110
85
m A
M IL &
IND
S A
LA
____
____
____
____
60
60
155
115
45
45
145
105
2689 tb l 06a
7130X 55
7140X 55
Com 'l, In d
& M ilitary
7130X 100
7140X 100
Com 'l, In d
& M ilitary
S ym b ol
P aram eter
Test Con dition
V ersion
Typ .
M ax.
Typ .
M ax.
Unit
I
CC
Dy nam ic O p e rating
Curre nt
(B o th P o rts A c tiv e )
CE
L
and
CE
R
= V
IL
,
O utp uts Dis ab le d
f = f
MAX
(3)
CO M 'L
S A
LA
110
110
155
110
110
110
155
110
m A
M IL &
IND
S A
LA
110
110
190
140
110
110
190
140
I
S B 1
S tand b y Curre nt
(B o th P o rts - TTL
Le v e l Inp uts )
CE
L
and
CE
R
= V
IH
f = f
MAX
(3)
CO M 'L
S A
LA
20
20
65
35
20
20
55
35
m A
M IL &
IND
S A
LA
20
20
65
45
20
20
65
45
I
S B 2
S tand b y Curre nt
(O ne P o rt - TTL
Le v e l Inp uts )
CE
"A "
= V
IL
and
CE
" B "
= V
IH
(6)
A c tiv e P o rt O utp uts D is ab le d ,
f= f
MA X
(3)
CO M 'L
S A
LA
40
40
110
75
40
40
110
75
m A
M IL &
IND
S A
LA
40
40
125
90
40
40
125
90
I
S B 3
Full S tand b y Curre nt
(B o th P o rts -
CM O S Le v e l Inp uts )
CE
L
and
CE
R
> V
CC
- 0.2V,
V
IN
> V
CC
- 0.2V o r
V
IN
< 0.2 V, f = 0
(4)
CO M 'L
S A
LA
1.0
0.2
15
4
1.0
0.2
15
4
m A
M IL &
IND
S A
LA
1.0
0.2
30
10
1.0
0.2
30
10
I
S B 4
Full S tand b y Curre nt
(O ne P o rt -
CM O S Le v e l Inp uts )
CE
"A "
< 0.2V and
CE
"B "
> V
CC
- 0.2V
(6)
V
IN
> V
CC
- 0.2V o r V
IN
< 0.2V
A c tiv e P o rt O utp uts D is ab le d ,
f = f
MA X
(3)
CO M 'L
S A
LA
40
40
100
70
40
40
95
70
m A
M IL &
IND
S A
LA
40
40
110
85
40
40
110
80
2689 tb l 0 6b