INDUSTRIAL TEMPERATURE RANGE
IDT74ALVCH16409
3.3V CMOS 9-BIT, 4-PORT UNIVERSAL BUS EXCHANGER
1
OCTOBER 1999
INDUSTRIAL TEMPERATURE RANGE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
1999 Integrated Device Technology, Inc.
DSC-4572/1
FEATURES:
0.5 MICRON CMOS Technology
Typical t
SK(o)
(Output Skew) < 250ps
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
V
CC
= 3.3V 0.3V, Normal Range
V
CC
= 2.7V to 3.6V, Extended Range
V
CC
= 2.5V 0.2V
CMOS power levels (0.4
W typ. static)
Rail-to-Rail output swing for increased noise margin
Available in SSOP, TSSOP, and TVSOP packages
FUNCTIONAL BLOCK DIAGRAM
IDT74ALVCH16409
3.3V CMOS 9-BIT, 4-PORT
UNIVERSAL BUS EXCHANGER
WITH 3-STATE OUTPUTS
AND BUS-HOLD
DESCRIPTION:
This 9-bit, 4-port universal bus exchanger is built using advanced dual metal
CMOS technology. The ALVCH16409 allows synchronous data exchange
between four different buses. Data flow is controlled by the select (SEL0SEL4)
inputs. A data-flow state is stored on the rising edge of the clock (CLK) input if
the select-enable (SELEN) input is low. Once a data-flow state has been
established, data is stored in the flip-flop on the rising edge of CLK if SELEN is
high. The data-flow control logic is designed to allow glitch-free data transmis-
sion. When preset (PRE) transitions high, the outputs are disabled immediately
without waiting for a clock pulse. To leave the high-impedance state, both PRE
and SELEN must be low and a clock pulse must be applied.
The ALVCH16409 has been designed with a 24mA output driver. This
driver is capable of driving a moderate to heavy load while maintaining speed
performance.
The ALVCH16409 has "bus-hold" which retains the inputs' last state
whenever the input bus goes to a high impedance. This prevents floating inputs
and eliminates the need for pull-up/down resistors.
DRIVE FEATURES:
High Output Drivers: 24mA
Suitable for heavy loads
CLK
D
1
A
1
2
A
1
CLK
D
1
Ax
2
Ax
1
Ax
1
Bx
2
Bx
3
2
Ax
1
Bx
2
Bx
3
C LK
SELEN
56
55
SEL
0
SEL
1
2
27
Flow and Storage Control
SEL
3
SEL
4
SEL
2
PRE
1
28
29
30
CLK
D
CLK
D
1
Ax
2
Ax
2
Bx
1
Ax
2
Ax
1
Bx
3
3
1
Bx
2
Bx
1
B
1
2
B
1
One of 9 Channels
54
42
3
15
APPLICATIONS:
3.3V high speed systems
3.3V and lower voltage computing systems
INDUSTRIAL TEMPERATURE RANGE
2
IDT74ALVCH16409
3.3V CMOS 9-BIT, 4-PORT UNIVERSAL BUS EXCHANGER
SSOP/ TSSOP/ TVSOP
TOP VIEW
PIN CONFIGURATION
GND
1
A
1
V
CC
GND
GND
V
CC
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
48
49
50
51
52
53
54
55
56
1
GND
V
CC
GND
GND
V
CC
GND
GND
25
26
27
28
32
31
30
29
PRE
SEL0
1
A
2
1
A
3
1
A
4
1
A
5
1
A
6
1
A
7
1
A
8
2
A
1
2
A
2
2
A
3
2
A
4
2
A
5
2
A
6
2
A
7
2
A
8
SELEN
1
B
2
1
B
3
1
B
4
1
B
5
1
B
6
1
B
7
1
B
8
1
B
9
2
B
1
2
B
2
2
B
3
2
B
4
2
B
5
2
B
6
2
B
7
2
B
8
1
A
9
2
A
9
SEL1
SEL2
SEL4
SEL3
2
B
9
CLK
1
B
1
Symbol
Description
Max
Unit
V
TERM
(2)
Terminal Voltage with Respect to GND
0.5 to +4.6
V
V
TERM
(3)
Terminal Voltage with Respect to GND
0.5 to V
CC
+0.5
V
T
STG
Storage Temperature
65 to +150
C
I
OUT
DC Output Current
50 to +50
mA
I
IK
Continuous Clamp Current,
50
mA
V
I
< 0 or V
I
> V
CC
I
OK
Continuous Clamp Current, V
O
< 0
50
mA
I
CC
Continuous Current through each
100
mA
I
SS
V
CC
or GND
ABSOLUTE MAXIMUM RATINGS
(1)
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. V
CC
terminals.
3. All terminals except V
CC
.
NOTE:
1. As applicable to the device type.
Symbol
Parameter
(1)
Conditions
Typ.
Max.
Unit
C
IN
Input Capacitance
V
IN
= 0V
5
7
pF
C
OUT
Output Capacitance
V
OUT
= 0V
7
9
pF
C
I/O
I/O Port Capacitance
V
IN
= 0V
7
9
pF
CAPACITANCE
(T
A
= +25C, F = 1.0MHz)
NOTES:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don't Care
= LOW-to-HIGH Transition
2. Output level before the indicated steady-state input conditions were established.
FUNCTION TABLE
(1)
Inputs
Output
CLK
Send Port
Receive Port
L
L
H
H
H
X
B
(2)
L
X
B
(2)
NOTE:
1. These pins have "Bus-Hold". All other pins are standard inputs, outputs, or I/Os.
Pin Names
Description
PRE
Preset Input (Active LOW)
SELEN
Select Enable Input (Active LOW)
SEL0 - SEL4
Select Inputs
CLK
Clock Input
xAx
A-to-B Data Inputs or B-to-A 3-State Outputs
(1)
xBx
B-to-A Data Inputs or A-to-B 3-State Outputs
(1)
PIN DESCRIPTION
INDUSTRIAL TEMPERATURE RANGE
IDT74ALVCH16409
3.3V CMOS 9-BIT, 4-PORT UNIVERSAL BUS EXCHANGER
3
Inputs
Data Flow
PRE
SELEN
CLK
SEL0
SEL1
SEL2
SEL3
SEL4
H
X
X
X
X
X
X
X
All outputs disabled
L
H
X
X
X
X
X
No change
L
L
0
0
0
0
0
None, all I/Os off
L
L
0
0
0
0
1
Not used
L
L
0
0
0
1
0
Not used
L
L
0
0
0
1
1
Not used
L
L
0
0
1
0
0
Not used
L
L
0
0
1
0
1
Not used
L
L
0
0
1
1
0
Not used
L
L
0
0
1
1
1
Not used
L
L
0
1
0
0
0
2A to 1A and 1B to 2B
L
L
0
1
0
0
1
2A to 1A
L
L
0
1
0
1
0
2B to 1B
L
L
0
1
0
1
1
2A to 1A and 2B to 1B
L
L
0
1
1
0
0
1A to 2A and 1B to 2B
L
L
0
1
1
0
1
1A to 2A
L
L
0
1
1
1
0
1B to 2B
L
L
0
1
1
1
1
1A to 2A and 2B to 1B
L
L
1
0
0
0
0
1A to 1B and 2B to 2A
L
L
1
0
0
0
1
1A to 1B
L
L
1
0
0
1
0
2A to 2B
L
L
1
0
0
1
1
1A to 1B and 2A to 2B
L
L
1
0
1
0
0
1B to 1A and 2A to 2B
L
L
1
0
1
0
1
1B to 1A
L
L
1
0
1
1
0
2B to 2A
L
L
1
0
1
1
1
1B to 1A and 2B to 2A
L
L
1
1
0
0
0
2B to 1A and 2A to 1B
L
L
1
1
0
0
1
1B to 2A
L
L
1
1
0
1
0
2B to 1A
L
L
1
1
0
1
1
2B to 1A and 1B to 2A
L
L
1
1
1
0
0
1A to 2B and 1B to 2A
L
L
1
1
1
0
1
1A to 2B
L
L
1
1
1
1
0
2A to 1B
L
L
1
1
1
1
1
1A to 2B and 2A to 1B
DATA FLOW CONTROL
INDUSTRIAL TEMPERATURE RANGE
4
IDT74ALVCH16409
3.3V CMOS 9-BIT, 4-PORT UNIVERSAL BUS EXCHANGER
Symbol
Parameter
Test Conditions
Min.
Typ.
(1)
Max.
Unit
V
IH
Input HIGH Voltage Level
V
CC
= 2.3V to 2.7V
1.7
--
--
V
V
CC
= 2.7V to 3.6V
2
--
--
V
IL
Input LOW Voltage Level
V
CC
= 2.3V to 2.7V
--
--
0.7
V
V
CC
= 2.7V to 3.6V
--
--
0.8
I
IH
Input HIGH Current
V
CC
= 3.6V
V
I
= V
CC
--
--
5
A
I
IL
Input LOW Current
V
CC
= 3.6V
V
I
= GND
--
--
5
A
I
OZH
High Impedance Output Current
V
CC
= 3.6V
V
O
= V
CC
--
--
10
A
I
OZL
(3-State Output pins)
V
O
= GND
--
--
10
V
IK
Clamp Diode Voltage
V
CC
= 2.3V, I
IN
= 18mA
--
0.7
1.2
V
V
H
Input Hysteresis
V
CC
= 3.3V
--
100
--
mV
I
CCL
Quiescent Power Supply Current
V
CC
= 3.6V
--
0.1
40
A
I
CCH
V
IN
= GND or V
CC
I
CCZ
I
CC
Quiescent Power Supply Current
One input at V
CC
- 0.6V, other inputs at V
CC
or GND
--
--
750
A
Variation
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Operating Condition: T
A
= 40C to +85C
NOTE:
1. Typical values are at V
CC
= 3.3V, +25C ambient.
BUS-HOLD CHARACTERISTICS
Symbol
Parameter
(1)
Test Conditions
Min.
Typ.
(2)
Max.
Unit
I
BHH
Bus-Hold Input Sustain Current
V
CC
= 3V
V
I
= 2V
75
--
--
A
I
BHL
V
I
= 0.8V
75
--
--
I
BHH
Bus-Hold Input Sustain Current
V
CC
= 2.3V
V
I
= 1.7V
45
--
--
A
I
BHL
V
I
= 0.7V
45
--
--
I
BHHO
Bus-Hold Input Overdrive Current
V
CC
= 3.6V
V
I
= 0 to 3.6V
--
--
500
A
I
BHLO
NOTES:
1. Pins with Bus-Hold are identified in the pin description.
2. Typical values are at V
CC
= 3.3V, +25C ambient.
INDUSTRIAL TEMPERATURE RANGE
IDT74ALVCH16409
3.3V CMOS 9-BIT, 4-PORT UNIVERSAL BUS EXCHANGER
5
OPERATING CHARACTERISTICS, T
A
= 25C
V
CC
= 2.5V 0.2V
V
CC
= 3.3V 0.3V
Symbol
Parameter
Test Conditions
Typical
Typical
Unit
C
PD
Power Dissipation Capacitance Outputs enabled
C
L
= 0pF, f = 10Mhz
--
60
pF
C
PD
Power Dissipation Capacitance Outputs disabled
--
60
NOTE:
1. V
IH
and V
IL
must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the appropriate V
CC
range.
T
A
= 40C to + 85C.
OUTPUT DRIVE CHARACTERISTICS
Symbol
Parameter
Test Conditions
(1)
Min.
Max.
Unit
V
OH
Output HIGH Voltage
V
CC
= 2.3V to 3.6V
I
OH
= 0.1mA
V
CC
0.2
--
V
V
CC
= 2.3V
I
OH
= 6mA
2
--
V
CC
= 2.3V
I
OH
= 12mA
1.7
--
V
CC
= 2.7V
2.2
--
V
CC
= 3V
2.4
--
V
CC
= 3V
I
OH
= 24mA
2
--
V
OL
Output LOW Voltage
V
CC
= 2.3V to 3.6V
I
OL
= 0.1mA
--
0.2
V
V
CC
= 2.3V
I
OL
= 6mA
--
0.4
I
OL
= 12mA
--
0.7
V
CC
= 2.7V
I
OL
= 12mA
--
0.4
V
CC
= 3V
I
OL
= 24mA
--
0.55
INDUSTRIAL TEMPERATURE RANGE
6
IDT74ALVCH16409
3.3V CMOS 9-BIT, 4-PORT UNIVERSAL BUS EXCHANGER
NOTES:
1. See TEST CIRCUITS AND WAVEFORMS. T
A
= 40C to + 85C.
2
Skew between any two outputs of the same package and switching in the same direction.
SWITCHING CHARACTERISTICS
(1)
V
CC
= 2.5V 0.2V
V
CC
= 2.7V
V
CC
= 3.3V 0.3V
Symbol
Parameter
Min.
Max.
Min.
Max.
Min.
Max.
Unit
f
MAX
120
--
120
--
120
--
MHz
t
PLH
Propagation Delay
1.5
6
--
5.7
1.5
5.1
ns
t
PHL
CLK to xAx or xBx
t
PZH
Output Enable Time
2.4
6.9
--
6.3
2
5.7
ns
t
PZL
CLK to xAx or xBx
t
PHZ
Output Disable Time
2.3
7.1
--
6
2
5.7
ns
t
PLZ
CLK to xAx or xBx
t
PHZ
Output Disable Time
2.8
7.5
--
6.5
2.5
6.1
ns
t
PLZ
PRE to xAx or xBx
t
SU
Set-up Time, HIGH or LOW, xAx or xBx before CLK
1.9
--
1.9
--
1.4
--
ns
t
SU
Set-up Time, HIGH or LOW, SEL before CLK
5.1
--
4.2
--
3.5
--
ns
t
SU
Set-up Time, HIGH or LOW, SELEN before CLK
2.5
--
2.5
--
1.8
--
ns
t
SU
Set-up Time, HIGH or LOW, PRE before CLK
1
--
1
--
0.7
--
ns
t
H
Hold Time, HIGH or LOW, xAx or xBx after CLK
0.8
--
0.8
--
1
--
ns
t
H
Hold Time, HIGH or LOW, SEL after CLK
0
--
0
--
0
--
ns
t
H
Hold Time, HIGH or LOW, SELEN after CLK
0.5
--
0.5
--
0.8
--
ns
t
W
Pulse Duration, CLK HIGH or LOW
4.2
--
4.2
--
3
--
ns
t
SK
(o)
Output Skew
(2)
--
--
--
--
--
500
ps
CLK
S E LE N
SE L
Send
Port
t
SU
t
h
t
SU
t
dis
CLK
t
pd
CLK
t
en
CLK
t
h
t
SU
t
h
Receive
P ort
TIMING DIAGRAM
INDUSTRIAL TEMPERATURE RANGE
IDT74ALVCH16409
3.3V CMOS 9-BIT, 4-PORT UNIVERSAL BUS EXCHANGER
7
Open
V
LOAD
GND
V
CC
Pulse
Generator
D.U.T.
500
500
C
L
R
T
V
IN
V
OUT
(1, 2)
ALV C Link
INPUT
V
IH
0V
V
OH
V
OL
t
PLH1
t
SK
(x)
OUTPUT 1
OUTPUT 2
t
PHL1
t
SK
(x)
t
PLH2
t
PHL2
V
T
V
T
V
OH
V
T
V
OL
t
SK
(x)
= t
PLH2
-
t
PLH1
or
t
PHL2
-
t
PHL1
ALVC Link
SAME PHASE
INPUT TRANSITION
OPPOSITE PHASE
INPUT TRANSITION
0V
0V
V
OH
V
OL
t
PLH
t
PHL
t
PHL
t
PLH
OUTPUT
V
IH
V
T
V
T
V
IH
V
T
ALVC Link
DATA
INPUT
0V
0V
0V
0V
t
REM
TIMING
INPUT
SYNCHRONOUS
CONTROL
t
SU
t
H
t
SU
t
H
V
IH
V
T
V
IH
V
T
V
IH
V
T
V
IH
V
T
ALVC Link
ASYNCHRONOUS
CONTROL
LOW -HIGH-LOW
PULSE
HIGH-LOW-HIGH
PULSE
V
T
t
W
V
T
ALVC Link
CONTROL
INPUT
t
PLZ
0V
OUTPUT
NORMALLY
LOW
t
PZH
0V
SW ITCH
CLOSED
OUTPUT
NORMALLY
HIGH
ENABLE
DISABLE
SW ITCH
OPEN
t
PHZ
0V
V
LZ
V
OH
V
T
V
T
t
PZL
V
LOAD/2
V
LOAD/2
V
IH
V
T
V
OL
V
HZ
ALVC Link
TEST CIRCUITS AND WAVEFORMS
Propagation Delay
Test Circuit for All Outputs
Enable and Disable Times
Set-up, Hold, and Release Times
NOTES:
1. For t
SK
(o) OUTPUT1 and OUTPUT2 are any two outputs.
2. For t
SK
(b) OUTPUT1 and OUTPUT2 are in the same bank.
DEFINITIONS:
C
L
= Load capacitance: includes jig and probe capacitance.
R
T
= Termination resistance: should be equal to Z
OUT
of the Pulse Generator.
NOTES:
1. Pulse Generator for All Pulses: Rate
1.0MHz; t
F
2.5ns; t
R
2.5ns.
2. Pulse Generator for All Pulses: Rate
1.0MHz; t
F
2ns; t
R
2ns.
Output Skew - t
SK
(
X
)
Pulse Width
NOTE:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
Symbol V
CC(1)
= 3.3V0.3V V
CC(1)
= 2.7V
V
CC(2)
= 2.5V0.2V
Unit
V
LOAD
6
6
2 x Vcc
V
V
IH
2.7
2.7
Vcc
V
V
T
1.5
1.5
Vcc
/ 2
V
V
LZ
300
300
150
mV
V
HZ
300
300
150
mV
C
L
50
50
30
pF
TEST CONDITIONS
SWITCH POSITION
Test
Switch
Open Drain
Disable Low
V
LOAD
Enable Low
Disable High
GND
Enable High
All Other Tests
Open
INDUSTRIAL TEMPERATURE RANGE
8
IDT74ALVCH16409
3.3V CMOS 9-BIT, 4-PORT UNIVERSAL BUS EXCHANGER
ORDERING INFORMATION
IDT
XX
ALVC
XXX
XX
Package
Device Type
Temp. Range
PV
PA
PF
R16
74
Shrink Small Outline Package
Thin Shrink Small Outline Package
Thin Very Small Outline Package
9-Bit, 4-Port Universal Bus Exchanger with 3-State Outputs
-40C to +85C
X
XX
Family
Bus-Hold
409
Bus-Hold
Double-Density, 12mA
H
CORPORATE HEADQUARTERS
for SALES:
for Tech Support:
2975 Stender Way
800-345-7015 or 408-727-6116
logichelp@idt.com
Santa Clara, CA 95054
fax: 408-492-8674
(408) 654-6459
www.idt.com
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