1
IDT74FCT16646AT/CT/ET
FAST CMOS 16-BIT BUS TRANSCEIVER/REGISTER (3-STATE)
INDUSTRIAL TEMPERATURE RANGE
FEATURES:
0.5 MICRON CMOS Technology
High-speed, low-power CMOS replacement for ABT functions
Typical t
SK(o)
(Output Skew) < 250ps
Low input and output leakage
1A (max.)
V
CC
= 5V 10%
High drive outputs (-32mA I
OH
, 64mA I
OL
)
Power off disable outputs permit "live insertion"
Typical V
OLP
(Output Ground Bounce) < 1.0V at V
CC
= 5V,
T
A
= 25C
Available in SSOP and TSSOP packages
FUNCTIONAL BLOCK DIAGRAM
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
JUNE 2002
2002 Integrated Device Technology, Inc.
DSC-5448/3
IDT74FCT16646AT/CT/ET
INDUSTRIAL TEMPERATURE RANGE
FAST CMOS 16-BIT
BUS TRANSCEIVER/
REGISTER (3-STATE)
DESCRIPTION:
The FCT16646T 16-bit registered transceiver is built using advanced
dual metal CMOS technology. These high-speed, low-power devices are
organized as two independent 8-bit bus transceivers with 3-state D-type
registers. The control circuitry is organized for multiplexed transmission of
data between A bus and B bus either directly or from the internal storage
registers. Each 8-bit transceiver/register features direction control (xDIR),
over-riding Output Enable control (xOE) and Select lines (xSAB and xSBA)
to select either real-time data or stored data. Separate clock inputs are
provided for A and B port registers. Data on the A or B data bus, or both,
can be stored in the internal registers by the low-to-high transitions at the
appropriate clock pins. Flow-through organization of signal pins simplifies
layout. All inputs are designed with hysteresis for improved noise margin.
The FCT16646T is ideally suited for driving high-capacitance loads and
low-impedance backplanes. The output buffers are designed with power off
disable capability to allow "live insertion" of boards when used as backplane
drivers.
1
B
1
1
A
1
1
OE
1
DIR
1
SB A
1
SA B
1
CLK BA
1
CLK AB
TO S EVE N O THE R C HAN NEL S
B R EG
A R EG
D
C
C
D
2
B
1
2
A
1
2
OE
2
DIR
2
S BA
2
S AB
2
CLK BA
2
CLK AB
TO S EVE N O THE R C HAN NELS
B R EG
A RE G
D
C
C
D
2
INDUSTRIAL TEMPERATURE RANGE
IDT74FCT16646AT/CT/ET
FAST CMOS 16-BIT BUS TRANSCEIVER/REGISTER (3-STATE)
PIN CONFIGURATION
Symbol
Description
Max
Unit
V
TERM(2)
Terminal Voltage with Respect to GND
0.5 to +7
V
V
TERM(3)
Terminal Voltage with Respect to GND
0.5 to V
CC
+0.5
V
T
STG
Storage Temperature
65 to +150
C
I
OUT
DC Output Current
60 to +120
mA
ABSOLUTE MAXIMUM RATINGS
(1)
(1)
(1)
(1)
(1)
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. All device terminals except FCT162XXX Output and I/O terminals.
3. Output and I/O terminals for FCT162XXX.
Pin Names
Description
xAx
Data Register A Inputs
Data Register B Outputs
xBx
Data Register B Inputs
Data Register A Outputs
xCLKAB, xCLKBA
Clock Pulse Inputs
xSAB, xSBA
Output Data Source Select Inputs
xDIR, xOE
Output Enable Inputs
PIN DESCRIPTION
SSOP/ TSSOP
TOP VIEW
1
B
1
1
B
2
GND
1
B
3
1
B
4
V
CC
1
B
5
1
B
6
1
SBA
1
B
7
1
B
8
2
B
1
2
B
2
GND
2
B
3
2
B
4
V
CC
2
B
5
GND
1
CLKBA
2
B
7
2
B
6
2
B
8
GND
2
SBA
2
CLKBA
2
OE
1DIR
1
CLKAB
1
SAB
GND
1
A
1
1
A
2
V
CC
1
A
3
1
A
4
GND
1
A
5
1
A
6
1
A
7
1
A
8
GND
2
A
1
2
A
2
V
CC
2
A
3
2
SAB
2
A
5
2
A
4
2
A
7
GND
2
A
8
2
CLKAB
2
DIR
2
A
6
47
37
38
39
40
41
42
43
44
45
46
33
34
35
36
56
55
49
50
51
52
53
54
48
1
2
3
4
5
6
7
8
9
10
12
13
14
15
16
17
18
19
20
11
21
22
23
24
29
30
31
32
25
26
27
28
1
OE
NOTES:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don't Care
Z = High-Impedance
2. The data output functions may be enabled or disabled by various signals at the xOE or xDIR inputs. Data input functions are always enabled, i.e. data at the bus pins will
be stored on every LOW-to-HIGH transition on the clock inputs.
FUNCTION TABLE
(1)
Inputs
Data I/O
(2)
Operation or Function
xOE
xDIR
xCLKAB
xCLKBA
xSAB
xSBA
xAx
xBx
H
X
H or L
H or L
X
X
Input
Input
Isolation
H
X
X
X
Store A and B Data
L
L
X
X
X
L
Output
Input
Real Time B Data to A Bus
L
L
X
H or L
X
H
Stored B Data to A Bus
L
H
X
X
L
X
Input
Output
Real Time A Data to B Bus
L
L
H or L
X
H
X
Stored A Data to B Bus
Symbol
Parameter
(1)
Conditions
Typ.
Max.
Unit
C
IN
Input Capacitance
V
IN
= 0V
3.5
6
pF
C
OUT
Output Capacitance
V
OUT
= 0V
3.5
8
pF
CAPACITANCE
(T
A
= +25C, F = 1.0MHz)
NOTE:
1. This parameter is measured at characterization but not tested.
3
IDT74FCT16646AT/CT/ET
FAST CMOS 16-BIT BUS TRANSCEIVER/REGISTER (3-STATE)
INDUSTRIAL TEMPERATURE RANGE
BUS
A
B US
B
x
DIR
x
O E
x
CLKA B
x
CLKB A
x
SA B
x
SB A
L
L
X
X
X
L
BUS
A
BUS
B
x
DIR
x
OE
x
CLK AB
x
CLK BA
x
SA B
x
SB A
H
L
X
X
L
X
BUS
A
BUS
B
x
DIR
x
OE
x
CLKA B
x
CLKB A
x
SA B
x
SB A
L
L
X
X
X
H
X
X
L
X
X
H
L
X
X
X
B US
A
B US
B
x
DIR
x
OE
x
CLK AB
x
CLK BA
x
SA B
x
SB A
L
L
X
X
H or L
H
(1)
H
L
H or L
X
H
X
REAL-TIME TRANSFER
BUS B TO A
REAL-TIME TRANSFER
BUS A TO B
STORAGE FROM
A AND/OR B
TRANSFER STORED
DATA TO A AND/OR B
NOTE:
1. Cannot transfer data to A bus and B bus simultaniously.
4
INDUSTRIAL TEMPERATURE RANGE
IDT74FCT16646AT/CT/ET
FAST CMOS 16-BIT BUS TRANSCEIVER/REGISTER (3-STATE)
Symbol
Parameter
Test Conditions
(1)
Min.
Typ.
(2)
Max.
Unit
V
IH
Input HIGH Level
Guaranteed Logic HIGH Level
2
--
--
V
V
IL
Input LOW Level
Guaranteed Logic LOW Level
--
--
0.8
V
I
IH
Input HIGH Current (Input pins)
(5)
V
CC
= Max.
V
I
= V
CC
--
--
1
A
Input HIGH Current (I/O pins)
(5)
--
--
1
I
IL
Input LOW Current (Input pins)
(5)
V
I
= GND
--
--
1
Input LOW Current (I/O pins)
(5)
--
--
1
I
OZH
High Impedance Output Current
V
CC
= Max.
V
O
= 2.7V
--
--
1
A
I
OZL
(3-State Output pins)
(5)
V
O
= 0.5V
--
--
1
V
IK
Clamp Diode Voltage
V
CC
= Min., I
IN
= 18mA
--
0.7
1.2
V
I
OS
Short Circuit Current
V
CC
= Max., V
O
= GND
(3)
80
140
250
mA
V
H
Input Hysteresis
--
--
100
--
mV
I
CCL
Quiescent Power Supply Current
V
CC
= Max.
--
5
500
A
I
CCH
V
IN
= GND or V
CC
I
CCZ
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Industrial: T
A
= 40C to +85C, V
CC
= 5.0V 10%
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25C ambient.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
4. Duration of the condition can not exceed one second.
5. The test limit for this parameter is 5
A at T
A
= -55C.
Symbol
Parameter
Test Conditions
(1)
Min.
Typ.
(2)
Max.
Unit
I
O
Output Drive Current
V
CC
= Max., V
O
= 2.5V
(3)
50
--
180
mA
V
OH
Output HIGH Voltage
V
CC
= Min.
I
OH
= 3mA
2.5
3.5
--
V
IN
= V
IH
or V
IL
I
OH
= 15mA
2.4
3.5
--
V
I
OH
= 32mA
(4)
2
3
--
V
OH
Output LOW Voltage
V
CC
= Min.
I
OL
= 64mA
--
0.2
0.55
V
V
IN
= V
IH
or V
IL
I
OFF
Input/Output Power Off Leakage
(5)
V
CC
= 0V, V
IN
or V
O
4.5V
--
--
1
A
OUTPUT DRIVE CHARACTERISTICS
5
IDT74FCT16646AT/CT/ET
FAST CMOS 16-BIT BUS TRANSCEIVER/REGISTER (3-STATE)
INDUSTRIAL TEMPERATURE RANGE
Symbol
Parameter
Test Conditions
(1)
Min.
Typ.
(2)
Max.
Unit
I
CC
Quiescent Power Supply
V
CC
= Max.
--
0.5
1.5
mA
Current TTL Inputs HIGH
V
IN
= 3.4V
(3)
I
CCD
Dynamic Power Supply Current
(4)
V
CC
= Max.,
V
IN
= V
CC
--
75
120
A/
Outputs Open
V
IN
= GND
MHz
xOE = xDIR = GND
One Input Toggling
50% Duty Cycle
I
C
Total Power Supply Current
(6)
V
CC
= Max.,
V
IN
= V
CC
--
0.8
1.7
mA
Outputs Open
V
IN
= GND
f
CP
= 10MHz (xCLKBA)
50% Duty Cycle
xOE = xDIR = GND
V
IN
= 3.4V
--
1.3
3.2
fi = 5MHz
V
IN
= GND
50% Duty Cycle
One Bit Toggling
V
CC
= Max.,
V
IN
= V
CC
--
3.8
6.5
(5)
Outputs Open
V
IN
= GND
f
CP
= 10MHz (xCLKBA)
50% Duty Cycle
xOE = xDIR = GND
V
IN
= 3.4V
--
8.3
20
(5)
Sixteen Bits Toggling
V
IN
= GND
fi = 2.5MHz
50% Duty Cycle
POWER SUPPLY CHARACTERISTICS
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25C ambient.
3. Per TTL driven input (V
IN
= 3.4V). All other inputs at V
CC
or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the I
CC
formula. These limits are guaranteed but not tested.
6. I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
I
CC
D
H
N
T
+ I
CCD
(f
CP
N
CP
/2 + fiNi)
I
CC
= Quiescent Current (I
CCL
, I
CCH
and I
CCZ
)
I
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for Register Devices (Zero for Non-Register Devices)
N
CP
= Number of Clock Inputs at f
CP
f
i
= Input Frequency
N
i
= Number of Inputs at f
i
6
INDUSTRIAL TEMPERATURE RANGE
IDT74FCT16646AT/CT/ET
FAST CMOS 16-BIT BUS TRANSCEIVER/REGISTER (3-STATE)
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design.
4. This limit is guaranteed but not tested.
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
FCT16646AT
FCT16646CT
FCT16646ET
Symbol
Parameter
Condition
(1)
Min
.
(2)
Max
.
Min
.
(2)
Max
.
Min
.
(2)
Max
.
Unit
t
PLH
Propagation Delay
C
L
= 50pF
2
6.3
1.5
5.4
1.5
3.8
ns
t
PHL
Bus to Bus
R
L
= 500
t
PZH
Output Enable Time
2
9.8
1.5
7.8
1.5
4.8
ns
t
PZL
xDIR or xOE to Bus
t
PHZ
Output Disable Time
2
6.3
1.5
6.3
1.5
4
ns
t
PLZ
xDIR or xOE to Bus
t
PLH
Propagation Delay
2
6.3
1.5
5.7
1.5
3.8
ns
t
PHL
Clock to Bus
t
PLH
Propagation Delay
2
7.7
1.5
6.2
1.5
4.2
ns
t
PHL
xSBA or xSAB to Bus
t
SU
Set-up Time HIGH or LOW, Bus to Clock
2
--
2
--
2
--
ns
t
H
Hold Time HIGH or LOW, Bus to Clock
1.5
--
1.5
--
0
--
ns
t
W
Clock Pulse Width HIGH or LOW
5
--
5
--
3
(4)
--
ns
t
SK
(o)
Output Skew
(3)
--
0.5
--
0.5
--
0.5
ns
7
IDT74FCT16646AT/CT/ET
FAST CMOS 16-BIT BUS TRANSCEIVER/REGISTER (3-STATE)
INDUSTRIAL TEMPERATURE RANGE
Pulse
Generator
R
T
D.U.T.
V
CC
V
IN
C
L
V
OUT
50pF
500
500
7.0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
D ATA
INPUT
TIM IN G
INPUT
ASYNC HR ONOUS C ONTROL
PRES ET
CLEA R
ETC .
SYNCHR ON OUS CONTROL
t
SU
t
H
t
R EM
t
SU
t
H
PRES ET
CLEA R
CLOCK ENABLE
ETC .
HIGH-LOW -H IGH
PU LSE
LOW -HIGH-LOW
PU LSE
t
W
1.5V
1.5V
SAM E PHASE
INPUT TRAN SITION
3V
1.5V
0V
1.5V
V
O H
t
PLH
OU TPU T
OPPOSITE P HASE
INPUT TRAN SITION
3V
1.5V
0V
t
PL H
t
PH L
t
PH L
V
O L
CONTROL
IN PU T
3V
1.5V
0V
3.5V
0V
OUTPU T
NORM ALLY
LOW
OUTPU T
NORM ALLY
H IGH
SW ITCH
C LOSE D
SW ITC H
OPEN
V
OL
0.3V
0.3V
t
PLZ
t
PZL
t
PZH
t
PHZ
3.5V
0V
1.5V
1.5V
ENABLE
D ISABLE
V
OH
TEST CIRCUITS AND WAVEFORMS
Propagation Delay
Test Circuits for All Outputs
Enable and Disable Times
Set-up, Hold, and Release Times
Pulse Width
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
2. Pulse Generator for All Pulses: Rate
1.0MHz; t
F
2.5ns; t
R
2.5ns.
Test
Switch
Open Drain
Disable Low
Closed
Enable Low
All Other Tests
Open
SWITCH POSITION
DEFINITIONS:
C
L
= Load capacitance: includes jig and probe capacitance.
R
T
= Termination resistance: should be equal to Z
OUT
of the Pulse Generator.
8
INDUSTRIAL TEMPERATURE RANGE
IDT74FCT16646AT/CT/ET
FAST CMOS 16-BIT BUS TRANSCEIVER/REGISTER (3-STATE)
ORDERING INFORMATION
IDT XX
Temp. Range
XXXX
Device Type
XX
Package
PV
PA
Shrink Small Outline Package
Thin Shrink Small Outline Package
74
40C to +85C
16
Double-Density, 5 Volt, High Drive
FCT
XXX
Family
646AT
646CT
646ET
16-Bit Bus Transceiver/Register
CORPORATE HEADQUARTERS
for SALES:
for Tech Support:
2975 Stender Way
800-345-7015 or 408-727-6116
logichelp@idt.com
Santa Clara, CA 95054
fax: 408-492-8674
(408) 654-6459
www.idt.com
5/21/2002 Removed TVSOP package
6/21/2002 Updated according to PDNs Logic-00-07 and Logic-01-04
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