INDUSTRIAL TEMPERATURE RANGE
IDT74FCT3827A/B
3.3V CMOS 10-BIT BUFFER
1
NOVEMBER 2000
INDUSTRIAL TEMPERATURE RANGE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
2000 Integrated Device Technology, Inc.
DSC-3092/5
FEATURES:
0.5 MICRON CMOS Technology
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
V
CC
= 3.3V 0.3V, Normal Range
V
CC
= 2.7V to 3.6V, Extended Range
CMOS power levels (0.4
W typ. static)
Rail-to-Rail output swing for increased noise margin
Available in QSOP and SOIC packages
FUNCTIONAL BLOCK DIAGRAM
IDT74FCT3827A/B
3.3V CMOS
10-BIT BUFFER
DESCRIPTION:
The FCT3827A/B 10-bit bus drivers are built using an advanced dual
metal CMOS technology. These high speed, low power buffers are ideal
for high-performance bus interface buffering for wide data/address paths or
buses carrying parity. The 10-bit buffers have NAND-ed output enables
for maximum control flexibility.
All of the FCT3827 high performance interface components are de-
signed for high-capacitance load drive capability, while providing low-
capacitance bus loading at both inputs and outputs.
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
D
8
D
9
O E
1
OE
2
Y
0
Y
1
Y
2
Y
3
Y
4
Y
5
Y
6
Y
7
Y
8
Y
9
INDUSTRIAL TEMPERATURE RANGE
2
IDT74FCT3827A/B
3.3V CMOS 10-BIT BUFFER
Symbol
Description
Max
Unit
V
TERM(2)
Terminal Voltage with Respect to GND
0.5 to +4.6
V
V
TERM(3)
Terminal Voltage with Respect to GND
0.5 to +7
V
V
TERM(4)
Terminal Voltage with Respect to GND
0.5 to V
CC
+0.5
V
T
STG
Storage Temperature
65 to +150
C
I
OUT
DC Output Current
60 to +60
mA
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may
cause permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in
the operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect reliability.
2. V
CC
terminals.
3. Input terminals.
4. Outputs and I/O terminals.
ABSOLUTE MAXIMUM RATINGS
(1)
PIN CONFIGURATION
QSOP/ SOIC
TOP VIEW
Symbol
Parameter
(1)
Conditions
Typ.
Max.
Unit
C
IN
Input Capacitance
V
IN
= 0V
3.5
6
pF
C
OUT
Output Capacitance
V
OUT
= 0V
4
8
pF
CAPACITANCE
(T
A
= +25C, F = 1.0MHz)
NOTE:
1. This parameter is measured at characterization but not tested.
Pin Names
I/O
Description
OEx
I
When both are LOW, the outputs are enabled. When
either one or both are HIGH, the outputs are High Z.
Dx
I
10-Bit Data Input
Y x
O
10-Bit Data Output
PIN DESCRIPTION
OE
1
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
Y
0
Y
1
Y
2
Y
3
Y
4
Y
6
Y
5
Y
7
V
CC
1
2
3
4
5
6
7
8
9
10
13
14
15
16
17
18
19
20
11
12
21
22
23
24
D
8
D
9
Y
8
Y
9
OE
2
GND
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don't Care
Z = High Impedance
FUNCTION TABLE
(1)
Inputs
Outputs
Function
OE
1
OE
2
Dx
Yx
Transparent
L
L
L
L
L
L
H
H
3-State
H
X
X
Z
X
H
X
Z
INDUSTRIAL TEMPERATURE RANGE
IDT74FCT3827A/B
3.3V CMOS 10-BIT BUFFER
3
Symbol
Parameter
Test Conditions
(1)
Min.
Typ.
(2)
Max.
Unit
V
IH
Input HIGH Level (Input pins)
Guaranteed Logic HIGH Level
2
--
5.5
V
Input HIGH Level (I/O pins)
2
--
Vcc+0.5
V
IL
Input LOW Level
Guaranteed Logic LOW Level
0.5
--
0.8
V
(Input and I/O pins)
I
IH
Input HIGH Current (Input pins)
V
CC
= Max.
V
I
= 5.5V
--
--
1
A
Input HIGH Current (I/O pins)
V
I
= V
CC
--
--
1
I
IL
Input LOW Current (Input pins)
V
I
= GND
--
--
1
Input LOW Current (I/O pins)
V
I
= GND
--
--
1
I
OZH
High Impedance Output Current
V
CC
= Max.
V
O
= V
CC
--
--
1
A
I
OZL
(3-State Output pins)
V
O
= GND
--
--
1
V
IK
Clamp Diode Voltage
V
CC
= Min., I
IN
= 18mA
--
0.7
1.2
V
I
ODH
Output HIGH Current
V
CC
= 3.3V, V
IN
= V
IH
or V
IL
, V
O
= 1.5V
(3)
36
60
110
mA
I
ODL
Output LOW Current
V
CC
= 3.3V, V
IN
= V
IH
or V
IL
, V
O
= 1.5V
(3)
50
90
200
mA
V
OH
Output HIGH Voltage
V
CC
= Min.
I
OH
= 0.1mA
V
CC
0.2
--
--
V
V
IN
= V
IH
or V
IL
I
OH
= 3mA
2.4
3
--
V
CC
= 3V
I
OH
= 8mA
2.4
(5)
3
--
V
IN
= V
IH
or V
IL
V
OL
Output LOW Voltage
V
CC
= Min.
I
OL
= 0.1mA
--
--
0.2
V
V
IN
= V
IH
or V
IL
I
OL
= 16mA
--
0.2
0.4
I
OL
= 24mA
--
0.3
0.55
V
CC
= 3V
I
OL
= 24mA
0.3
0.5
V
IN
= V
IH
or V
IL
I
OS
Short Circuit Current
(4)
V
CC
= Max., V
O
= GND
(3)
60
135
240
mA
V
H
Input Hysteresis
--
--
150
--
mV
I
CCL
Quiescent Power Supply Current
V
CC
= Max., V
IN
= GND or V
CC
--
0.1
10
A
I
CCH
I
CCZ
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Industrial: T
A
= -40C to +84C, V
CC
= 2.7V to 3.6V
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 3.3V, +25C ambient and maximum loading.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. This parameter is guaranteed but not tested.
5. V
OH
= V
CC
- 0.6V at rated current.
INDUSTRIAL TEMPERATURE RANGE
4
IDT74FCT3827A/B
3.3V CMOS 10-BIT BUFFER
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 3.3V, +25C ambient.
3. Per TTL driven input. All other inputs at V
CC
or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of
I
CC
formula. These limits are guaranteed but not tested.
6. I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
I
CC
D
H
N
T
+ I
CCD
(f
CP
N
CP
/2 + fiNi)
I
CC
= Quiescent Current (I
CC
, I
CCH
, and I
CCZ
)
I
CC
= Power Supply Current for a TTL High Input
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current caused by an Input Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for register devices (zero for non-register devices)
N
CP
= Number of clock inputs at f
CP
fi = Input Frequency
Ni = Number of Inputs at fi
POWER SUPPLY CHARACTERISTICS
Symbol
Parameter
Test Conditions
(1)
Min.
Typ.
(2)
Max.
Unit
I
CC
Quiescent Power Supply Current
V
CC
= Max.
V
IN
= V
CC
- 0.6V
--
2
30
A
I
CCD
Dynamic Power Supply
V
CC
= Max.
V
IN
= V
CC
--
60
85
A/
Current
(4)
Outputs Open
V
IN
= GND
MHz
OE
1
= OE
2
= GND
One Input Toggling
50% Duty Cycle
I
C
Total Power Supply Current
(6)
V
CC
= Max.
V
IN
= V
CC
--
0.6
0.9
mA
Outputs Open
V
IN
= GND
f
I
= 10MHz
50% Duty Cycle
V
IN
= V
CC
- 0.6V
--
0.6
0.9
OE
1
= OE
2
= GND
V
IN
= GND
One Bit Toggling
V
CC
= Max.
V
IN
= V
CC
--
1.5
2.1
(5)
Outputs Open
V
IN
= GND
f
I
= 2.5MHz
50% Duty Cycle
V
IN
= V
CC
- 0.6V
--
1.5
2.3
(5)
OE
1
= OE
2
= GND
V
IN
= GND
Eight Bits Toggling
74FCT3827A
74FCT3827B
Symbol
Parameter
Condition
(2)
Min.
(3)
Max.
Min.
(3)
Max.
Unit
t
PLH
Propagation Delay
C
L
= 50pF
1.5
8
1.5
5
ns
t
PHL
Dx to Yx
R
L
= 500
C
L
= 300pF
(1)
1.5
15
1.5
13
R
L
= 500
t
PZH
Output Enable Time
C
L
= 50pF
1.5
12
1.5
8
ns
t
PZL
OEx to Yx
R
L
= 500
C
L
= 300pF
(1)
1.5
23
1.5
15
R
L
= 500
t
PHZ
Output Disable Time
C
L
= 5pF
(1)
1.5
9
1.5
6
ns
t
PLZ
OEx to Yx
R
L
= 500
C
L
= 50pF
1.5
10
1.5
7
R
L
= 500
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
(1)
NOTES:
1. Propagation Delays and Enable/Disable times are with V
CC
= 3.3V 0.3V, Normal Range. For V
CC
= 2.7V to 3.6V, Extended Range, all Propagation Delays and Enable/
Disable times should be degraded by 20%.
2. See test circuit and waveforms.
3. Minimum limits are guaranteed but not tested on Propagation Delays.
INDUSTRIAL TEMPERATURE RANGE
IDT74FCT3827A/B
3.3V CMOS 10-BIT BUFFER
5
Pulse
Generator
R
T
D.U.T.
V
CC
V
IN
C
L
V
OUT
50pF
500
500
Open
GND
6v
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
DATA
INPUT
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
t
SU
t
H
t
REM
t
SU
t
H
PRESET
CLEAR
CLOCK ENABLE
ETC.
HIGH-LOW-HIGH
PULSE
LOW-HIGH-LOW
PULSE
t
W
1.5V
1.5V
SAME PHASE
INPUT TRANSITION
3V
1.5V
0V
1.5V
V
OH
t
PLH
OUTPUT
OPPOSITE PHASE
INPUT TRANSITION
3V
1.5V
0V
t
PLH
t
PHL
t
PHL
V
OL
CONTROL
INPUT
3V
1.5V
0V
3V
0V
OUTPUT
NORMALLY
LOW
OUTPUT
NORMALLY
HIGH
SWITCH
6V
SWITCH
GND
V
OL
0.3V
0.3V
t
PLZ
t
PZL
t
PZH
t
PHZ
3V
0V
1.5V
1.5V
ENABLE
DISABLE
V
OH
TEST CIRCUITS AND WAVEFORMS
Propagation Delay
Test Circuits for All Outputs
Enable and Disable Times
Set-Up, Hold, and Release Times
Pulse Width
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
2. Pulse Generator for All Pulses: Rate
1.0MHz; t
F
2.5ns; t
R
2.5ns.
3. If Vcc is below 3V, input voltage swings should be adjusted not to exceed Vcc.
Test
Switch
Open Drain
Disable Low
6V
Enable Low
Disable High
GND
Enable High
All Other Tests
Open
SWITCH POSITION
DEFINITIONS:
C
L
= Load capacitance: includes jig and probe capacitance.
R
T
= Termination resistance: should be equal to Z
OUT
of the Pulse Generator.
INDUSTRIAL TEMPERATURE RANGE
6
IDT74FCT3827A/B
3.3V CMOS 10-BIT BUFFER
ORDERING INFORMATION
CORPORATE HEADQUARTERS
for SALES:
for Tech Support:
2975 Stender Way
800-345-7015 or 408-727-6116
logichelp@idt.com
Santa Clara, CA 95054
fax: 408-492-8674
(408) 654-6459
www.idt.com
SO
Q
827A
827B
Small Outline IC
Quarter-size Small Outline Package
10-Bit Buffer
74
-
40
C to +85
C
3
3.3 Volt
IDT XX FCT
XX
Device Type
X
Package
Temp. Range
X
Family
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