INDUSTRIAL TEMPERATURE RANGE
IDT74LVCH16260A
3.3V CMOS 12-BIT TRI-PORT BUS EXCHANGER WITH 5V TOLERANT I/O
1
OCTOBER 1999
INDUSTRIAL TEMPERATURE RANGE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
1999 Integrated Device Technology, Inc.
DSC-4229/2
FEATURES:
Typical t
SK(o)
(Output Skew) < 250ps
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
V
CC
= 3.3V 0.3V, Normal Range
V
CC
= 2.7V to 3.6V, Extended Range
CMOS power levels (0.4
W typ. static)
All inputs, outputs, and I/O are 5V tolerant
Supports hot insertion
Available in SSOP, TSSOP, and TVSOP packages
FUNCTIONAL BLOCK DIAGRAM
APPLICATIONS:
5V and 3.3V mixed voltage systems
Data communication and telecommunication systems
DRIVE FEATURES:
High Output Drivers: 24mA
Reduced system switching noise
IDT74LVCH16260A
DESCRIPTION:
The LVCH16260A tri-port bus exchanger is built using advanced dual
metal CMOS technology. The LVCH16260A is a high-speed 12-bit latched
bus multiplexer/transceiver for use in high-speed microprocessor applica-
tions. This bus exchanger supports memory interleaving with latched out-
puts on the B ports and address multiplexing with latched inputs on the B
ports.
The LVCH16260A tri-port bus exchanger has three 12-bit ports. Data
may be transferred between the A port and either/both of the B ports. The
latch enable (LE1B, LE2B, LEA1B and LEA2B) inputs control data storage.
When a latch-enable input is high, the latch is transparent. When a latch-
enable input is low, the data at the input is latched and remains latched until
the latch enable input is returned high. Independent output enables (OE1B
and OE2B) allow reading from one port while writing to the other port.
All pins of the 12-bit Bus Exchanger can be driven from either 3.3V or
5V devices. This feature allows the use of the device as a translator in a
mixed 3.3V/5V supply system.
The LVCH16260A has been designed with a 24mA output driver. The
driver is capable of driving a moderate to heavy load while maintaining
speed performance.
The LVCH16260A has "bus-hold" which retains the inputs' last state
whenever the input goes to a high impedance. This prevents floating inputs
and eliminates the need for pull-up/down resistors.
3.3V CMOS 12-BIT
TRI-PORT BUS EXCHANGER
WITH 5 VOLT TOLERANT I/O
AND BUS-HOLD
LE1B
LEA1B
OE1B
SE L
OEA
A
1:12
LE2B
LEA2B
OE2B
A -1B
LATC H
1B -A
LATC H
A-2B
LATC H
2B -A
LATC H
M
U
X
1
0
12
12
12
12
12
12
12
1B
1:12
2B
1:12
12
12
29
30
2
28
1
27
56
55
INDUSTRIAL TEMPERATURE RANGE
2
IDT74LVCH16260A
3.3V CMOS 12-BIT TRI-PORT BUS EXCHANGER WITH 5V TOLERANT I/O
SSOP/ TSSOP/ TVSOP
TOP VIEW
PIN CONFIGURATION
Symbol
Description
Max
Unit
V
TERM
Terminal Voltage with Respect to GND
0.5 to +6.5
V
T
STG
Storage Temperature
65 to +150
C
I
OUT
DC Output Current
50 to +50
mA
I
IK
Continuous Clamp Current,
50
mA
I
OK
V
I
< 0 or V
O
< 0
I
CC
Continuous Current through each
100
mA
I
SS
V
CC
or GND
ABSOLUTE MAXIMUM RATINGS
(1)
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
NOTE:
1. As applicable to the device type.
Symbol
Parameter
(1)
Conditions
Typ.
Max.
Unit
C
IN
Input Capacitance
V
IN
= 0V
4.5
6
pF
C
OUT
Output Capacitance
V
OUT
= 0V
6.5
8
pF
C
I/O
I/O Port Capacitance
V
IN
= 0V
6.5
8
pF
CAPACITANCE
(T
A
= +25C, F = 1.0MHz)
OEA
2B
3
GND
2B
2
2B
1
V
CC
A
1
A
2
GND
A
3
A
4
A
5
A
6
A
8
A
9
GND
A
10
A
11
A
12
V
CC
1B
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
48
49
50
51
52
53
54
55
56
1
OE2B
2B
4
GND
2B
5
2B
6
V
CC
2B
7
2B
8
2B
9
2B
10
2B
11
2B
12
GND
1B
11
1B
10
1B
9
1B
8
GND
1B
7
1B
6
1B
5
GND
1B
3
LE2B
SEL
25
26
27
28
32
31
30
29
GND
1B
4
LEA1B
OE1B
A
7
1B
2
V
CC
1B
12
LE1B
LEA2B
INDUSTRIAL TEMPERATURE RANGE
IDT74LVCH16260A
3.3V CMOS 12-BIT TRI-PORT BUS EXCHANGER WITH 5V TOLERANT I/O
3
Inputs
Outputs
Ax
LEA1B
LEA2B OE1B OE2B
1Bx
2Bx
H
H
H
L
L
H
H
L
H
H
L
L
L
L
H
H
L
L
L
H
B
(2)
L
H
L
L
L
L
B
(2)
H
L
H
L
L
B
(2)
H
L
L
H
L
L
B
(2)
L
X
L
L
L
L
B
(2)
B
(2)
X
X
X
H
H
Z
Z
X
X
X
L
H
Active
Z
X
X
X
H
L
Z
Active
X
X
X
L
L
Active
Active
FUNCTION TABLES
(1)
Inputs
Outputs
1Bx
2Bx
SEL
LE1B
LE2B
OEA
Ax
H
X
H
H
X
L
H
L
X
H
H
X
L
L
X
X
H
L
X
L
A
(2)
X
H
L
X
H
L
H
X
L
L
X
H
L
L
X
X
L
X
L
L
A
(2)
X
X
X
X
X
H
Z
NOTES:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don't Care
Z = High-Impedance
2. A, B = Output level before the indicated steady-state input conditions were
established.
PIN DESCRIPTION
Signal
I/O
Description
A
(1:12)
I/O
Bidirectional Data Port A. Usually connected to the CPU's Address/Data bus.
(1)
1B
(1:12)
I/O
Bidirectional Data Port 1B. Connected to the even path or even bank of memory.
(1)
2B
(1:12)
I/O
Bidirectional Data Port 2B. Connected to the odd path or odd bank of memory.
(1)
LEA1B
I
Latch Enable Input for A-1B Latch. The Latch is open when LEA1B is HIGH. Data from the A-port is latched on the HIGH to
LOW transition of LEA1B.
LEA2B
I
Latch Enable Input for A-2B Latch. The Latch is open when LEA2B is HIGH. Data from the A-port is latched on the HIGH to LOW transition of
LEA2B.
LE1B
I
Latch Enable Input for 1B-A Latch. The Latch is open when LE1B is HIGH. Data from the 1B port is latched on the HIGH to LOW transition of
LE1B.
LE2B
I
Latch Enable Input for 2B-A Latch. The Latch is open when LE2B is HIGH. Data from the 2B port is latched on the HIGH to LOW transition of
LE2B.
SEL
I
1B or 2B Path Selection. When HIGH, SEL enables data transfer from 1B Port to A Port. When LOW, SEL enables data transfer from 2B Port
to A Port.
OEA
I
Output Enable for A Port (Active LOW).
OE1B
I
Output Enable for 1B Port (Active LOW).
OE2B
I
Output Enable for 2B Port (Active LOW).
NOTE:
1. These pins have "Bus-hold". All other pins are standard inputs, outputs, or I/Os.
INDUSTRIAL TEMPERATURE RANGE
4
IDT74LVCH16260A
3.3V CMOS 12-BIT TRI-PORT BUS EXCHANGER WITH 5V TOLERANT I/O
Symbol
Parameter
Test Conditions
Min.
Typ.
(1)
Max.
Unit
V
IH
Input HIGH Voltage Level
V
CC
= 2.3V to 2.7V
1.7
--
--
V
V
CC
= 2.7V to 3.6V
2
--
--
V
IL
Input LOW Voltage Level
V
CC
= 2.3V to 2.7V
--
--
0.7
V
V
CC
= 2.7V to 3.6V
--
--
0.8
I
IH
Input Leakage Current
V
CC
= 3.6V
V
I
= 0 to 5.5V
--
--
5
A
I
IL
I
OZH
High Impedance Output Current
V
CC
= 3.6V
V
O
= 0 to 5.5V
--
--
10
A
I
OZL
(3-State Output pins)
I
OFF
Input/Output Power Off Leakage
V
CC
= 0V, V
IN
or V
O
5.5V
--
--
50
A
V
IK
Clamp Diode Voltage
V
CC
= 2.3V, I
IN
= 18mA
--
0.7
1.2
V
V
H
Input Hysteresis
V
CC
= 3.3V
--
100
--
mV
I
CCL
Quiescent Power Supply Current
V
CC
= 3.6V
V
IN
= GND or V
CC
--
--
10
A
I
CCH
I
CCZ
3.6
V
IN
5.5V
(2)
--
--
10
I
CC
Quiescent Power Supply Current
One input at V
CC
- 0.6V, other inputs at V
CC
or GND
--
--
500
A
Variation
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Operating Condition: T
A
= 40C to +85C
NOTES:
1. Typical values are at V
CC
= 3.3V, +25C ambient.
2. This applies in the disabled state only.
BUS-HOLD CHARACTERISTICS
Symbol
Parameter
(1)
Test Conditions
Min.
Typ.
(2)
Max.
Unit
I
BHH
Bus-Hold Input Sustain Current
V
CC
= 3V
V
I
= 2V
75
--
--
A
I
BHL
V
I
= 0.8V
75
--
--
I
BHH
Bus-Hold Input Sustain Current
V
CC
= 2.3V
V
I
= 1.7V
--
--
--
A
I
BHL
V
I
= 0.7V
--
--
--
I
BHHO
Bus-Hold Input Overdrive Current
V
CC
= 3.6V
V
I
= 0 to 3.6V
--
--
500
A
I
BHLO
NOTES:
1. Pins with Bus-Hold are identified in the pin description.
2. Typical values are at V
CC
= 3.3V, +25C ambient.
INDUSTRIAL TEMPERATURE RANGE
IDT74LVCH16260A
3.3V CMOS 12-BIT TRI-PORT BUS EXCHANGER WITH 5V TOLERANT I/O
5
NOTE:
1. V
IH
and V
IL
must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the appropriate V
CC
range.
T
A
= 40C to + 85C.
OUTPUT DRIVE CHARACTERISTICS
Symbol
Parameter
Test Conditions
(1)
Min.
Max.
Unit
V
OH
Output HIGH Voltage
V
CC
= 2.3V to 3.6V
I
OH
= 0.1mA
V
CC
0.2
--
V
V
CC
= 2.3V
I
OH
= 6mA
2
--
V
CC
= 2.3V
I
OH
= 12mA
1.7
--
V
CC
= 2.7V
2.2
--
V
CC
= 3V
2.4
--
V
CC
= 3V
I
OH
= 24mA
2.2
--
V
OL
Output LOW Voltage
V
CC
= 2.3V to 3.6V
I
OL
= 0.1mA
--
0.2
V
V
CC
= 2.3V
I
OL
= 6mA
--
0.4
I
OL
= 12mA
--
0.7
V
CC
= 2.7V
I
OL
= 12mA
--
0.4
V
CC
= 3V
I
OL
= 24mA
--
0.55
OPERATING CHARACTERISTICS, V
CC
= 3.3V 0.3V, T
A
= 25C
Symbol
Parameter
Test Conditions
Typical
Unit
C
PD
Power Dissipation Capacitance per Bus Exchanger Outputs enabled
C
L
= 0pF, f = 10Mhz
pF
C
PD
Power Dissipation Capacitance per Bus Exchanger Outputs disabled
NOTES:
1. See TEST CIRCUITS AND WAVEFORMS. T
A
= 40C to + 85C.
2. Skew between any two outputs of the same package and switching in the same direction.
SWITCHING CHARACTERISTICS
(1)
V
CC
= 2.7V
V
CC
= 3.3V 0.3V
Symbol
Parameter
Min.
Max.
Min.
Max.
Unit
t
PLH
Propagation Delay
1.5
5.7
1.5
5
ns
t
PHL
Ax to 1Bx or Ax to 2Bx
t
PLH
Propagation Delay
1.5
6.1
1.5
5.2
ns
t
PHL
1Bx to Ax or 2Bx to Ax
t
PLH
Propagation Delay
1.5
6.1
1.5
5.2
ns
t
PHL
LExB to Ax
t
PLH
Propagation Delay
1.5
6.1
1.5
5
ns
t
PHL
LEA1B to 1Bx or LEA2B to 2Bx
t
PLH
Propagation Delay
1.5
6.3
1.5
5.2
ns
t
PHL
SEL to Ax
t
PZH
Output Enable Time
1.5
6.7
1.5
5.5
ns
t
PZL
OEA to Ax, OE1B to 1Bx, OE2B to 2Bx
t
PHZ
Output Disable Time
1.5
5.9
1.5
5.2
ns
t
PLZ
OEA to Ax, OE1B to 1Bx, OE2B to 2Bx
t
SU
Set-Up Time, HIGH or LOW Data to Latch
1
--
1
--
ns
t
H
Hold Time, Latch to Data
1.2
--
1
--
ns
t
W
Pulse Width, Latch HIGH
3
--
3
--
ns
t
SK
(o)
Output Skew
(2)
--
--
--
500
ps
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