Single T1/E1/J1 Long Haul /
Short Haul Transceiver
IDT82P2281
Version -
April 25, 2003
2975 Stender Way, Santa Clara, Califormia 95054
Telephone: (800) 345-7015 TWX: 910-338-2070 FAX: (408) 492-8674
Printed in U.S.A.
2001 Integrated Device Technology, Inc.
DISCLAIMER
Integrated Device Technology, Inc. reserves the right to make changes to its products or specifications at any time, without notice, in order to improve design or performance and to supply the best pos-
sible product. IDT does not assume any responsibility for use of any circuitry described other than the circuitry embodied in an IDT product. The Company makes no representations that circuitry
described herein is free from patent infringement or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent, patent rights or other
rights, of Integrated Device Technology, Inc.
LIFE SUPPORT POLICY
Integrated Device Technology's products are not authorized for use as critical components in life support devices or systems unless a specific written agreement pertaining to such intended use is exe-
cuted between the manufacturer and an officer of IDT.
1. Life support devices or systems are devices or systems which (a) are intended for surgical implant into the body or (b) support or sustain life and whose failure to perform, when properly used in
accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user.
2. A critical component is any components of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its
safety or effectiveness.
Table of Contents
i
April 25, 2003
Table of Contents
*Notice: The information in this document is subject to change without notice
FEATURES ........................................................................................................................................................................ 1
APPLICATIONS ................................................................................................................................................................ 1
BLOCK DIAGRAM ............................................................................................................................................................ 2
1 PIN ASSIGNMENT ........................................................................................................................................................... 3
2 PIN DESCRIPTION ........................................................................................................................................................... 4
3 FUNCTIONAL DESCRIPTION ........................................................................................................................................ 10
3.1 T1 / E1 / J1 MODE SELECTION .................................................................................................................................................................. 12
3.2 RECEIVER IMPEDANCE MATCHING ......................................................................................................................................................... 13
3.3 ADAPTIVE EQUALIZER .............................................................................................................................................................................. 15
3.4 DATA SLICER .............................................................................................................................................................................................. 15
3.5 CLOCK AND DATA RECOVERY ................................................................................................................................................................ 15
3.6 RECEIVE JITTER ATTENUATOR ............................................................................................................................................................... 16
3.7 DECODER .................................................................................................................................................................................................... 17
3.7.1 Line Code Rule ............................................................................................................................................................................... 17
3.7.1.1 T1 / J1 Mode .................................................................................................................................................................... 17
3.7.1.2 E1 Mode ........................................................................................................................................................................... 17
3.7.2 Decode Error Detection ................................................................................................................................................................. 17
3.7.2.1 T1 / J1 Mode .................................................................................................................................................................... 17
3.7.2.2 E1 Mode ........................................................................................................................................................................... 17
3.7.3 LOS Detection ................................................................................................................................................................................ 18
3.8 FRAME PROCESSOR ................................................................................................................................................................................. 21
3.8.1 T1/J1 Mode ...................................................................................................................................................................................... 21
3.8.1.1 Synchronization Searching ............................................................................................................................................... 21
3.8.1.1.1 Super Frame (SF) Format ............................................................................................................................. 21
3.8.1.1.2 Extended Super Frame (ESF) Format ........................................................................................................... 22
3.8.1.1.3 T1 Digital Multiplexer (DM) Format (T1 only) ................................................................................................ 23
3.8.1.1.4 Switch Line Carrier - 96 (SLC-96) Format (T1 only) ...................................................................................... 24
3.8.1.2 Error Event And Out Of Synchronization Detection .......................................................................................................... 25
3.8.1.2.1 Super Frame (SF) Format ............................................................................................................................. 25
3.8.1.2.2 Extended Super Frame (ESF) Format ........................................................................................................... 25
3.8.1.2.3 T1 Digital Multiplexer (DM) Format (T1 only) ................................................................................................ 25
3.8.1.2.4 Switch Line Carrier - 96 (SLC-96) Format (T1 only) ...................................................................................... 25
3.8.1.3 Overhead Extraction (T1 Mode SLC-96 Format Only) ..................................................................................................... 26
3.8.1.4 Interrupt Summary ............................................................................................................................................................ 26
3.8.2 E1 Mode .......................................................................................................................................................................................... 28
3.8.2.1 Synchronization Searching ............................................................................................................................................... 30
3.8.2.1.1 Basic Frame .................................................................................................................................................. 30
3.8.2.1.2 CRC Multi-Frame ........................................................................................................................................... 31
3.8.2.1.3 CAS Signaling Multi-Frame ........................................................................................................................... 32
3.8.2.2 Error Event And Out Of Synchronization Detection .......................................................................................................... 32
3.8.2.2.1 Out Of Basic Frame Synchronization ............................................................................................................ 33
3.8.2.2.2 Out Of CRC Multi-Frame Synchronization .................................................................................................... 33
3.8.2.2.3 Out Of CAS Signaling Multi-Frame Synchronization ..................................................................................... 33
3.8.2.3 Overhead Extraction ......................................................................................................................................................... 33
3.8.2.3.1 International Bit Extraction ............................................................................................................................. 33
3.8.2.3.2 Remote Alarm Indication Bit Extraction ......................................................................................................... 33
IDT82P2281
SINGLE T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
Table of Contents
ii
April 25, 2003
*Notice: The information in this document is subject to change without notice
3.8.2.3.3 National Bit Extraction ................................................................................................................................... 33
3.8.2.3.4 National Bit Codeword Extraction .................................................................................................................. 33
3.8.2.3.5 Extra Bit Extraction ........................................................................................................................................ 33
3.8.2.3.6 Remote Signaling Multi-Frame Alarm Indication Bit Extraction ..................................................................... 33
3.8.2.3.7 Sa6 Code Detection Per ETS 300 233 .......................................................................................................... 33
3.8.2.4 V5.2 Link .......................................................................................................................................................................... 34
3.8.2.5 Interrupt Summary ............................................................................................................................................................ 34
3.9 PERFORMANCE MONITOR ........................................................................................................................................................................ 36
3.9.1 T1/J1 Mode ...................................................................................................................................................................................... 36
3.9.2 E1 Mode .......................................................................................................................................................................................... 38
3.10 ALARM DETECTOR .................................................................................................................................................................................... 40
3.10.1 T1/J1 Mode ...................................................................................................................................................................................... 40
3.10.2 E1 Mode .......................................................................................................................................................................................... 42
3.11 HDLC RECEIVER ......................................................................................................................................................................................... 43
3.11.1 HDLC Channel Configuration ........................................................................................................................................................ 43
3.11.2 Two HDLC Modes ........................................................................................................................................................................... 43
3.11.2.1 HDLC Mode ...................................................................................................................................................................... 43
3.11.2.2 SS7 Mode ......................................................................................................................................................................... 45
3.12 BIT-ORIENTED MESSAGE RECEIVER (T1/J1 ONLY) .............................................................................................................................. 47
3.13 INBAND LOOPBACK CODE DETECTOR (T1/J1 ONLY) ........................................................................................................................... 47
3.14 ELASTIC STORE BUFFER .......................................................................................................................................................................... 48
3.15 RECEIVE CAS/RBS BUFFER ..................................................................................................................................................................... 48
3.15.1 T1/J1 Mode ...................................................................................................................................................................................... 48
3.15.2 E1 Mode .......................................................................................................................................................................................... 49
3.16 RECEIVE PAYLOAD CONTROL ................................................................................................................................................................. 51
3.17 RECEIVE SYSTEM INTERFACE ................................................................................................................................................................. 53
3.17.1 T1/J1 Mode ...................................................................................................................................................................................... 53
3.17.1.1 Receive Clock Master Mode ............................................................................................................................................ 53
3.17.1.1.1 Receive Clock Master Full T1/J1 Mode ......................................................................................................... 53
3.17.1.1.2 Receive Clock Master Fractional T1/J1 Mode ............................................................................................... 53
3.17.1.2 Receive Clock Slave Mode .............................................................................................................................................. 54
3.17.1.3 Receive Multiplexed Mode ............................................................................................................................................... 55
3.17.1.4 Offset ................................................................................................................................................................................ 55
3.17.1.5 Output On RSD/MRSD & RSIG/MRSIG ........................................................................................................................... 57
3.17.2 E1 Mode .......................................................................................................................................................................................... 58
3.17.2.1 Receive Clock Master Mode ............................................................................................................................................ 58
3.17.2.1.1 Receive Clock Master Full E1 Mode ............................................................................................................. 58
3.17.2.1.2 Receive Clock Master Fractional E1 Mode ................................................................................................... 58
3.17.2.2 Receive Clock Slave Mode .............................................................................................................................................. 58
3.17.2.3 Receive Multiplexed Mode ............................................................................................................................................... 59
3.17.2.4 Offset ................................................................................................................................................................................ 59
3.17.2.5 Output On RSD/MRSD & RSIG/MRSIG ........................................................................................................................... 59
3.18 TRANSMIT SYSTEM INTERFACE .............................................................................................................................................................. 60
3.18.1 T1/J1 Mode ...................................................................................................................................................................................... 60
3.18.1.1 Transmit Clock Master Mode ............................................................................................................................................ 60
3.18.1.1.1 Transmit Clock Master Full T1/J1 Mode ........................................................................................................ 60
3.18.1.1.2 Transmit Clock Master Fractional T1/J1 Mode .............................................................................................. 61
3.18.1.2 Transmit Clock Slave Mode ............................................................................................................................................. 61
3.18.1.3 Transmit Multiplexed Mode .............................................................................................................................................. 62
3.18.1.4 Offset ................................................................................................................................................................................ 62
3.18.2 E1 Mode .......................................................................................................................................................................................... 65
3.18.2.1 Transmit Clock Master Mode ............................................................................................................................................ 65
3.18.2.1.1 Transmit Clock Master Full E1 Mode ............................................................................................................ 65
3.18.2.1.2 Transmit Clock Master Fractional E1 Mode .................................................................................................. 65
IDT82P2281
SINGLE T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
Table of Contents
iii
April 25, 2003
*Notice: The information in this document is subject to change without notice
3.18.2.2 Transmit Clock Slave Mode ............................................................................................................................................. 65
3.18.2.3 Transmit Multiplexed Mode .............................................................................................................................................. 66
3.18.2.4 Offset ................................................................................................................................................................................ 66
3.19 TRANSMIT PAYLOAD CONTROL .............................................................................................................................................................. 67
3.20 FRAME GENERATOR ................................................................................................................................................................................. 68
3.20.1 Generation ...................................................................................................................................................................................... 68
3.20.1.1 T1 / J1 Mode .................................................................................................................................................................... 68
3.20.1.1.1 Super Frame (SF) Format ............................................................................................................................. 68
3.20.1.1.2 Extended Super Frame (ESF) Format ........................................................................................................... 68
3.20.1.1.3 T1 Digital Multiplexer (DM) Format (T1 only) ................................................................................................ 68
3.20.1.1.4 Switch Line Carrier - 96 (SLC-96) Format (T1 only) ...................................................................................... 68
3.20.1.1.5 Interrupt Summary ......................................................................................................................................... 69
3.20.1.2 E1 Mode ........................................................................................................................................................................... 70
3.20.1.2.1 Interrupt Summary ......................................................................................................................................... 71
3.20.2 HDLC Transmitter .......................................................................................................................................................................... 73
3.20.2.1 HDLC Channel Configuration ........................................................................................................................................... 73
3.20.2.2 Two HDLC Modes ............................................................................................................................................................ 73
3.20.2.2.1 HDLC Mode ................................................................................................................................................... 73
3.20.2.2.2 SS7 Mode ...................................................................................................................................................... 73
3.20.2.3 Interrupt Summary ............................................................................................................................................................ 74
3.20.2.4 Reset ................................................................................................................................................................................ 74
3.20.3 Automatic Performance Report Message (T1/J1 Only) .............................................................................................................. 75
3.20.4 Bit-Oriented Message Transmitter (T1/J1 Only) .......................................................................................................................... 76
3.20.5 Inband Loopback Code Generator (T1/J1 Only) .......................................................................................................................... 76
3.20.6 All `Zero's & All `One's ................................................................................................................................................................... 76
3.20.7 Change Of Frame Alignment ......................................................................................................................................................... 76
3.21 TRANSMIT BUFFER .................................................................................................................................................................................... 77
3.22 ENCODER .................................................................................................................................................................................................... 77
3.22.1 Line Code Rule ............................................................................................................................................................................... 77
3.22.1.1 T1/J1 Mode ...................................................................................................................................................................... 77
3.22.1.2 E1 Mode ........................................................................................................................................................................... 77
3.22.2 BPV Error Insertion ........................................................................................................................................................................ 77
3.22.3 All `One's Insertion ........................................................................................................................................................................ 77
3.23 TRANSMIT JITTER ATTENUATOR ............................................................................................................................................................ 78
3.24 WAVEFORM SHAPER / LINE BUILD OUT ................................................................................................................................................. 79
3.24.1 Preset Waveform Template ........................................................................................................................................................... 79
3.24.1.1 T1/J1 Mode ...................................................................................................................................................................... 79
3.24.1.2 E1 Mode ........................................................................................................................................................................... 79
3.24.2 Line Build Out (LBO) (T1 Only) ..................................................................................................................................................... 80
3.24.3 User-Programmable Arbitrary Waveform .................................................................................................................................... 80
3.25 LINE DRIVER ............................................................................................................................................................................................... 87
3.26 TRANSMITTER IMPEDANCE MATCHING ................................................................................................................................................. 88
3.27 TESTING AND DIAGNOSTIC FACILITIES ................................................................................................................................................. 89
3.27.1 PRBS Generator / Detector ........................................................................................................................................................... 89
3.27.1.1 Pattern Generator ............................................................................................................................................................. 89
3.27.1.2 Pattern Detector ............................................................................................................................................................... 89
3.27.2 Loopback ........................................................................................................................................................................................ 90
3.27.2.1 System Loopback ............................................................................................................................................................. 90
3.27.2.1.1 System Remote Loopback ............................................................................................................................ 90
3.27.2.1.2 System Local Loopback ................................................................................................................................ 90
3.27.2.2 Payload Loopback ............................................................................................................................................................ 91
3.27.2.3 Local Digital Loopback 1 .................................................................................................................................................. 91
3.27.2.4 Remote Loopback ............................................................................................................................................................ 91
3.27.2.5 Local Digital Loopback 2 .................................................................................................................................................. 91
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