JULY 2002

DSC-5653/1

.unctional Block Diagram

.eatures

True Dual-Ported memory cells which allow simultaneous
access of the same memory location

High-speed clock to data access
 Commercial: 6.5/7.5/9ns (max.)

Industrial: 7.5ns (max.)

Low-power operation
 IDT709169/59L

Active: 925mW (typ.)
Standby: 2.5mW (typ.)

Flow-Through or Pipelined output mode on either Port via
the

FT/PIPE pins

Counter enable and reset features

Dual chip enables allow for depth expansion without
additional logic

Full synchronous operation on both ports
 3.5ns setup to clock and 0ns hold on all control, data, and

address inputs

Data input, address, and control registers
Fast 6.5ns clock to data out in the Pipelined output mode
Self-timed write allows fast cycle time
10ns cycle time,100MHz operation in Pipelined output mode

TTL- compatible, single 5V (±10%) power supply

Industrial temperature range (40°C to +85°C) is
available for 83MHz

Available in a 100-pin Thin Quad Flatpack (TQFP) and 100-
pin fine pitch Ball Grid Array (fpBGA) packages.

HIGH-SPEED 16/8K x 9
SYNCHRONOUS PIPELINED
DUAL-PORT STATIC RAM

IDT709169/59L

0/1

/PIPE

I/O

Control

MEMORY

ARRAY

Counter/

Address

Reg.

I/O

Control

5653 drw 01

13R(1)

CLK

ADS

CNTEN

CNTRST

CLK

ADS

13L(1)

CNTEN

CNTRST

Counter/

Address

Reg.

I/O

- I/O

I/O

- I/O

0/1

/PIPE

PRELIMINARY

NOTE:
1. A

is a NC for IDT709159.

6.42

IDT709169/59L
High-Speed 16/8K x 9 Synchronous Pipelined Dual-Port Static RAM Industrial and Commercial Temperature Ranges

Preliminary

Index

26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50

100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76

100-Pin TQFP

Top View

(6)

NC
NC

10L

11L

12L

13L(1)

NC
NC

CNTRST

/PIPE

NC
NC

5653 drw 02

NC
NC
A

10R

11R

12R

13R(1)

NC
NC

GND
NC
NC
NC
NC

/PIPE

GND
NC

CNTRST

I
/
O

709169/59PF

PN100-1

(5)

06/28/02

Description

The IDT709169/59 is a high-speed 16/8K x 9 bit synchronous Dual-

Port RAM. The memory array utilizes Dual-Port memory cells to allow
simultaneous access of any address from both ports. Registers on
control, data, and address inputs provide minimal setup and hold
times. The timing latitude provided by this approach allows systems
to be designed with very short cycle times.

With an input data register, the IDT709169/59 has been optimized for

applications having unidirectional or bidirectional data flow in bursts.
An automatic power down feature, controlled by

and CE

permits

the on-chip circuitry of each port to enter a very low standby power
mode. Fabricated using IDT's CMOS high-performance technology,
these devices typically operate on only 925mW of power.

NOTES:
1. A

is a NC for IDT709159.

2. All V

pins must be connected to power supply.

3. All GND pins must be connected to ground supply.
4. Package body is approximately 14mm x 14mm x 1.4mm.
5. This package code is used to reference the package diagram.
6. This text does not indicate orientation of the actual part-marking.

Pin Configurations

(1,2,3,4)

6.42

IDT709169/59L
High-Speed 16/8K x 9 Synchronous Pipelined Dual-Port Static RAM Industrial and Commercial Temperature Ranges

Preliminary

C10

I/O

PL/

GND

I/O

D10

I/O

A10

CNTRST

GND

11R

10R

12R

CLK

GND

ADS

CNTEN

GND

CLK

CNTEN

12L

10L

11L

GND

B10

I/O

ADS

GND

I/O

E10

GND

I/O

F10

I/O

GND

G10

I/O

H10

I/O

GND

J10

I/O

CNTRST

PL/

K10

5653 drw 03

06/28/02

13R(

13L

(1)

709169/59BF

BF100

(5)

100-Pin fpBGA

Top View

(6)

NOTES:
1. A

is a NC for IDT709159.

2. All V

pins must be connected to power supply.

3. All GND pins must be connected to ground supply.
4. Package body is approximately 10mm x 10mm x 1.4mm with 0.8mm ball pitch.
5. This package code is used to reference the package diagram.
6. This text does not indicate orientation of the actual part-marking.

Pin Configurations

(con't.)

(1,2,3,4)

6.42

IDT709169/59L
High-Speed 16/8K x 9 Synchronous Pipelined Dual-Port Static RAM Industrial and Commercial Temperature Ranges

Preliminary

NOTES:
1. "H" = V

IH,

"L" = V

IL,

"X" = Don't Care.

ADS, CNTEN, CNTRST = X.

OE is an asynchronous input signal.

Truth Table IRead/Write and Enable Control

(1,2,3)

CLK

I/O

0-8

Mode

High-Z

Deselected--Power Down

High-Z

Deselected--Power Down

DATA

Write

DATA

OUT

Read

High-Z

Outputs Disabled

5653 tbl 02

Pin Names

NOTE:
1. A

is a NC for IDT709159.

Left Port

Right Port

Names

Chip Enables

R/W

Read/Write Enable

Output Enable

- A

13L

(1)

- A

13R

(1)

Address

I/O

- I/O

I/O

- I/O

Data Input/Output

CLK

Clock

ADS

Address Strobe

CNTEN

Counter Enable

CNTRST

Counter Reset

FT/PIPE

Flow-Through/Pipeline

Power (5V)

GND

Ground (0V)

5653 tbl 01

6.42

IDT709169/59L
High-Speed 16/8K x 9 Synchronous Pipelined Dual-Port Static RAM Industrial and Commercial Temperature Ranges

Preliminary

Recommended Operating

Temperature and Supply Voltage

Recommended DC Operating

Conditions

NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may

cause permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect reliability.

2. V

TERM

must not exceed V

+ 10% for more than 25% of the cycle time or 10ns

maximum, and is limited to < 20mA for the period of V

TERM

> V

+ 10%.

Absolute Maximum Ratings

(1)

NOTES:
1. These parameters are determined by device characterization, but are not

production tested.

2. 3dV references the interpolated capacitance when the input and output switch from

0V to 3V or from 3V to 0V.

3. C

OUT

also references C

I/O

Capacitance

(1)

= +25°C, f = 1.0MH

)

NOTES:
1. This is the parameter T

. This is the "instant on" case temperature.

NOTES:
1. V

TERM

must not exceed V

+ 10%.

2. V

> -1.5V for pulse width less than 10ns.

Grade

Ambient

Temperature

(1)

GND

Vcc

Commercial

C to +70

5.0V

10%

Industrial

-40

C to +85

5.0V

10%

5653 tbl 04

Symbol

Parameter

Min.

Typ.

Max.

Unit

Supply Voltage

4.5

5.0

5.5

GND

Ground

Input High Voltage

2.2

____

6.0

(1)

Input Low Voltage

-0.5

(2)

____

0.8

5653 tbl 05

Symbol

Parameter

Conditions

(2)

Max.

Unit

Input Capacitance

= 3dV

OUT

(3)

Output Capacitance

OUT

= 3dV

5653 tbl 07

Symbol

Rating

Commercial

& Industrial

Unit

TERM

(2)

Terminal Voltage
with Respect
to GND

-0.5 to +7.0

BIAS

Temperature

Under Bias

-55 to +125

STG

Storage

Temperature

-65 to +150

OUT

DC Output
Current

5653 tbl 06

NOTES:
1. "H" = V

IH,

"L" = V

IL,

"X" = Don't Care.

and

OE = V

; CE

and R/

W = V

3. Outputs configured in Flow-Through Output mode: if outputs are in Pipelined mode the data out will be delayed by one cycle.
4.

ADS and CNTRST are independent of all other signals including CE

and CE

5. The address counter advances if

CNTEN = V

on the rising edge of CLK, regardless of all other signals including

and CE

Truth Table IIAddress Counter Control

(1,2)

External

Address

Previous

Internal

Address

Internal

Address

Used

CLK

ADS

CNTEN

CNTRST

I/O

(3)

MODE

(4)

I/O

(n)

External Address Used

An + 1

(5)

I/O

(n+1)

Counter Enabled--Internal Address generation

An + 1

I/O

(n+1)

External Addre ss Blocked--Counter disabled (An + 1 reused)

(4)

I/O

(0)

Counter Reset to Address 0

5653 tbl 03

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