1
IDT54/74FCT827A/B/C
HIGH PERFORMANCE CMOS BUFFER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
JULY 1999
1999 Integrated Device Technology, Inc.
DSC-4612/2
c
IDT54/74FCT827A/B/C
MILITARY AND COMMERCIAL TEMPERATURE RANGES
HIGH PERFORMANCE
CMOS BUFFER
DESCRIPTION:
The IDT54/74FCT800 series is built using an advanced dual metal
CMOS technology.
The IDT54/74FCT827A/B/C 10-bit bus drivers provide high-perform-
ance bus interface buffering for wide data/address paths or buses carrying
parity. The 10-bit buffers have NAND-ed output enables for maximum
control flexibility.
All of the IDT54/74FCT800 high-performance interface family are de-
signed for high-capacitance load drive capability, while providing low-
capacitance bus loading at both inputs and outputs. All inputs have clamp
diodes and all outputs are designed for low-capacitance bus loading in high-
impedance state.
FUNCTIONAL BLOCK DIAGRAM
FEATURES:
-
Faster than AMD's Am29827 series
-
Equivalent to AMD's Am29827 bipolar buffers in pinout/function,
speed and output drive over full temperature and voltage supply
extremes
-
IDT54/74FCT827A equivalent to FASTTM
-
IDT54/74FCT827B 35% faster than FAST
-
IDT54/74FCT827C 45% faster than FAST
-
IOL = 48mA (commercial), and 32mA (military)
-
Clamp diodes on all inputs for ringing suppression
-
CMOS power levels (1mW typ. static)
-
TTL input and output level compatible
-
CMOS output level compatible
-
Substantially lower input current levels than AMD's bipolar
Am29800 series (5 A max.)
-
Product available in Radiation Tolerant and Radiation Enhanced
versions
-
Military product compliant to MIL-STD-883, Class B
D
0
Y
0
D
1
Y
1
D
2
Y
2
D
3
Y
3
D
4
Y
4
D
5
Y
5
D
6
Y
6
D
7
Y
7
D
8
Y
8
D
9
Y
9
OE
1
OE
2
PRODUCT SELECTOR GUIDE
10-Bit Buffer
Non-inverting
IDT54/74FCT827A/B/C
2
MILITARY AND COMMERCIAL TEMPERATURE RANGES
IDT54/74FCT827A/B/C
HIGH PERFORMANCE CMOS BUFFER
DIP/ SOIC/ CERPACK
TOP VIEW
PIN CONFIGURATION
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
Rating
Commercial
Military
Unit
V
TERM(2)
Terminal Voltage
with Respect to GND
0.5 to +7
0.5 to +7
V
V
TERM(3)
Terminal Voltage
with Respect to GND
0.5 to V
CC
0.5 to V
CC
V
T
A
Operating Temperature
0 to +70
55 to +125
C
T
BIAS
Temperature Under
Bias
55 to +125
65 to +135
C
T
STG
Storage Temperature
55 to +125
65 to +150
C
P
T
Power Dissipation
0.5
0.5
W
I
OUT
DC Output Current
120
120
mA
8-link
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability. No
terminal voltage may exceed V
CC
by +.5V unless otherwise noted.
2. Input and V
CC
terminals only.
3. Outputs and I/O terminals only.
CAPACITANCE (T
A
= +25
O
C, f = 1.0MHz)
Symbol
Parameter
(1)
Conditions
Typ.
Max.
Unit
C
IN
Input Capacitance
V
IN
= 0V
6
10
pF
C
OUT
Output
Capacitance
V
OUT
= 0V
8
12
pF
8-link
NOTE:
1. This parameter is measured at characterization but not tested.
LOGIC SYMBOL
LCC
TOP VIEW
2
3
1
20
19
18
15
16
9
10
D
6
D
7
D
2
D
5
D
3
D
4
D
8
23
22
24
21
17
5
6
7
4
P24-1
D24-1
SO24-2
E24-1
8
D
0
V
CC
OE
2
OE
1
13
14
11
12
D
1
GND
D
9
Y
6
Y
7
Y
2
Y
5
Y
3
Y
4
Y
8
Y
0
Y
1
Y
9
15
16
NC
12
13
14
GN
D
D
8
17
18
OE
2
Y
9
Y
8
NC
V
CC
OE
1
D
1
D
0
Y
0
Y
1
Y
3
NC
Y
4
5
6
8
7
9
10
11
1
28
4
3
2
27
26
25
24
22
23
21
20
19
D
5
NC
D
3
D
4
D
2
D
7
D
6
INDEX
L28-1
Y
5
D
9
Y
2
Y
7
Y
6
OE
1
D
0-9
Y
0-9
10
OE
2
10
3
IDT54/74FCT827A/B/C
HIGH PERFORMANCE CMOS BUFFER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN DESCRIPTION
Name
I/O
Description
OE
I
I
When both are LOW, the outputs are enabled. When
either one or both are HIGH, the outputs are High Z.
D
I
I
10-bit data input.
Y
I
O
10-bit data output.
FUNCTION TABLE
(1)
Inputs
Output
OE
1
OE
2
D
I
Y
I
Function
L
L
L
L
L
H
L
H
Transparent
H
X
X
H
X
X
Z
Z
Three-State
NOTE:
1. H = HIGH
L = LOW
X = Don't Care
Z = High-Impedance
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: V
LC
= 0.2V; V
HC
= V
CC
0.2V
Commercial: T
A
= 0C to +70C, V
CC
= 5.0V 5%; Military: T
A
= 55C to +125C, V
CC
= 5.0V 10%
Symbol
Parameter
Test Conditions
(1)
Min.
Typ.
(2)
Max.
Unit
V
IH
Input HIGH Level
Guaranteed Logic HIGH Level
2
--
--
V
V
IL
Input LOW Level
Guaranteed Logic LOW Level
--
--
0.8
V
I
IH
Input HIGH Current
V
CC
= Max.
V
I
= V
CC
--
--
5
A
V
I
= 2.7V
--
--
5
(4)
I
IL
Input LOW Current
V
I
= 0.5V
--
--
5
(4)
V
I
= GND
--
--
5
I
OZH
Off State (High Impedance)
V
CC
= Max.
V
O
= V
CC
--
--
10
A
Output Current
V
O
= 2.7V
--
--
10
(4)
I
OZL
V
O
= 0.5V
--
--
10
(4)
V
O
= GND
--
--
10
V
IK
Clamp Diode Voltage
V
CC
= Min., I
N
= 18mA
--
0.7
1.2
V
I
OS
Short Circuit Current
V
CC
= Max.
(3)
, V
O
= GND
75
120
--
mA
V
OH
Output HIGH Voltage
V
CC
= 3V, V
IN
= V
LC
or V
HC
, I
OH
= 32 A
V
HC
V
CC
--
V
V
CC
= Min.
I
OH
= 300 A
V
HC
V
CC
--
V
IN
= V
IH
or V
IL
I
OH
= 15mA MIL.
2.4
4.3
--
I
OH
= 24mA COM'L.
2.4
4.3
--
V
OL
Output LOW Voltage
V
CC
= 3V, V
IN
= V
LC
or V
HC
, I
OL
= 300 A
--
GND
V
LC
V
V
CC
= Min.
I
OL
= 300 A
--
GND
V
LC(4)
V
IN
= V
IH
or V
IL
I
OL
= 32mA MIL.
--
0.3
0.5
I
OL
= 48mA COM'L.
--
0.3
0.5
NOTES:
1. For conditions shown as max. or min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25C ambient and maximum loading.
3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second.
4. This parameter is guaranteed but not tested.
4
MILITARY AND COMMERCIAL TEMPERATURE RANGES
IDT54/74FCT827A/B/C
HIGH PERFORMANCE CMOS BUFFER
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25C ambient.
3. Per TTL driven input (V
IN
= 3.4V); all other inputs at V
CC
or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
5. Values for these conditions are examples of the I
CC
formula. These limits are guaranteed but not tested.
6. I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
I
CC
D
H
N
T
+ I
CCD
(f
CP
/2 + f
i
N
i
)
I
CC
= Quiescent Current
I
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for Register Devices (Zero for Non-Register Devices)
f
i
= Input Frequency
N
i
= Number of Inputs at f
i
All currents are in milliamps and all frequencies are in megahertz.
POWER SUPPLY CHARACTERISTICS
(V
LC
= 0.2V; V
HC
= V
CC
0.2V)
Symbol
Parameter
Test Conditions
(1)
Min.
Typ.
(2)
Max.
Unit
I
CC
Quiescent Power Supply Current
V
CC
= Max.
V
IN
V
HC
; V
IN
V
LC
--
0.2
1.5
mA
I
CC
Quiescent Power Supply Current
TTL Inputs HIGH
V
CC
= Max.
V
IN
= 3.4V
(3)
--
0.5
2
mA
I
CCD
Dynamic Power Supply Current
(4)
V
CC
= Max.
Outputs Open
OE
1
=
OE
2
= GND
One Input Toggling
50% Duty Cycle
V
IN
V
HC
V
IN
V
LC
--
0.15
0.25
mA/
MHz
I
C
Total Power Supply Current
(6)
V
CC
= Max.
Outputs Open
fi = 10MHz
V
IN
V
HC
V
IN
V
LC
(FCT)
--
1.7
4
mA
50% Duty Cycle
OE
1
=
OE
2
= GND
One Bit Toggling
V
IN
= 3.4V
V
IN
= GND
--
2
5
V
CC
= Max.
Outputs Open
fi = 2.5MHz
V
IN
V
HC
V
IN
V
LC
(FCT)
--
3.2
6.5
(5)
50% Duty Cycle
OE
1
=
OE
2
= GND
Eight Bits Toggling
V
IN
= 3.4V
V
IN
= GND
--
5.2
14.5
(5)
5
IDT54/74FCT827A/B/C
HIGH PERFORMANCE CMOS BUFFER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS
IDT54/74FCT827A
IDT54/74FCT827B
IDT54/74FCT827C
Com'l.
Mil.
Com'l.
Mil.
Com'l.
Mil.
Parameter
Description
Conditions
(1)
Min
.
(2)
Max
.
Min
.
(2)
Max
.
Min
.
(2)
Max
.
Min
.
(2)
Max
.
Min
.
(2)
Max
.
Min
.
(2)
Max
.
Unit
t
PLH
t
PHL
Propagation Delay
D
I
to Y
I
C
L
= 50pF
R
L
= 500
1.5
8
1.5
9
1.5
5
1.5
6.5
1.5
4.4
1.5
5
ns
C
L
= 300pF
(3)
R
L
= 500
1.5
15
1.5
17
1.5
13
1.5
14
1.5
10
1.5
11
t
PZH
t
PZL
Output Enable Time
OE
I
to Y
I
C
L
= 50pF
R
L
= 500
1.5
12
1.5
13
1.5
8
1.5
9
1.5
7
1.5
8
ns
C
L
= 300pF
(3)
R
L
= 500
1.5
23
1.5
25
1.5
15
1.5
16
1.5
14
1.5
15
t
PHZ
t
PLZ
Output Disable Time
OE
I
to Y
I
C
L
= 5pF
(3)
R
L
= 500
1.5
9
1.5
9
1.5
6
1.5
7
1.5
5.7
1.5
6.7
ns
C
L
= 50pF
R
L
= 500
1.5
10
1.5
10
1.5
7
1.5
8
1.5
6
1.5
7
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. These parameters are guaranteed but not tested.
6
MILITARY AND COMMERCIAL TEMPERATURE RANGES
IDT54/74FCT827A/B/C
HIGH PERFORMANCE CMOS BUFFER
Pulse
Generator
R
T
D.U.T.
V
CC
V
IN
C
L
V
OUT
50pF
500
500
7.0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
DATA
IN PU T
TIM IN G
IN PU T
ASYN CH R ON OUS C ON TROL
PRES ET
CLEAR
ETC.
SYNC HRO N OU S CON TRO L
t
SU
t
H
t
REM
t
SU
t
H
HIGH-LOW -HIGH
PULSE
LO W -H IGH -LOW
PULSE
t
W
1.5V
1.5V
SAM E PHASE
IN PU T TR ANSITION
3V
1.5V
0V
1.5V
V
OH
t
PLH
OU TPUT
OPPOSITE P HASE
IN PU T TR ANSITION
3V
1.5V
0V
t
PLH
t
PH L
t
PH L
V
OL
CO NTR OL
IN PU T
3V
1.5V
0V
3.5V
0V
OU TPUT
NO RM A LLY
LO W
OU TPUT
NO RM A LLY
HIGH
SW ITC H
CLOSE D
SW ITC H
OPEN
V
OL
0.3V
0.3V
t
PLZ
t
PZL
t
PZH
t
PHZ
3.5V
0V
1.5V
1.5V
ENAB LE
DISA BLE
V
OH
PRES ET
CLEAR
CLOC K ENABLE
ETC.
O ctal lin k
O ctal lin k
O ctal lin k
O ctal lin k
O ctal lin k
TEST CIRCUITS AND WAVEFORMS
PROPAGATION DELAY
TEST CIRCUITS FOR ALL OUTPUTS
ENABLE AND DISABLE TIMES
SET-UP, HOLD, AND RELEASE TIMES
PULSE WIDTH
SWITCH POSITION
Test
Switch
Open Drain
Disable Low
Closed
Enable Low
All Other Tests
Open
8-link
DEFINITIONS:
C
L
= Load capacitance: includes jig and probe capacitance.
R
T
= Termination resistance: should be equal to Z
OUT
of the Pulse
Generator.
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control
Disable-HIGH.
2. Pulse Generator for All Pulses: Rate
1.0MHz; Zo
50
;
t
F
2.5ns;
t
R
2.5ns.
7
IDT54/74FCT827A/B/C
HIGH PERFORMANCE CMOS BUFFER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
CORPORATE HEADQUARTERS
for SALES:
2975 Stender Way
800-345-7015 or 408-727-6116
Santa Clara, CA 95054
fax: 408-492-8674
www.idt.com*
*To search for sales office near you, please click the sales button found on our home page or dial the 800# above and press 2.
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
ORDERING INFORMATION
XX XX
D evice Type
X
Package
X
Process
Blank
B
P
D
E
L
SO
827A
827B
827C
C om m ercial
M IL-STD -883, C lass B
Plastic D IP (P24-1)
C ER D IP (D 24-1)
C ER PAC K (E24-1)
Leadless C hip C arrier (L28-1)
Sm all Outline IC (SO 24-1)
N on-Inverting 10-B it Buffer
54
74
- 55C to +125C
0C to +70C
FC T
Tem p. R ange
ID T
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