INDUSTRIAL TEMPERATURE RANGE

IDT74SSTV16859
13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O

MARCH 2002

2002 Integrated Device Technology, Inc.

DSC-5947/4

IDT74SSTV16859

PRELIMINARY

INDUSTRIAL TEMPERATURE RANGE

FUNCTIONAL BLOCK DIAGRAM

13-BIT TO 26-BIT REGISTERED

BUFFER WITH SSTL I/O

DESCRIPTION:

The SSTV16859 is a 13-bit to 26-bit registered buffer designed for 2.3V-

2.7V V

and supports low standby operation. All data inputs and outputs

are SSTL_2 level compatible with JEDEC standard for SSTL_2.

RESET is an LVCMOS input since it must operate predictably during the

power-up phase. RESET, which can be operated independent of CLK and
CLK, must be held in the low state during power-up in order to ensure
predictable outputs (low state) before a stable clock has been applied.

RESET, when in the low state, will disable all input receivers, reset all

registers, and force all outputs to a low state, before a stable clock has been
applied. With inputs held low and a stable clock applied, outputs will remain
low during the Low-to-High transition of RESET.

APPLICATIONS:

· Ideally suited for DIMM DDR registered applications

RESET

CLK

REF

TO 12 OTH ER CHANNELS

FEATURES:

· 2.3V to 2.7V Operation
· SSTL_2 Class II style data inputs/outputs
· Differential CLK input
· RESET control compatible with LVCMOS levels
· Latch-up performance exceeds 100mA
· ESD >2000V per MIL-STD-883, Method 3015; >200V using

machine model (C = 200pF, R = 0)

· Available in 56 pin MLF and 64 pin TSSOP packages

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

INDUSTRIAL TEMPERATURE RANGE

IDT74SSTV16859
13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O

PIN CONFIGURATIONS

TSSOP

TOP VIEW

13A

12A

G ND

G N D

DD Q

D D Q

D DQ

R ESET

D D

G N D

11A

10A

G ND

13B

DD Q

12B

11B

10B

G ND

DD Q

G N D

C LK

D DQ

D D

R EF

G N D

D DQ

D D

G N D

D DQ

FUNCTION TABLE

(1)

Input

RESET

CLK

Q Outputs

L or H

(2)

NOTES:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don't Care
= LOW to HIGH
= HIGH to LOW
2. Qo = Output level before the indicated steady-state conditions were established.

ABSOLUTE MAXIMUM RATINGS

(1)

Symbol

Description

Max.

Unit

or V

DDQ

Supply Voltage Range

0.5 to 3.6

(2)

Input Voltage Range

0.5 to V

+0.5

(3)

Output Voltage Range

0.5 to V

DDQ

+0.5

Input Clamp Current, V

< 0

Output Clamp Current,

±50

< 0 or V

> V

DDQ

Continuous Output Current,

±50

= 0 to V

DDQ

Continuous Current through each

±100

, V

DDQ

or GND

STG

Storage Temperature Range

65 to +150

°C

NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause

permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.

2. The input and output negative voltage ratings may be exceeded if the ratings of the

I/P and O/P clamp current are observed.

3. The output current will flow if the following conditions are observed:

a) Output in HIGH state
b) V

= V

DDQ

MLF

TOP VIEW

13B

DDQ

12B

11B

10B

RESET

GND

CLK

DDQ

REF

GND

INDUSTRIAL TEMPERATURE RANGE

IDT74SSTV16859
13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O

PIN DESCRIPTION

Pin Names

Description

- Q

Data Output

GND

Ground

DDQ

Output-stage drain power voltage

Logic power voltage

RESET

Asynchronous reset input - resets registers and disables data and clock differential input recievers

REF

Input reference voltage

CLK

Positive master clock input

CLK

Negative master clock input

- D

Data Input - clocked in on the crossing of the rising edge of CLK and the falling edge of CLK

Center PAD

Ground (MLF package only)

Symbol

Parameter

Test Conditions

Min.

Typ.

Max.

Unit

Control Inputs

= 2.3V, I

-18mA

1.2

= 2.3V to 2.7V, I

= -100

µA

0.2

= 2.3V, I

= -16mA

1.95

= 2.3V to 2.7V, I

= 100

µA

0.2

= 2.3V, I

= 16mA

0.35

All Inputs

= 2.7V,VI = V

or GND

±5

µA

Static Standby

= 0, V

= 2.7V, RESET = GND

0.01

Static Operating

= 0, V

= 2.7V, RESET = V

, V

= V

IH (AC)

or V

IL (AC)

Dynamic Operating (Clock Only)

= 0, V

= 2.7V, RESET = V

, V

= V

IH (AC)

or V

IL (AC)

µA/Clock

CLK and CLK Switching 50% Duty Cycle.

MHz

DDD

Dynamic Operating

= 0, V

= 2.7V, RESET = V

, V

= V

IH (AC)

or V

IL (AC)

µA/Clock

(Per Each Data Input)

(1)

CLK and CLK Switching 50% Duty Cycle. One Data Input

MHz/Data

Switching at Half Clock Frequency, 50% Duty Cycle.

Input

Output HIGH

= 2.3V to 2.7V, I

= -20mA

Output LOW

= 2.3V to 2.7V, I

= 20mA

)

| r

- r

| each separate bit

= 2.5V, T

= 25°C, I

= -20mA

Data Inputs

= 2.5V, V

= V

REF

± 310mV

CLK and CLK

ICR

= 1.25V, V

I (PP)

= 360mV

RESET

= V

or GND

NOTE:
1. Power dissipation levels will allow operation at DDR333 speeds without excessive die temperature.

DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE

Following Conditions Apply Unless Otherwise Specified:
Operating Condition: T

= 40°C to +85°C, V

= 2.5V ±0.2V, V

DDQ

= 2.5V ±0.2V

INDUSTRIAL TEMPERATURE RANGE

IDT74SSTV16859
13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O

OPERATING CHARACTERISTICS, T

= 25ºC

(1)

Symbol

Parameter

Min.

Typ.

(1)

Max.

Unit

Supply Voltage

DDQ

2.7

DDQ

Output Supply Voltage

2.3

2.5

2.7

REF

Reference Voltage (V

REF

= V

DDQ

/2)

1.15

1.25

1.35

Termination Voltage

REF

40mV

REF

+ 40mV

Input Voltage

AC High-Level Input Voltage

Data Inputs

REF

+ 310mV

AC Low-Level Input Voltage

Data Inputs

REF

310mV

DC High-Level Input Voltage

Data Inputs

REF

+ 150mV

DC Low-Level Input Voltage

Data Inputs

REF

150mV

High-Level Input Voltage

RESET

1.7

Low-Level Input Voltage

RESET

0.7

ICR

Common-Mode Input Range

CLK, CLK

0.97

1.53

I (PP)

Peak-to-Peak Input Voltage

CLK, CLK

360

High-Level Output Current

Low-Level Output Current

Operating Free-Air Temperature

+85

°C

NOTE:
1. The RESET input of the device must be held at V

or GND to ensure proper device operation.

SWITCHING CHARACTERISTICS OVER RECOMMENDED FREE-AIR OPERATING

RANGE (UNLESS OTHERWISE NOTED)

= 2.5V ± 0.2V

Symbol

Parameter

Min

Max.

Unit

MAX

200

MHz

CLK and CLK to Q

1.1

2.8

PHL

RESET to Q

TIMING REQUIREMENTS OVER RECOMMENDED OPERATING FREE-AIR

TEMPERATURE RANGE

= 2.5V ± 0.2V

Symbol

Parameter

Min.

Max.

Unit

CLOCK

Clock Frequency

200

MHz

Pulse Duration, CLK, CLK HIGH or LOW

2.5

ACT

Differential Inputs Active Time

(1)

INACT

Differential Inputs Inactive Time

(2)

Setup Time, Fast Slew Rate

(3, 5)

Data Before CLK

, CLK

0.75

Setup Time, Slow Slew Rate

(4, 5)

0.9

Hold Time, Fast Slew Rate

(3,5)

Data Before CLK

, CLK

0.75

Hold Time, Slow Slew Rate

(2,5)

0.9

NOTES:
1. Data inputs must be low a minimum time of t

ACT

max., after RESET is taken HIGH.

2. Data and clock inputs must be held at valid levels (not floating) a minimum time of t

INACT

max., after RESET is taken LOW.

3. For data signal input slew rate is

1V/ns.

4. For data signal input slew rate is

0.5V/ns and <1V/ns.

5. CLK, CLK signal input slew rates are

1V/ns.

INDUSTRIAL TEMPERATURE RANGE

IDT74SSTV16859
13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O

TEST CIRCUITS AND WAVEFORMS (V

= 2.5V ± 0.2V)

Tim ing

Input

IC R

I(PP )

PLH

PH L

Output

O H

O L

IC R

O H

O L

PH L

D D

LVCM OS

RESET

Input

Output

R E F

RE F

Input

R EF

R E F

Input

IC R

I(P P)

Tim ing

Input

From Output
Under Test

= 50

= 30 pF

(see note 1)

Test Point

LVCM OS

RESET

Input

D D

IN AC T

AC T

90%

(see note 2)

10%

Voltage Waveforms - Pulse Duration

NOTES:
1. C

includes probe and jig capacitance.

2. I

tested with clock and data inputs held at V

or GND, and I

= 0mA.

3. All input pulses are supplied by generators having the following characteristics: PRR

10MHz, Z

= 50

, input slew rate = 1 V/ns ±20% (unless otherwise specified).

4. The outputs are measured one at a time with one transition per measurement.
5. V

= V

REF

= V

DDQ

6. V

= V

REF

+ 310mV (AC voltage levels) for differential inputs. V

= V

for LVCMOS input.

7. V

= V

REF

- 310mV (AC voltage levels) for differential inputs. V

= GND for LVCMOS input.

8. t

PLH

and t

PHL

are the same as t

Load Circuit

Voltage Waveforms - Setup and Hold Times

Voltage Waveforms - Propagation Delay Times

Voltage and Current Waveforms

Inputs Active and Inactive Times

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