TECHNICAL DATA
1
8-Bit Shift Register
High-Voltage Silicon-Gate CMOS
The IW4021B is an Edge-Triggered 8-Bit Shift Register (Parallel-
to-Serial Converter) with a synchronous Serial Data Input (D
S
), a
Clock Input (CP), an asynchronous active HIGH Parallel Load Input
(PL), eight asynchronous Parallel Data Inputs (P
0
-P
7
) and Buffered
Parallel Outputs from the last three stages (Q
5
-Q
7
).
Information on the Parallel Data Inputs (P0-P7) is asynchronously
loaded into the register while the Parallel Load Input (PL) is HIGH,
independent of the Clock (CP) and Serial Data (D
S
) inputs. Data
present in the register is stored on the HIGH-to-LOW transition of the
Parallel Load Input (PL).
When the Parallel Load Input is LOW, data on the Serial Data
Input (D
S
) is shifted into the first register position and all the data in
the register is shifted one position to the right on the LOW-to-HIGH
transition of the Clock Input (CP).
Operating Voltage Range: 3.0 to 18 V
Maximum input current of 1
A at 18 V over full package-
temperature range; 100 nA at 18 V and 25
C
Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
IW4021B
ORDERING INFORMATION
IW4021BN Plastic
IW4021BDW SOIC
T
A
= -55
to 125
C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
PIN 16 =V
CC
PIN 8 = GND
FUNCTION TABLE
SERIAL OPERATION:
t
CP
D
S
PL
Q
5
t=n+6
Q
6
t=n+7
Q
7
t=n+8
n
0
0
0
n+1
1
0
1
0
n+2
0
0
0
1
0
n+3
1
0
1
0
1
X
0
Q
5
Q
6
Q
7
PARALLEL OPERATION:
CP
D
S
PL
P
5
P
6
P
7
Q
5
Q
6
Q
7
X
X
1
D
D
D
D
D
D
X = don't care
D = 1 or 0
IW4021B
2
MAXIMUM RATINGS
*
Symbol
Parameter
Value
Unit
V
CC
DC Supply Voltage (Referenced to GND)
-0.5 to +20
V
V
IN
DC Input Voltage (Referenced to GND)
-0.5 to V
CC
+0.5
V
V
OUT
DC Output Voltage (Referenced to GND)
-0.5 to V
CC
+0.5
V
I
IN
DC Input Current, per Pin
10
mA
P
D
Power Dissipation in Still Air, Plastic DIP+
SOIC Package+
750
500
mW
P
D
Power Dissipation per Output Transistor
100
mW
Tstg
Storage Temperature
-65 to +150
C
T
L
Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
260
C
*
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/
C from 65
to 125
C
SOIC Package: : - 7 mW/
C from 65
to 125
C
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Max
Unit
V
CC
DC Supply Voltage (Referenced to GND)
3.0
18
V
V
IN
, V
OUT
DC Input Voltage, Output Voltage (Referenced to GND)
0
V
CC
V
T
A
Operating Temperature, All Package Types
-55
+125
C
This device contains protection circuitry to guard against damage due to high static voltages or electric
fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated
voltages to this high-impedance circuit. For proper operation, V
IN
and V
OUT
should be constrained to the range
GND
(V
IN
or V
OUT
)
V
CC
.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V
CC
).
Unused outputs must be left open.
IW4021B
3
DC ELECTRICAL CHARACTERISTICS
(Voltages Referenced to GND)
V
CC
Guaranteed Limit
Symbol
Parameter
Test Conditions
V
-55
C
25
C
125
C
Unit
V
IH
Minimum High-Level
Input Voltage
V
OUT
=0.5 V or V
CC
- 0.5 V
V
OUT
=1.0 V or V
CC
- 1.0 V
V
OUT
=1.5 V or V
CC
- 1.5 V
5.0
10
15
3.5
7
11
3.5
7
11
3.5
7
11
V
V
IL
Maximum Low -Level
Input Voltage
V
OUT
=0.5 V or V
CC
- 0.5 V
V
OUT
=1.0 V or V
CC
- 1.0 V
V
OUT
=1.5 V or V
CC
- 1.5 V
5.0
10
15
1.5
3
4
1.5
3
4
1.5
3
4
V
V
OH
Minimum High-Level
Output Voltage
V
IN
=GND or V
CC
5.0
10
15
4.95
9.95
14.95
4.95
9.95
14.95
4.95
9.95
14.95
V
V
OL
Maximum Low-Level
Output Voltage
V
IN
=GND or V
CC
5.0
10
15
0.05
0.05
0.05
0.05
0.05
0.05
0.05
0.05
0.05
V
I
IN
Maximum Input
Leakage Current
V
IN
= GND or V
CC
18
0.1
0.1
1.0
A
I
CC
Maximum Quiescent
Supply Current
(per Package)
V
IN
= GND or V
CC
5.0
10
15
20
5.0
10
20
100
5.0
10
20
100
150
300
600
3000
A
I
OL
Minimum Output Low
(Sink) Current
V
IN
= GND or V
CC
V
OL
=0.4 V
V
OL
=0.5 V
V
OL
=1.5 V
5.0
10
15
0.64
1.6
4.2
0.51
1.3
3.4
0.36
0.9
2.4
mA
I
OH
Minimum Output High
(Source) Current
V
IN
= GND or V
CC
V
OH
=2.5 V
V
OH
=4.6 V
V
OH
=9.5 V
V
OH
=13.5 V
5.0
5.0
10
15
-2.0
-0.64
-1.6
-4.2
-1.6
-0.51
-1.3
-3.4
-1.15
-0.36
-0.9
-2.4
mA
AC ELECTRICAL CHARACTERISTICS
(C
L
=50pF, R
L
=200 k
, Input t
r
=t
f
=20 ns)
V
CC
Guaranteed Limit
Symbol
Parameter
V
-55
C
25
C
125
C
Unit
f
max
Maximum Clock Frequency
5.0
10
15
3.0
6.0
8.5
3.0
6.0
8.5
1.5
3.0
4.25
MHz
t
PLH
, t
PHL
Maximum Propagation Delay, CP to Qn
5.0
10
15
320
160
120
320
160
120
640
320
240
ns
t
PLH
, t
PHL
Maximum Propagation Delay, PL to Qn
5.0
10
15
320
160
120
320
160
120
640
320
240
ns
t
TLH
, t
THL
Maximum Output Transition Time, Any Output
5.0
10
15
200
100
80
200
100
80
400
200
160
ns
C
IN
Maximum Input Capacitance
5.0
7.5
pF
IW4021B
4
TIMING REQUIREMENTS
(C
L
=50pF, R
L
=200 k
, Input t
r
=t
f
=20 ns)
V
CC
Guaranteed Limit
Symbol
Parameter
V
-55
C
25
C
125
C
Unit
t
w
Minimum Pulse Width CP
5.0
10
15
160
80
50
160
80
50
320
160
100
ns
t
w
Minimum Pulse Width PL
5.0
10
15
180
80
50
180
80
50
360
160
100
ns
t
su
Minimum Setup Time, D
S
toCP
5.0
10
15
120
80
60
120
80
60
240
160
120
ns
t
su
Minimum Setup Time, Pn to PL
5.0
10
15
50
30
20
50
30
20
100
60
40
ns
t
h
Minimum Hold Time, D
S
toCP
5.0
10
15
0
0
0
0
0
0
0
0
0
ns
t
h
Minimum Hold Time, Pn to PL
5.0
10
15
0
0
0
0
0
0
0
0
0
ns
t
rec
Minimum Recovery Time PL
5.0
10
15
280
140
100
280
140
100
560
240
200
ns
t
r
, t
f
Maximum Input Rise or Fall Time
5.0
10
15
15
15
15
15
15
15
15
15
15
s
EXPANDED LOGIC DIAGRAM
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