CMOS DOT MATRIX LCD DRIVER
IZD1520
1
FEATURES
CMOS LSI chips
Connection with CPU
Can be directly coupled with 80-port or 68-port system
Available in chip form or in 100-pin plastic QFP
Pin-to-Pin Replacement for SED1520 Series
Many command set
Total 80 (segment+common) drive sets
Low power consumption - 30
W maximum at 2kHz
external clock
Power supply V
DD
- V
SS
: 2.4 to -7.0V
V
DD
- V
5
: 3.5 to -13.0V
DESCRIPTION
The IZD1520 family of dot matrix LCD (Liquid Crystal Display) drivers are designed for the display of characters and graphics.
The drivers generate LCD drive signals derived from bit mapped data stored in an internal RAM.
The IZD1520 family drivers incorporate innovative circuit design strategies to achieve very low power dissipation at a wide range of operating voltages.
These features give the designer a flexible means of implementing small to medium size LCD displays for compact, low power systems.
The IZD1520 which is able to drive two lines of twelve characters each.
The IZD1521 which is able to drive 80 segments for extension.
ABSOLUTE MAXIMUM RATINGS
Characteristic
Symbol
Value
Unit
Supply Voltage (1)
V
SS
- 8.0 ~ 0.3
V
Supply Voltage (2)
V
5
- 16.5 ~ 0.3
V
Supply Voltage (3)
V
1,
V
2,
V
3,
V
4
V
5
~ 0.3
V
Input Voltage
V
I
V
SS
- 0.3 ~ 0.3
V
Output Voltage
V
O
V
SS
- 0.3 ~ 0.3
V
Power Dissipation
P
D
250
mW
Operating Temperature
T
a
- 10 ~ + 75
o
C
Storage Temperature
T
stg
- 65 ~ + 150
o
C
Soldering temperature time (10 sec max)
T
sol
260
o
C
Notes:
1.
All voltages are specified relative to V
DD
= 0V.
2.
The following relation must be always hold
V
DD
V
1
V
2
V
3
V
4
V
5
.
3.
Exceeding the absolute maximum ratings may cause permanent damage to the device. Functional operating under these
conditions is not implied.
LINE-UP
Product
Name
Clock Frequency
Applicable Driver
Number of
SEGMENT
Drivers
Number of
COMMON
Drivers
Duty
On-chip
External
IZD1520
OA
18kHz
18kHz
IZD1520
OA
, IZD1521
OA
61
16
1/16, 1/32
IZD1521
OA
-
18kHz
IZD1520
OA
80
0
1/8 ~ 1/32
IZD1520
AA
-
2kHz
IZD1520
AA
, IZD1521
AA
61
16
1/16, 1/32
IZD1521
AA
-
2kHz
IZD1520
AA
80
0
1/8 ~ 1/32
CMOS DOT MATRIX LCD DRIVER
IZD1520
2
BLOCK DIAGRAM IZD1520
AA
D isp lay d ata R A M
(2560-b it)
D isp lay d ata latch circu it
C om m on cou n ter
L C D d riv e circu it
C olu m n ad d ress d ecod er
C olu m n ad d ress cou n ter
C olu m n ad d ress reg ister
S tatu s
C om m an d
d ecod er
D isp lay
tim in g
g en erator
circu it
Lo
w
-
a
d
d
r
e
s
s
re
g
i
st
e
r
Bu
s
ho
l
d
e
r
M P U in terface
D-
D
07
A0
,
CS
RD
,
RW
(E
,
RW
)
M/
S
RE
S
C L
F R
Li
ne
a
ddr
e
s
s
de
c
o
de
r
Li
ne
c
o
u
n
t
e
r
Di
sp
l
ay
s
t
a
r
t
l
in
e
r
e
g
i
st
e
r
I/
O
b
u
ffe
r
V
DD
V
SS
SE
G
t
o
S
E
G
06
0
CO
M
t
o
CO
M
01
5
V,
V,
V,
V,
V
12
34
5
CMOS DOT MATRIX LCD DRIVER
IZD1520
3
BLOCK DIAGRAM IZD1520
OA
D isp lay d ata R A M
(2560-b it)
D isp lay d ata latch circu it
C om m on cou n ter
L C D d riv e circu it
C olu m n ad d ress d ecod er
C olu m n ad d ress cou n ter
C olu m n ad d ress reg ister
S tatu s
C om m an d
d ecod er
D isp lay
tim in g
g en erator
circu it
Lo
w
-
a
d
d
r
e
s
s
re
g
i
st
e
r
Bu
s
ho
l
d
e
r
M P U in terface
D-
D
07
OS
C
1
RD
,
RW
(E
,
RW
)
M/
S
RE
S
O S C 2
F R
Li
ne
a
ddr
e
s
s
de
c
o
de
r
Li
ne
c
o
u
n
t
e
r
Di
sp
l
ay
s
t
a
r
t
l
in
e
r
e
g
i
st
e
r
I/
O
b
u
ffe
r
V
DD
V
SS
SE
G
t
o
S
E
G
06
0
CO
M
t
o
CO
M
01
5
V,
V,
V,
V,
V
12
34
5
CMOS DOT MATRIX LCD DRIVER
IZD1520
4
BLOCK DIAGRAM IZD1521
AA,
IZD1521
OA
D isp lay d ata R A M
(2560-b it)
D isp lay d ata latch circu it
L C D d riv e circu it
C olu m n ad d ress d ecod er
C olu m n ad d ress cou n ter
C olu m n ad d ress reg ister
S tatu s
C om m an d
d ecod er
D isp lay
tim in g
g en erator
circu it
Lo
w
-
a
d
d
r
e
s
s
re
g
i
st
e
r
Bu
s
ho
l
d
e
r
M P U in terface
D-
D
07
A0
,
CS
RD
,
RW
(E
,
RW
)
RE
S
C L
F R
Li
ne
a
ddr
e
s
s
de
c
o
de
r
Li
ne
c
o
u
n
t
e
r
Di
sp
l
ay
s
t
a
r
t
l
in
e
r
e
g
i
st
e
r
I/
O
b
u
ffe
r
V
DD
V
SS
SE
G
t
o
S
E
G
07
9
V
23
5
,
V,
V
CMOS DOT MATRIX LCD DRIVER
IZD1520
5
ELECTRICAL CHARACTERISTICS
(Ta = 25
o
C, V
DD
= 0V, V
SS
= -5.0V unless otherwise specified)
Characteristic
Symbo
l
Test Condition
Applicable Terminals
Min
Typ
Max
Unit
Operating
Recommended
-5.5
-5.0
-4.5
Voltage(1)
Note 1
V
SS
V
SS
-7.0
-2.4
V
Recommended
V
5
V
5
-13.0
-3.5
Operating
-13.0
V
Voltage(2)
Permitted
V
1
, V
2
V
1
, V
2
0.6 x V
5
V
DD
Permitted
V
3
, V
4
V
3
, V
4
V
5
0.4xV
5
HIGH Input Voltage
V
IH
A0,Di, E, R/W, CS
V
SS
+2.0
V
DD
V
CL, FR, M/S, RES
0.2 x V
SS
V
DD
LOW Input Voltage
V
IL
A0, Di, E, R/W, CS
V
SS
V
SS
+0.8
V
CL, FR, M/S, RES
V
SS
0.8+V
SS
I
OH
= -3.0 mA
D0
D7
V
SS
+2.4
HIGH Output Voltage
V
OH
I
OH
= -2.0 mA
FR
V
SS
+2.4
V
I
OH
= -120
A
OSC2
0.2 x V
SS
I
OL
= 3.0 mA
D0
D7
V
SS
+0.4
LOW Output Voltage
V
OL
I
OL
= 2.0 mA
FR
V
SS
+0.4
V
I
OL
= 120
A
OSC2
0.8xV
SS
Input Leakage Current
I
LI
A0, E, R/W, CS, CL,
M/S, RES
-1.0
1.0
A
Output Leakage Current
I
LO
Outputs are high impedance
D0
D7, FR
-3.0
3.0
A
LCD Driver ON Resistance
R
ON
V
5
=-5.0V
SEG0 ~ SEG79
5.0
7.5
K
Note 2
COM0 ~ COM15
Supply Current, Static
I
DDQ
CS = CL = V
DD
V
DD
0.05
1.0
A
During
f
CL
=2kHz
Note 3
2.0
5.0
display
V
5
=-5.0V
R
f
=1M
Note 4
V
DD
9.5
15.0
A
Supply Current, Dynamic
I
DD
f
CL
=18KHz
Note 5
5.0
10.0
During access f
cyc
=200KHz
300
500
A
Input Terminal Capacity
C
IN
f = 1 MHz
All inputs
5.0
8.0
pF
Oscillator Frequency
f
OSC
R
f
=1M
2%
15
18
21
KHz
Reset Time
t
R
RES
1.0
1000
s
Notes: 1. Operating over the specified voltage range is guaranteed, except where the supply voltage changes suddenly during
CPU access.
2. For a voltage differential of 0.1V between input (V
1
, ..., V
4
) and output (COM, SEC) pins. All voltages within specified
operating voltage range.
3.
IZD1520
AA
and IZD1521
AA
only. Does not include transient currents due to stray and panel capacitances.
4.
IZD1521
OA
only. Does not include transient currents due to stray and panel capacitances.
5.
IZD1520
OA
only. Does not include transient currents due to stray and panel capacitances.
CMOS DOT MATRIX LCD DRIVER
IZD1520
6
Read/Write timing for the 80-port MPU
Characteristic
Symbol
Signal
Condition
Min
Typ
Max
Unit
Address hold time
t
AH8
A0, CS
10
ns
Address setup time
t
AW8
20
ns
System cycle time
t
CYC8
WR, RD
1000
ns
Control pulse width
t
CC8
200
ns
Data setup time
t
DS8
80
ns
Data hold time
t
DH8
10
ns
V
DD
access time
t
ACC8
D0
D7
90
ns
Output Disable time
t
OH8
CL = 100pF
10
60
ns
Low-level pulsewidth
t
WLCL
35
s
High-level pulsewidth
t
WHCL
CL
35
s
Rise time
t
r
30
150
ns
Fall time
t
f
30
150
ns
FR delay time Note 1
t
FDR
FR (Input)
-2.0
0.2
2.0
s
FR delay time Note 2
t
FDR
FR (Input)
0.2
2.0
s
Read/Write timing for the 68-port MPU
Characteristic
Symbol
Signal
Condition
Min
Typ
Max
Unit
System cycle time
t
CYC6
A0
1000
ns
Address setup time
t
AW6
R/W
20
ns
Address hold time
t
AH6
10
ns
Data setup time
t
DS6
80
ns
Data hold time
t
DH6
10
ns
Output disable time
t
OH6
D0
D7
10
60
ns
Access time
t
ACC6
CL = 100pF
90
ns
Enable
READ
t
EW
E
100
ns
pulse width
WRITE
80
ns
Low-level pulsewidth
t
WLCL
35
s
High-level pulsewidth
t
WHCL
CL
35
s
Rise time
t
r
30
150
ns
Fall time
t
f
30
150
ns
FR delay time Note 1
t
FDR
FR (Input)
-2.0
0.2
2.0
s
FR delay time Note 2
t
FDR
FR (Input)
0.2
2.0
s
* The rating when V
SS
= -3.0V are approximately 100% higher that when V
SS
= -5.0V
Notes: 1. The listed input t
FDR
applies to IZD1520 and IZD1521 in slave mode.
2. The listed input t
FDR
applies to IZD1520 and IZD1521 in master mode.
CMOS DOT MATRIX LCD DRIVER
IZD1520
7
Timing Chart
Read/Write timing for the 80-port MPU
Read/Write timing for the 68-port MPU
Read/Write timing for the 80-port/68-port display
C L
F R
t
W L C L
t
W H C L
t
f
t
r
t
D F R
A O , C S
W R , R D
D 0~D 7
(W R IT E )
(R E A D )
D 0~D 7
t
C C 8
t
A H 8
t
C Y C 8
t
A W 8
t
D S 8
t
D H 8
t
A C C 8
t
O H 8
CMOS DOT MATRIX LCD DRIVER
IZD1520
8
TERMINAL DESCRIPTION
Terminal Name
Function
D0
D7
Data I/O
A0
Select display data or functions.
HIGH: Display data
LOW : Instructions
RES
Resets the system and selects the interface type for a 68-port/80-port MPU
HIGH: 68-port MPU interface
LOW : 80-port MPU interface
CS
Input. Active low. Effective for an external clock operation model only.
OSC1
Chip Select input
LOW : Active level sensing
E
(RD)
Read/Write Enable signal when a 68-port MPU is connected.
(Active LOW Read Enable signal when an 80-port MPU is connected)
R/W
(WR)
Read/Write Select signal when a 68-port MPU is connected.
HIGH: Read Select
LOW : Write Select
(Active LOW Write Enable input when an 80-port MPU is connected Rising edge sensing)
CL
Input. Effective for an external clock operation model only.
OSC2
External clock input (only effective with external clock types)
FR
LCD Frame (AC- conversion) signal input/output
SEGn
Segment output for driving the LCD
COMn
Common output for driving the LCD
M/S
Master/Slave Select signal
V
DD
5V power supply
V
SS
0V power supply (GND level)
V
1
, V
2
, V
3
, V
4
, V
5
Power supplies for driving the LCD. V
DD
V
1
V
2
V
3
V
4
V
5
CMOS DOT MATRIX LCD DRIVER
IZD1520
9
DISPLAY COMMANDS
(Based on the 80-port MPU; the RD and WR commands differ for the 68-port MPU)
Command
RD WR A0
D7 D6 D5 D4 D3 D2 D1 D0
Function
1
Display ON/OFF
1 0 0
1 0 1 0 1 1 1 0/1
Switches the entire display ON or OFF regardless of
the Display RAM's data or the internal status. *Note
2
Display START Line
1 0 0
1 1 0 Display START
address (0
31)
Determines the line of RAM data to be displayed at the
display's top line (COM0)
3
Page Address Set
1 0 0
1 0 1 1 1 0 Page
Sets the page of the Display RAM in the page address
register
4
Column (Segment)
Address Set
1 0 0
0 Column address
(0
79)
Sets the column address of the Display RAM in the
column address register
5
Status Read
0 1 0
0 0 0 0
Reads the status.
BUSY 1: Busy (internal processing) 0: READY
status
ADC 1: Rightward (forward) output
0: Leftward (reverse) output
ON/OFF 1: Display OFF 0: Display ON
RESET 1: Resetting 0: Normal
6
Write Display Data
1 0 1
Write Data
Writes the data on the
data bus to RAM
These commands access a
previously specified
address
7
Read Display Data
0 1 1
Read Data
Reads data from the
Display RAM onto the
data bus
of the Display RAM,
after which the column
address is incremented
one
8
ADC Select
1 0 0
1 0 1 0 0 0 0 0/1
Used to reverse the correspondence between the
Display RAM's column addresses and segment driver
output ports
0: Rightward (forward) output 1: Leftward (reverse)
9
Static Drive ON/OFF
1 0 0
1 0 1 0 0 1 0 0/1
Selects normal display operation or static all-fit drive
display operation
1: Static drive (Power Save) 0: Normal display
10
Duty Select
1 0 0
1 0 1 0 1 0 0 0/1
Selects the duty factor for driving LCD cells
1: 1/32 duty 0: 1/16 duty
11
Read Modify Write
1 0 0
1 1 1 0 0 0 0 0
Increments the column address counter by one only
when display data is written but not when it is read
12
End
1 0 0
1 1 1 0 1 1 1 0
Cancels the Ready Modify Write mode
13
Reset
1 0 0
1 1 1 0 0 0 1 0
Resets the Display START line to the 1-st line in the
register.
Resets the column address counter and page address
register to 0.
Note: Power Save mode is entered by selecting static drive in the Display OFF status.
CMOS DOT MATRIX LCD DRIVER
IZD1520
10
REFERENCE CIRCUITRY EXAMPLES
16 x 61 dots
16 x 141 dots
32 x 202 dots
Note: If a system has two or more slave drivers a CMOS buffer will be required for clock signal.
R f
A
0
D
O SC 1
O SC 2
M /S
C O M
V
D D
M PU
C B
D B
A
0
SEG
LC D C e ll
1 6 x 6 1 d o ts
1 - 61
1
1 6
1 /1 6 d u ty
D
D
D
A
0
A
0
A
0
1 /3 2 D u ty
LC D C e ll
3 2 x 2 0 2 d o ts
6 2 -1 4 1
1 - 1 6
1 6
1
1 4 2 - 2 0 2
1 7
3 2
C O M
M /S
M /S
FR
C L
SEG
SEG
SEG
FR
FR
FR
C L
O SC 1 O SC 2
M /S
V
D D
C O M
M PU
C B
D B
A
0
A
0
D
R f
A
0
D
M /S
1 /1 6 d u ty
C O M
M /S
V
D D
SEG
O SC 1 O SC 2 FR
M PU
C B
D B
A
0
SEG
FR
C L
6 2 - 1 4 1
1 - 6 1
1
1 6
LC D C e ll
1 6 x 1 4 1 d o ts
CMOS DOT MATRIX LCD DRIVER
IZD1520
11
PAD LAYOUT
PAD LOCATION
( Unit:
m)
Pad
No.
Pad Name
X
Y
Pad
No.
Pad Name
X
Y
Pad
No.
Pad Name
X
Y
1
COM5
-2994
-2243
35
SEG37
3010
-1100
69
SEG3
-650
2242
2
COM6
-2717
-2244
36
SEG36
3010
-892
70
SEG2
-798
2242
3
COM7
-2510
-2244
37
SEG35
3010
-722
71
SEG1
-968
2242
4
COM8
-2302
-2244
38
SEG34
3010
-515
72
SEG0
-1177
2242
5
COM9
-2132
-2244
39
SEG33
3010
-344
73
A0
-1368
2242
6
COM10
-1924
-2244
40
SEG32
3010
-136
74
OSC1 [CS]
-1569
2242
7
COM11
-1754
-2244
41
SEG31
3010
33
75
OSC2 [CL]
-1761
2242
8
COM12
-1547
-2244
42
SEG30
3010
241
76
E [RD]
-1953
2242
9
COM13
-1377
-2244
43
SEG29
3010
412
77
R/W (WR)
-2142
2242
10
COM14
-1167
-2244
44
SEG28
3010
620
78
GND
-2348
2242
11
COM15
-998
-2244
45
SEG27
3010
790
79
DB0
-2646
2242
12
SEG60
-790
-2244
46
SEG26
3010
998
80
DB1
-3009
2242
13
SEG59
-620
-2244
47
SEG25
3010
1170
81
DB2
-3009
1895
14
SEG58
-413
-2244
48
SEG24
3010
1376
82
DB3
-3009
1695
15
SEG57
-242
-2244
49
SEG23
3010
1544
83
DB4
-3009
1497
16
SEG56
-35
-2244
50
SEG22
3010
1754
84
DB5
-3009
1297
17
SEG55
135
-2244
51
SEG21
3010
2242
85
DB6
-3009
1097
18
SEG54
344
-2244
52
SEG20
1494
2242
86
DB7
-3009
916
19
SEG53
514
-2244
53
SEG19
2434
2242
87
V
CC
-3009
737
20
SEG52
722
-2244
54
SEG18
2226
2242
88
RES
-3009
542
21
SEG51
892
-2244
55
SEG17
2056
2242
89
FR
-3009
342
22
SEG50
1100
-2244
56
SEG16
1848
2242
90
V5
-3009
162
23
SEG49
1270
-2244
57
SEG15
1678
2242
91
V3
-3009
-18
24
SEG48
1478
-2244
58
SEG14
1470
2242
92
V2
-3009
-198
25
SEG47
1607
-2244
59
SEG13
1300
2242
93
M/S
-3009
-398
26
SEG46
1856
-2244
60
SEG12
1012
2242
94
V4
-3009
-603
27
SEG45
2026
-2244
61
SEG11
922
2242
95
V1
-3009
-806
28
SEG44
2234
-2244
62
SEG10
714
2242
96
COM0
-2994
-996
29
SEG43
2477
-2244
63
SEG9
544
2242
97
COM1
-2994
-1166
30
SEG42
3020
-2244
64
SEG8
336
2242
98
COM2
-2994
-1375
31
SEG41
3010
-1857
65
SEG7
166
2242
99
COM3
-2994
-1544
32
SEG40
3010
-1648
66
SEG6
-42
2242
100
COM4
-2994
-1753
33
SEG39
3010
-1474
67
SEG5
-213
2242
34
SEG38
3010
-1270
68
SEG4
-420
2242
Note: Pads 74,75 are OSC1, OSC2 for BT5150
OA
and CS, CL for IZ1520
AA
respectively. All other pad names are identical.
X
Y
1
2
3
4
5
6
7
8
9
1 0
1 1
1 2
1 3
1 4
1 5
1 6
1 7
1 8
1 9
2 0
2 1
2 2
2 3
2 4
2 5
2 6
2 7
2 8
2 9
3 0
3 1
3 2
3 3
3 4
3 5
3 6
3 7
3 8
3 9
4 0
4 1
4 2
4 3
4 4
4 5
4 6
4 7
4 8
4 9
5 0
5 1
5 2
5 3
5 4
5 5
5 6
5 7
5 8
5 9
6 0
6 1
6 2
6 3
6 4
6 5
6 6
6 7
6 8
6 9
7 0
7 1
7 2
7 3
7 4
7 5
7 6
7 7
7 8
7 9
8 0
8 1
8 2
8 3
8 4
8 5
8 6
8 7
8 8
8 9
9 0
9 1
9 2
9 3
9 4
9 5
9 6
9 7
9 8
9 9
1 0 0
(6 5 0 0 , 5 0 0 0 )
C h ip size :
6 5 0 0 x 5 0 0 0
Pa d size :
1 2 0 x 1 2 0
U n it :
m
PA D
D IA G R A M
(0 ,0 )
IZD 1 5 2 0
CMOS DOT MATRIX LCD DRIVER
IZD1520
12
PAD LAYOUT
PAD LOCATION
( Unit:
m)
Pad
No.
Pad Name
X
Y
Pad
No.
Pad Name
X
Y
Pad
No.
Pad Name
X
Y
1
SEG71
-2994
-2243
35
SEG37
3010
-1100
69
SEG3
-650
2242
2
SEG70
-2717
-2244
36
SEG36
3010
-892
70
SEG2
-798
2242
3
SEG69
-2510
-2244
37
SEG35
3010
-722
71
SEG1
-968
2242
4
SEG68
-2302
-2244
38
SEG34
3010
-515
72
SEG0
-1177
2242
5
SEG67
-2132
-2244
39
SEG33
3010
-344
73
A0
-1368
2242
6
SEG66
-1924
-2244
40
SEG32
3010
-136
74
CS
-1569
2242
7
SEG65
-1754
-2244
41
SEG31
3010
33
75
CL
-1761
2242
8
SEG64
-1547
-2244
42
SEG30
3010
241
76
E RD
-1953
2242
9
SEG63
-1377
-2244
43
SEG29
3010
412
77
R/W (WR)
-2142
2242
10
SEG62
-1167
-2244
44
SEG28
3010
620
78
GND
-2348
2242
11
SEG61
-998
-2244
45
SEG27
3010
790
79
DB0
-2646
2242
12
SEG60
-790
-2244
46
SEG26
3010
998
80
DB1
-3009
2242
13
SEG59
-620
-2244
47
SEG25
3010
1170
81
DB2
-3009
1895
14
SEG58
-413
-2244
48
SEG24
3010
1376
82
DB3
-3009
1695
15
SEG57
-242
-2244
49
SEG23
3010
1544
83
DB4
-3009
1497
16
SEG56
-35
-2244
50
SEG22
3010
1754
84
DB5
-3009
1297
17
SEG55
135
-2244
51
SEG21
3010
2242
85
DB6
-3009
1097
18
SEG54
344
-2244
52
SEG20
1494
2242
86
DB7
-3009
916
19
SEG53
514
-2244
53
SEG19
2434
2242
87
V
CC
-3009
737
20
SEG52
722
-2244
54
SEG18
2226
2242
88
RES
-3009
542
21
SEG51
892
-2244
55
SEG17
2056
2242
89
FR
-3009
342
22
SEG50
1100
-2244
56
SEG16
1848
2242
90
V5
-3009
162
23
SEG49
1270
-2244
57
SEG15
1678
2242
91
V3
-3009
-18
24
SEG48
1478
-2244
58
SEG14
1470
2242
92
V2
-3009
-198
25
SEG47
1607
-2244
59
SEG13
1300
2242
93
SEG79
-3009
-398
26
SEG46
1856
-2244
60
SEG12
1012
2242
94
SEG78
-3009
-603
27
SEG45
2026
-2244
61
SEG11
922
2242
95
SEG77
-3009
-806
28
SEG44
2234
-2244
62
SEG10
714
2242
96
SEG76
-2994
-996
29
SEG43
2477
-2244
63
SEG9
544
2242
97
SEG75
-2994
-1166
30
SEG42
3020
-2244
64
SEG8
336
2242
98
SEG74
-2994
-1375
31
SEG41
3010
-1857
65
SEG7
166
2242
99
SEG73
-2994
-1544
32
SEG40
3010
-1648
66
SEG6
-42
2242
100
SEG72
-2994
-1753
33
SEG39
3010
-1474
67
SEG5
-213
2242
34
SEG38
3010
-1270
68
SEG4
-420
2242
X
Y
1
2
3
4
5
6
7
8
9
1 0
1 1
1 2
1 3
1 4
1 5
1 6
1 7
1 8
1 9
2 0
2 1
2 2
2 3
2 4
2 5
2 6
2 7
2 8
2 9
3 0
3 1
3 2
3 3
3 4
3 5
3 6
3 7
3 8
3 9
4 0
4 1
4 2
4 3
4 4
4 5
4 6
4 7
4 8
4 9
5 0
5 1
5 2
5 3
5 4
5 5
5 6
5 7
5 8
5 9
6 0
6 1
6 2
6 3
6 4
6 5
6 6
6 7
6 8
6 9
7 0
7 1
7 2
7 3
7 4
7 5
7 6
7 7
7 8
7 9
8 0
8 1
8 2
8 3
8 4
8 5
8 6
8 7
8 8
8 9
9 0
9 1
9 2
9 3
9 4
9 5
9 6
9 7
9 8
9 9
1 0 0
(6 5 0 0 , 5 0 0 0 )
C h ip size :
6 5 0 0 x 5 0 0 0
Pa d size :
1 2 0 x 1 2 0
U n it :
m
PA D
D IA G R A M
(0 ,0 )
IZD 1 5 2 1
CMOS DOT MATRIX LCD DRIVER
IZD1520
13
PDF 
ZIP