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Электронный компонент: HYR1812840G

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Data Book
1
9.00
HYR 16xx40G/HYR 18xx40G
Rambus RIMM Modules
Direct RDRAM RIMM Modules
(with 288 Mbit RDRAMs)
Overview
The Direct Rambus
TM
RIMM
TM
module is a general purpose high-performance memory subsystem
suitable for use in a broad range of applications including computer memory, personal computers,
workstations, and other applications where high bandwidth and low latency are required.
The Direct Rambus RIMM module consists of 288 Mbit Direct Rambus DRAM (Direct RDRAMTM)
devices. These are extremely high-speed CMOS DRAMs organized as 16M words by 18 bits. The
use of Rambus Signaling Level (RSL) technology permits 600 MHz to 800 MHz transfer rates while
using conventional system and board design technologies. Direct RDRAM devices are capable of
sustained data transfers at 1.25 ns per two bytes (10 ns per sixteen bytes).
The RDRAM architecture enables the highest sustained bandwidth for multiple, simultaneous,
randomly addressed, memory transactions. The separate control and data buses with independent
row and column control yield over 95% bus efficiency. The RDRAM's 32-bank architecture supports
up to four simultaneous transactions per device.
Form Factor
The Rambus RIMM modules are offered in a 184-pad 1 mm edge connector pad pitch form factor
suitable for 184 contact RIMM connectors. The RIMM module is suitable for desktop and other
system applications. The next figure shows an eight device Rambus RIMM module without heat
spreader.
Features
High speed 800, 711 & 600 MHz RDRAM
storage
184 edge connector pads with 1 mm pad
spacing
Maximum module PCB size:
133.5 mm
31.75 mm
1.37 mm
(5.25"
1.25"
0.05")
Each RDRAM has 32 banks, for a total of
512, 256 or 128 banks on each 512/576 MB,
256/288MB or 128/144 MB module
respectively.
Gold plated edge connector pad contacts
Serial Presence Detect (SPD) support
Operates from a 2.5 V supply ( 5%)
Low power and powerdown self refresh
modes
Separate Row and Column buses for higher
efficiency
Fig.1 : Rambus RIMM module
(without heat spreader)
,
HYR 16xx40G/HYR 18xx40G
Rambus RIMM Modules
Data Book
2
9.00
Part Number Designators
Organization
Capacity
I/O Frequency
[MHz]
Part Designator
# of
RDRAMs
RDRAM
Density
128 MB/144 MB
64 MB
16
128 MB
600
HYR166440G-653
4
288 Mbit
64 MB
16
128 MB
711
HYR166440G-745
4
64 MB
16
128 MB
800
HYR166440G-845
4
64 MB
16
128 MB
800
HYR166440G-840
4
64 MB
18
144 MB
600
HYR186440G-653
4
64 MB
18
144 MB
711
HYR186440G-745
4
64 MB
18
144 MB
800
HYR186440G-845
4
64 MB
18
144 MB
800
HYR186440G-840
4
128 MB/144 MB
128 MB
16
256 MB
600
HYR1612840G-653
8
288 Mbit
128 MB
16
256 MB
711
HYR1612840G-745
8
128 MB
16
256 MB
800
HYR1612840G-845
8
128 MB
16
256 MB
800
HYR1612840G-840
8
128 MB
18
288 MB
600
HYR1812840G-653
8
128 MB
18
288 MB
711
HYR1812840G-745
8
128 MB
18
288 MB
800
HYR1812840G-845
8
128 MB
18
288 MB
800
HYR1812840G-840
8
256 MB/288 MB
256 MB
16
512 MB
600
HYR1625640G-653
16
288 Mbit
256 MB
16
512 MB
711
HYR1625640G-745
16
256 MB
16
512 MB
800
HYR1625640G-845
16
256 MB
16
512 MB
800
HYR1625640G-840
16
256 MB
18
576 MB
600
HYR1825640G-653
16
256 MB
18
576 MB
711
HYR1825640G-745
16
256 MB
18
576 MB
800
HYR1825640G-845
16
256 MB
18
576 MB
800
HYR1825640G-840
16
HYR 16xx40G/HYR 18xx40G
Rambus RIMM Modules
Data Book
3
9.00
Pin Configuration
PIN
Pin Name
PIN
Pin Name
PIN
Pin Name
PIN
Pin Name
A1
GND
B1
GND
A47
N.C.
B47
N.C.
A2
LDQA8
B2
LDQA7
A48
N.C.
B48
N.C.
A3
GND
B3
GND
A48
N.C.
B49
N.C.
A4
LDQA6
B4
LDQA5
A50
N.C.
B50
N.C.
A5
GND
B5
GND
A51
V
REF
B51
V
REF
A6
LDQA4
B6
LDQA3
A52
GND
B52
GND
A7
GND
B7
GND
A53
SCL
B53
SA0
A8
LDQA2
B8
LDQA1
A54
V
DD
B54
V
DD
A9
GND
B9
GND
A55
SDA
B55
SA1
A10
LDQA0
B10
LCFM
A56
SVdd
B56
SVdd
A11
GND
B11
GND
A57
SWP
B57
SA2
A12
LCTMN
B12
LCFMN
A58
V
DD
B58
V
DD
A13
GND
B13
GND
A59
RSCK
B59
RCMD
A14
LCTM
B14
N.C.
A60
GND
B60
GND
A15
GND
B15
GND
A61
RDQB7
B61
RDQB8
A16
N.C.
B16
LROW2
A62
GND
B62
GND
A17
GND
B17
GND
A63
RDQB5
B63
RDQB6
A18
LROW1
B18
LROW0
A64
GND
B64
GND
A19
GND
B19
GND
A65
RDQB3
B65
RDQB4
A20
LCOL4
B20
LCOL3
A66
GND
B66
GND
A21
GND
B21
GND
A67
RDQB1
B67
RDQB2
A22
LCOL2
B22
LCOL1
A68
GND
B68
GND
A23
GND
B23
GND
A69
RCOL0
B69
RDQB0
A24
LCOL0
B24
LDQB0
A70
GND
B70
GND
A25
GND
B25
GND
A71
RCOL2
B71
RCOL1
A26
LDQB1
B26
LDQB2
A72
GND
B72
GND
A27
GND
B27
GND
A73
RCOL4
B73
RCOL3
A28
LDQB3
B28
LDQB4
A74
GND
B74
GND
A29
GND
B29
GND
A75
RROW1
B75
RROW0
A30
LDQB5
B30
LDQB6
A76
GND
B76
GND
A31
GND
B31
GND
A77
N.C.
B77
RROW2
A32
LDQB7
B32
LDQB8
A78
GND
B78
GND
A33
GND
B33
GND
A79
RCTM
B79
N.C.
HYR 16xx40G/HYR 18xx40G
Rambus RIMM Modules
Data Book
4
9.00
A34
LSCK
B34
LCMD
A80
GND
B80
GND
A35
V
CMOS
B35
V
CMOS
A81
RCTMN
B81
RCFMN
A36
SOUT
B36
SIN
A82
GND
B82
GND
A37
V
CMOS
B37
V
CMOS
A83
RDQA0
B83
RCFM
A38
N.C.
B38
N.C.
A84
GND
B84
GND
A39
GND
B39
GND
A85
RDQA2
B85
RDQA1
A40
N.C.
B40
N.C.
A86
GND
B86
GND
A41
V
DD
B41
V
DD
A87
RDQA4
B87
RDQA3
A42
V
DD
B42
V
DD
A88
GND
B88
GND
A43
N.C.
B43
N.C.
A89
RDQA6
B89
RDQA5
A44
N.C.
B44
N.C.
A90
GND
B90
GND
A45
N.C.
B45
N.C.
A91
RDQA8
B91
RDQA7
A46
N.C.
B46
N.C.
A92
GND
B92
GND
Pin Configuration (cont'd)
PIN
Pin Name
PIN
Pin Name
PIN
Pin Name
PIN
Pin Name
HYR 16xx40G/HYR 18xx40G
Rambus RIMM Modules
Data Book
5
9.00
Module Connector Pad Description
Signal
Module Connector Pads
I/O
Type
Description
GND
A1, A3, A5, A7, A9, A11,
A13, A15, A17, A19, A21,
A23, A25, A27, A29, A31,
A33, A39, A52, A60, A62,
A64, A66, A68, A70, A72,
A74, A76, A78, A80, A82,
A84, A86, A88, A90, A92,
B1, B3, B5, B7, B9, B11,
B13, B15, B17, B19, B21,
B23, B25, B27, B29, B31,
B33, B39, B52, B60, B62,
B64, B66, B68, B70, B72,
B74, B76, B78, B80, B82,
B84, B86, B88, B90, B92
Ground reference for RDRAM core
and interface. 72 PCB connector
pads.
LCFM
B10
I
RSL
Clock from master. Interface clock
used for receiving RSL signals from
the Channel. Positive polarity.
LCFMN
B12
I
RSL
Clock from master. Interface clock
used for receiving RSL signals from
the Channel. Negative polarity.
LCMD
B34
I
V
CMOS
Serial Command used to read from
and write to the control registers.
Also used for power management.
LCOL4 ...
LCOL0
A20, B20, A22, B22, A24
I
RSL
Column bus. 5-bit bus containing
control and address information for
column accesses.
LCTM
A14
I
RSL
Clock to master. Interface clock
used for transmitting RSL signals to
the Channel. Positive polarity.
LCTMN
A12
I
RSL
Clock to master. Interface clock
used for transmitting RSL signals to
the Channel. Negative polarity.
LDQA8 ...
LDQA0
A2, B2, A4, B4, A6, B6,
A8, B8, A10
I/O
RSL
Data bus A. A 9-bit bus carrying a
byte of read or write data between
the Channel and the RDRAM.
LDQA8 is non-functional on
modules with x16 RDRAM devices.