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Электронный компонент: V23833-G6005-A101

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Preliminary Product Information
1
2004-05-13
XPAK
850 nm Module
10 Gigabit Pluggable Transceiver
Compatible with XPAK MSA Rev. 2.3
V23833-G2005-A101
V23833-G6005-A101
V23833-G6005-A111
Preliminary Data Sheet
Fiber Optics
Part Number
Standard
De-Latch
Mechanism
Connector
Laser Class
V23833-G2005-A101
Fibre Channel Bail
LC
1M
V23833-G6005-A101
Ethernet
Bail
LC
1M
V23833-G6005-A111
Ethernet
None
LC
1M
File: 2101
File: 2117
Features
Standards
Compatible with IEEE Std 802.3aeTM-2002
Compatible with Fibre Channel 10GFC Draft 3.5
Compatible with XPAK MSA Rev. 2.3
Optical
IEEE Ethernet: Serial 850 nm 10GBASE-SR
T11 Fibre Channel: Serial 850 nm 1200-M5-SN-I;
1200-M5E-SN-I; 1200-M6-SN-I
10 Gigabit Fibre Channel: 10.51875 Gbit/s
(V23833-G2005-A101)
10 Gigabit Ethernet: 10.3125 Gbit/s
(V23833-G6005-A1x1)
Transmission distance
up to 82 m
1)
(50 m MMF)
up to 300 m
1)
(on special MMF)
Vertical Cavity Surface Emitting Laser at 850 nm
(VCSEL)
LC connector, multimode fiber
Full duplex transmission mode
Eye safety class 1M (IEC 60825-1:A2)
1)
Maximum reach as defined by IEEE. Longer reach possible depending upon link implementation.
V23833-Gx005-A1x1
Applications
Preliminary Product Information
2
2004-05-13
DOM
Loss Of Signal from receiver
Supply voltage monitor (+3.3 V, Adaptable Power Supply)
Transmit power
Module temperature
Received power
Transmit bias current monitor
Mechanical
Mezzanine profile: 2.68" L x 1.42" W x 0.38" H (68.07 mm x 35.99 mm x 9.8 mm)
Mezzanine module height for PCI card applications mid-board mounting
Separated signal/chassis ground (a common signal/chassis ground module version is
available upon request)
Belly-to-belly applications
De-latch mechanism with low extraction force (V23833-Gxxxx-Ax0x only)
Built-in heat sink
Electrical
Hot pluggable
Power supply: +5.0 V, +3.3 V, Adaptable Power Supply (APS: +1.8 V)
Total power consumption: 3.4 W typical
XAUI electrical interface
3.125 Gbit/s Ethernet (V23833-G60xx-xxxx)
3.1875 Gbit/s Fibre Channel (V23833-G20xx-xxxx)
Management and control via MDIO 2-wire bus
70-pin connector
Applications
10 Gbit/s Ethernet and Fibre Channel transmission systems for Short Range (SR)
Integration on PCI card
Mid-board mounting
Belly-to-belly for high density applications
Enterprise and campus network applications
Storage applications
Backplane and switch applications
Core and edge routers
Aggregation point for lower date rate
XPAK evaluation kit V23833-G9909-Z001 available upon request
V23833-Gx005-A1x1
Pin Configuration
Preliminary Product Information
3
2004-05-13
Pin Configuration
Figure 1
XPAK Transceiver Electrical Pad Layout
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
PRTAD2
PRTAD1
PRTAD0
VEND SPECIFIC
APS SET
RESERVED
APS SENSE
APS
APS
3.3 V
3.3 V
5.0 V
GND
GND
GND
GND
5.0 V
3.3 V
3.3 V
APS
APS
LASI
RESET
VEND SPECIFIC
TX ON/OFF
RESERVED
MOD DETECT
VEND SPECIFIC
VEND SPECIFIC
MDIO
MDC
PRTAD4
PRTAD3
GND
GND
GND
GND
GND
70
69
53
52
51
49
48
47
46
45
44
43
42
40
39
38
37
36
50
41
RESERVED
RESERVED
GND
TX LANE3
TX LANE3+
GND
TX LANE2
TX LANE2+
GND
TX LANE1
TX LANE1+
GND
TX LANE0
TX LANE0+
68
67
66
65
64
63
62
61
59
58
57
56
55
60
GND
54
GND
RX LANE2
RX LANE2+
GND
RX LANE1
RX LANE1+
GND
RX LANE0
RX LANE0+
GND
RESERVED
RESERVED
RX LANE3
RX LANE3+
GND
1
2
3
4
5
6
7
8
9
GND
GND
Toward Bezel
Top of Transceiver PCB
Bottom of Transceiver PCB
(as viewed through top)
File: 2301
V23833-Gx005-A1x1
Pin Configuration
Preliminary Product Information
4
2004-05-13
Connector Pin Assignments
Pin No.
Signal Name
Pin No.
Signal Name
1
GND
70
GND
2
GND
69
GND
3
GND
68
Reserved
4
+5.0 V DC Power
67
Reserved
5
+3.3 V DC Power
66
GND
6
+3.3 V DC Power
65
TX LANE3
7
APS
64
TX LANE3+
8
APS
63
GND
9
LASI
62
TX LANE2
10
RESET
61
TX LANE2+
11
Vendor Specific
60
GND
12
TX ON/OFF
59
TX LANE1
13
Reserved
58
TX LANE1+
14
MOD DETECT
57
GND
15
Vendor Specific
56
TX LANE0
16
Vendor Specific
55
TX LANE0+
17
MDIO
54
GND
18
MDC
53
GND
19
PRTAD4
52
GND
20
PRTAD3
51
RX LANE3
21
PRTAD2
50
RX LANE3+
22
PRTAD1
49
GND
23
PRTAD0
48
RX LANE2
24
Vendor Specific
47
RX LANE2+
25
APS SET
46
GND
26
Reserved
45
RX LANE1
27
APS SENSE
44
RX LANE1+
28
APS
43
GND
29
APS
42
RX LANE0
30
+3.3 V DC Power
41
RX LANE0+
31
+3.3 V DC Power
40
GND
32
+5.0 V DC Power
39
Reserved
33
GND
38
Reserved
34
GND
37
GND
35
GND
36
GND
V23833-Gx005-A1x1
Pin Configuration
Preliminary Product Information
5
2004-05-13
Pin Description
Signal Name Level
I/O
Pin No.
Description
Management and Monitoring Ports
MDIO
Open Drain
I/O
17
Management Data I/O. Requires
external 10 - 22 k
pull-up to 1.8 V
on host.
MDC
1.2 V
CMOS
I
18
Management Data Clock Input
PRTAD4
1.2 V
CMOS
I
19
Port Address Input bit 4
PRTAD3
1.2 V
CMOS
I
20
Port Address Input bit 3
PRTAD2
1.2 V
CMOS
I
21
Port Address Input bit 2
PRTAD1
1.2 V
CMOS
I
22
Port Address Input bit 1
PRTAD0
1.2 V
CMOS
I
23
Port Address Input bit 0
LASI
Open Drain
O
9
Link Alarm Status Interrupt Output.
Open Drain Compatible Output with
10 - 20 k
pull-up on host.
Logic high = Normal Operation
Logic low = Status Flag Triggered
RESET
Open Drain
I
10
Reset Input.
Open Drain Compatible Input with
10 k
pull-up to APS internal to
transceiver.
Logic high = Normal Operation
Logic low = RESET
Note: 1.8 V is APS
Vendor
Specific
11,15,16,24
Vendor Specific Pins. Leave
unconnected when not used.
TX ON/OFF
Open Drain
I
12
TX ON/OFF Input.
Open Drain Compatible Input with
10 k
pull-up to APS internal to
transceiver.
Logic high = Transmitter On
Logic low = Transmitter Off
Note: 1.8 V is APS
MOD
DETECT
O
14
Pulled low inside transceiver
through a 1 k
resistor to Ground