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Электронный компонент: IL145567

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TECHNICAL DATA
IL145567
PCM
CODEC
-
FILTER

ORDERING INFORMATION
IL145567N Plastic DIP
T
A
= -40
to 85 C
IL145567N is a one-chip PCM-cofidec which converts speech signal
into digital form and backwards. The IC is design to operate in
synchronous and asynchronous systems and is comprised of:
- reference generator;
- filters on switching capacitors in transmission and receipt channels ;
- two operational amplifiers.

The IC does signal companding under the A-low and full differential
processing of analogue signals for reduction of noises. Typical
dissipated power is 40mW, under reduced power - 1 mW at
5 V.





GS
X
ANBL
MCLK
R
/ BCLK
R
/
FS
X
FS
R
MCLK
X
BCLK
X
PDN
CLKSEL
Vcc
GND
V
BB

VF
X
I-

VF
X
+


COMP

VPO+

4
8

VPO
-

4
VPI


VF
R
O
8
Active RC-
filter of LF
5-poles
active filter
of LF
3-poles filter
of HF
Reference
generator
R-D-to-A
converter
-D-to-A
converter
Active RC-
filter of LF
5-poles filter
of LF
Storage/hol
ding circuit




Multi-
plexer


Receivin
g latch


Receiving
register

Shift
register

Transmitti
ng register
Control logic
TSx
Dx
D
R


Note - COMP - comparator
Figure 1 - Block diagram
1
IL145567
Pin arrangement in package




Pins description
Pin
Symbol
Description
01
VPO+
Output of power OA
02 GND
Common
output
03
VPO
-
Output of power OA
04
VPI
Input of power OA
05 VF
R
O
Output of digital signal audio frequency
06
Vcc
Supply 5 V
07 FS
R
Input of receipt cycle synchronisation
08 D
R
Input of digital data receipt
09 BCLK
R
/CLKSEL
Input of clock oscillator and selector of basic oscillator frequency
10 MCLK
R
/PDN
Input of main clock oscillator and underconsumption control
11
MCLKx
Input of main clock oscillator for transmission
12 BCLKx
Input of clock oscillator for data transmission (synchronised with
MCLKx)
13
Dx
Output of transmitted digital data
14
FSx
Input of transmission cycle synchronisation
15
TSx
Output of transmission temporary interval indicator
16
ANBL
Input of feedback loop control
17
GSx
Output of input OA
18
VFxI-
Input of transmitted audio frequency (inverting)
19
VFxI+
Input of transmitted audio frequency (noninverting)
20 V
BB
Supply minus 5 V






2
IL145567



Supply source
Characteristics
min max Unit
Supply voltage of constant current
V
CC
V
BB
4.75
- 4.75
5.25
- 5.25
V
Consumption power in active mode (without load)

VPI = V
BB
-
70
60
Consumption power in sleep mode (without load)

VPI = V
BB
-
5.0
3.0
mW



Digital signal strength
(V
CC
= 5V
5%, V
BB
= -5V
5%, GNDA = 0V)
Characteristics Symbol
Min
Max
Unit
Input voltage Low
V
IL
-
0.6
Input voltage High
V
IH
2.2 -
Output voltage Low
D
X
or
X
TS
,
I
OL
= 3.2mA
V
OL
-
0.4
Output voltage High
D
X
, I
OH
= -3.2mA
I
OH
= -1.6mA
V
OH
2.4
V
CC
-0.5
-
-
V
Input current Low
GNDA
V
in
V
CC
I
IL
-10
+10
Input current High
GNDA
V
in
V
CC
I
IH
-10
+10
Output current in the third state
GNDA
D
X
V
CC
I
OZ
-10
+10
mkA
3
IL145567


Dynamic characteristics of digital signals
(V
CC
= 5V
5%, V
BB
= -5V
5%, values of all signals are indicated relatively to GNDA)
Characteristics Symbol
min
typical
max
Unit
Frequencies of main clock oscillators
MCLK
X
or
MCLK
R
fm -
1.544
2.048
- MHz
Min width of high or low pulse
MCLK
X
or
MCLK
R
t
w(M)
100
-
ns
Min width of high or low pulse
BCLK
X
or
BCLK
R
t
w(B)
50
ns
Min width of low pulse
FS
X
or FS
R
t
w(FL)
50 ns
Rise time
t
r
50 ns
Fall time
t
f
50 ns
Ratings of data bit synchronisation BCLK
X
or BCLK
R
f
B
128
4096 kHz
Presetting time of from low BCLK
X
to high MCLK
R
t
su(BRM)
50 - ns
Presetting time from high MCLK
X
to low BCLK
X
t
su(MFB)
20 ns
Holding time from low BCLK
X
(BCLK
R
) to high FS
X
(FS
R
) t
h(BF)
20 ns
Presetting time from high FS
X
(FS
R
) to low BCLK
X
(BCLK
R
) for
long frames
t
su(FB)
80
ns
Delay time from high BCLK
X
to setting correct data on D
X
t
d(BD)
20 140 ns
Delay time from high BCLK
X
to low
X
TS
t
d(BTS)
20
140 ns
Delay time of inhibition of output data D
X
relatively to 8
th
clock
pulse BCLK
X
t
d(ZC)
50
140 ns
Time of setting correct data after entry of signals FS
X
or BCLK
X
( the later of them)
t
d(ZF)
20
140 ns
Time of presetting data D
R
relatively to clock pulse BCLK
R edge
t
su(DB)
0 - ns
Holding time from low BCLK
R
to switching off D
R
t
h(BD)
50 ns
Presetting time from high level FS
X
(FS
R
) to low level BCLK
X
(BCLK
R
) under synchronisation standard Short Frame
t
su(F)
50
ns
Holding time from low level BCLK
X
(BCLK
R
) to low level FS
X
(FS
R
) for synchronisation Short Frame
t
h(F)
50
ns
Holding time from 2
nd
period of low level BCLK
X
(BCLK
R
) to low
level FS
X
(FS
R
) for synchronisation Long Frame
t
h(BFI)
-
50 ns
4
IL145567





Analogue electrical characteristics
(V
CC
= 5V 5%, V
BB
= -5V 5%, VF
X
I- connected to GS
X
)
Characteristic min
typical
max
Unit
Input current (-2.5 V
V
in
2.5 V)
VF
X
I+, VF
X
I-
- -
0.2
mkA
Input impedance to GNDA at frequency 1 kHz
VF
X
I+, VF
X
I-
10 -
MOhm
Input capacitance
VF
X
I+, VF
X
I-
- 10 pF
Input bias voltage GS
X
Op Amp
VF
X
I+, VF
X
I-
-
25
mV
Range of input common-mode voltages
VF
X
I+, VF
X
I-
- 2.5
2.5
V
Amplification ratio without feedback GS
X
Op Amp
(R
load
10 kOhm)
75 - dB
Attenuation factor of in-phase components on out. VF
X
I+, VF
X
I-
65
dB
Frequency band of unity gain on out. GS
X
Op Amp
(R
load
10 kOhm)
1000 kHz
Equivalent input noise between out. VF
X
I+, VF
X
I- and GS
X
-20 dBm
Load capacitance for GS
X
Op Amp
0
100
pF
Output range of voltages for GS
X
R
load
= 10 kOhm relat. GNDA
R
load
= 600 Ohm relat. GNDA
-
3.5
- 2.8
+ 3.5
+ 2.8
V
Output current (-2.8 V
V
out
2.8 V)
GS
X
, VF
R
O
5.0
-
mA
Output impedance on out. VF
R
O in the frequency range from 0 to 3.4 kHz
1
Ohm
Load capacitance for output VF
R
O 0
500
pF
Bias voltage for output VF
R
O relatively to GNDA
-
100
mV
Noise abatement on supply on transmission
(+) - from 0 to 100 kHz;
(-) - from 0 to 100 kHz;
45
45
dB
5