ILA8842
1
I
2
C
BUS CONTROLLED SINGLE CHIP
TV-
RECEIVER
FEATURES
The following features are available:
Multi-standard vision IF circuit with an alignment-free PLL demodulator without external
components
Alignment-free multi-standard FM sound demodulator (4.5 MHz to 6.5 MHz)
Audio
switch
Automatic Volume Limiting
Flexible source selection with CVBS switch and Y(CVBS)/C input so that a comb filter can be
applied
Integrated chrominance trap circuit
Integrated luminance delay line
Asymmetrical peaking in the luminance channel with a (defeatable) noise coring function
PAL/SECAM/NTSC
decoder
Base-band delay line for PAL and SECAM or chroma comb filter for NTSC
Black stretching of non-standard CVBS or luminance signals
Integrated chroma band-pass filter with switchable centre frequency
Dynamic skin tone control circuit
Blue stretch circuit which offsets colours near white towards blue
RGB control circuit with "Continuous Cathode Calibration" and white point adjustment
Possibility to insert a "blue back" option when no video signal is available
Horizontal synchronization with two control loops and alignment-free horizontal oscillator
Vertical count-down circuit
Vertical driver optimised for DC-coupled vertical output stages
I2C-bus control of various functions
GENERAL DESCRIPTION
The ILA 8842 is I2C-bus controlled single chip TV processor which is intended to be applied in
PAL, NTSC, PAL/NTSC and multi-standard television receivers.
QUICK REFERENCE DATA
SYMBOL PARAMETER
MIN.
TYP.
MAX.
UNIT
Supply
VP
supply
voltage
- 8.0 -
V
IP supply
current
-
110
-
mA
Input voltages
ViVIFrms)
video IF amplifier sensitivity (RMS value)
-
35
-
V
ViSIF(rms)
sound IF amplifier sensitivity (RMS value)
-
1.0
-
mV
ViAUDIO(rms)
external audio input (RMS value)
-
350
-
mV
ViCVBS(p-p)
external CVBS/Y input (peak-to-peak
value)
- 1.0 -
V
ViCHROMA(p-
p)
external chroma input voltage (burst
amplitude) (peak-to-peak value)
- 0.3 -
V
ViRGB(p-p)
RGB inputs (peak-to-peak value)
-
0.7
-
V
Output signals
VoCVBS(p-p)
demodulated CVBS output (peak-to-peak
value)
- 2.2 -
V
ILA8842
2
IoTUNER
tuner AGC output current range
0
-
5
mA
VoVIDSW(p-p)
CVBS1/CVBS2 output voltage of video
switch (peak-to-peak value)
- 2.0/
1.0
- V
VoB-Y(p-p)
-(R-Y) output/input voltage (peak-to-peak
value)
- 1.05 - V
VoR-Y(p-p)
-(B-Y) output/input voltage (peak-to-peak
value)
- 1.33 - V
VoY(p-p)
Y output/input voltage (peak-to-peak
value)
- 1.4 -
V
VoRGB(p-p)
RGB output signal amplitudes (peak-to-
peak value)
- 2.0 -
V
IoHOR
horizontal output current
10
-
-
mA
IoVERT
vertical output current (peak-to-peak
value)
- 1 -
mA
ILA8842
3
PINNING
SYMBOL PIN
DESCRIPTION
SNDIF
1
Sound IF input
AUDIOEXT
2
External audio input
NC 3
not
connected
NC 4
not
connected
PLLLF
5
IF-PLL loop filter
IFVO
6
IF video output
SCL
7
serial clock input
SDA
8
serial data input/output
DECBG 9
bandgap
decoupling
CHROMA
10
chrominance input (S-VHS)
CVBS/Y
11
external CVBS/Y input
VP1
12
main supply voltage (+8 V)
CVBSINT
13
internal CVBS input
GND1 14
ground
1
AUDIOOUT 15
audio
output
SECPLL
16
SECAM PLL decoupling
CVBSEXT
17
external CVBS input
BLKIN 18
black-current
input
BO 19
blue
output
GO 20
green
output
RO 21
red
output
BCLIN
22
beam current limiter input/V-guard input
RI
23
red input for insertion
GI
24
green input for insertion
BI
25
blue input for insertion
RGBIN
26
RGB insertion input
LUMIN 27
not
connected
LUMOUT 28
luminance
output
BYO
29
(B-Y) signal output
RYO
30
(R-Y) signal output
BYI
31
(B-Y) signal input (not available)
RYI
32
(R-Y) signal input (not available)
REFO
33
subcarrier reference output
XTAL1
34
3.58 MHz crystal connection
XTAL2
35
4.43/3.58 MHz crystal connection
DET
36
loop filter phase detector
VP2
37
2nd supply voltage (+8 V)
CVBS1O 38
CVBS-1
output
DECDIG
39
Decoupling digital supply
HOUT 40
horizontal
output
FBISO
41
flyback input/sandcastle output
PH2LF 42
phase-2
filter
PH1LF 43
phase-1
filter
GND2 44
ground
2
AVL 45
AVL
capacitor
VDRB
46
vertical drive B output
VDRA
47
vertical drive A output
IFIN1
48
IF input 1
IFIN2
49
IF input 2
EHTO
50
EHT/overvoltage protection input
VSC
51
vertical sawtooth capacitor
Iref
52
reference current input
DECAGC
53
AGC decoupling capacitor
AGCOUT 54
tuner AGC output
AUDEEM 55
Audio
deemphasis
DECSDEM
56
Decoupling sound demodulator
ILA8842
4
Start-up procedure
Read the status bytes until POR = 0 and send all subaddress bytes. The horizontal output
signal is switched-on when the oscillator is calibrated.
Each time before the data in the IC is refreshed, the status bytes must be read. If POR = 1, the
procedure mentioned above must be carried out to restart the IC.
When this procedure is not followed the horizontal frequency may be incorrect after power-up
or after a power dip.
Valid subaddresses: 00 to 1A (subaddresses 04 to 07 and 17 are not used), subaddress FE is
reserved for test purposes.Auto-increment mode available for subaddresses.
Table 1 Input status bits.
DATA BYTE
FUNCTION SUB
ADDRE
SS
(HEX)
D7 D6 D5 D4 D3 D2 D1 D0
Control 0
00
INA
INB
INC BCO FOA FOB
XA
XB
Control 1
01
FOR
F
FOR
S
DL STB POC CM2
CM1
CM
0
Hue
02 AVL
AKB A5 A4 A3 A2 A1 A0
Horizontal shift (HS)
03
VIM
GAI
A5
A4
A3
A2
A1
A0
Vertical slope (VS)
08
NCI
N
STM
A5 A4 A3 A2 A1 A0
Vertical amplitude (VA)
09
VID LBM
A5
A4
A3
A2
A1
A0
S-correction
(SC)
0A
0 EVG
A5 A4 A3 A2 A1 A0
Vertical shift (VSH)
0B
SBL PRD
A5
A4
A3
A2
A1
A0
White point R
0C
0
0
A5
A4
A3
A2
A1
A0
White point G
0D
0
0
A5
A4
A3
A2
A1
A0
White point B
0E
MAT
0
A5
A4
A3
A2
A1
A0
Peaking
0F
0 0 A5 A4 A3 A2 A1 A0
Brightness
10 RBL
COR
A5 A4 A3 A2 A1 A0
Saturation
11 IE1 0 A5 A4 A3 A2 A1 A0
Contrast
12 AFW
IFS A5 A4 A3 A2 A1 A0
AGC take-over
13
MO
D
VS
W
A5 A4 A3 A2 A1 A0
Volume
control
14 SM FAV A5 A4 A3 A2 A1 A0
Adjustment
IF-PLL
15 IFA
IFB
IFC 0 0 0 0 0
Control 2
18
OSO VSD
CB
BLS BKS
0
0
BB
Control 3
19
HOB
BPS ACL CMB AST CL2 CL1 CL0
Control
4
1A 0 0 0 0 0 0 FFI
EB
S
Control
5
1B 0 0 0 0 0 0 0
FC
O
ILA8842
5
Table 2 Output status bits.
DATA BYTE
FUNCTION SUB
ADDRE
SS
(HEX)
D7 D6 D5 D4 D3 D2 D1 D0
00 POR
FSI X SL
XPR
CD2
CD1
CD
0
01 NDF
IN1 X IFI
AFA
AFB
SXA
SX
B
Output status bytes
02 N2
X
BCF
IVW
ID3
ID2
ID1
ID0
Table 3 Characteristics
Parameter
CONDITIONS
min Typ. max unit
Supplies
POWER SUPPLY (PINS 12 AND 37)
supply voltage
7,2
8
8,8 V
supply current pin 12
-
70
-
mA
supply current pin 37
-
60
-
mA
total power dissipation
-
1040
-
mW
IF circuit
VISION IF AMPLIFIER INPUTS (PINS 48 AND 49)
fi = 38.90 MHz
10
35
100 V
fi = 45.75 MHz
10
35
100 V
input sensitivity (RMS value)
fi = 58.75 MHz
10
35
100 V
input resistance (differential)
-
2
-
k
input capacitance (differential)
-
3
-
pF
gain control range
64
75
-
dB
maximum input signal (RMS value)
150
-
-
mV
PLL DEMODULATOR (PLL FILTER ON PIN 5);
Free-running frequency of VCO
PLL
not
locked,
deviation from
nominal setting
-500 - +500 kHz
Catching range PLL
-
2
-
MHz
Acquisition time PLL
-
-
20 ms
VIDEO AMPLIFIER OUTPUT (PIN 6);
zero signal output level
negative modulation;
-
4,2
-
V
positive modulation;
-
2,2
-
V
top sync level
negative modulation
1,8
1,9
2
V
white level
positive modulation
-
4,4
-
V
Difference in amplitude between negative and
positive modulation
-
0
15
%
video output impedance
-
50
-
Internal bias current of NPN emitter follower
output transistor
1
-
-
mA
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