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Электронный компонент: IN7406N

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TECHNICAL DATA
1
INTEGRAL
Hex Inverter Buffers/Drivers with
Open-Collector High-Voltage
Outputs
The IN7406 monolithic TTL hex inverter buffers/drivers feature
high-voltage open collector outputs for interfacing with high-level
circuits (such as MOS) or for driving high-current loads (such as lamps
or relays), and are also characterized for use as inverter buffers for
driving TTL inputs.
Minimum breakdown Voltages is 30 V
Maximum sink Current is 40 m
Converts TTL Voltage Levels to MOS Levels
Open-Collector Driver for Indicator Lamps and Relays
Inputs Fully Compatible with MOST TTL Circuits.
IN7406
ORDERING INFORMATION
IN7406N Plastic
IN7406D SOIC
IZ7406
Chip
T
A
= -10
to 70
C
for all packages
LOGIC DIAGRAM
Y = A
PIN 14 =V
CC
PIN 7 = GND
PIN ASSIGNMENT
FUNCTION TABLE
Inputs
Output
A
Y
L
Z
H
L
Z = High Impedance
IN7406
2
INTEGRAL
MAXIMUM RATINGS
*
Symbol
Parameter
Value
Unit
V
CC
Supply Voltage
7.0
V
V
IN
Input Voltage
5.5
V
V
OUT
Output Voltage
30
V
Tstg
Storage Temperature Range
-65 to +150
C
*
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Max
Unit
V
CC
Supply Voltage
4.75
5.25
V
V
IH
High Level Input Voltage
2.0
V
V
IL
Low Level Input Voltage
0.8
V
U
OH
High Level Output Voltage
30
V
I
OL
Low Level Output Current
40
mA
T
A
Ambient Temperature Range
-10
+70
C



DC ELECTRICAL CHARACTERISTICS
Guaranteed Limit
Symbol
Parameter
Test Conditions
Min
Max
Unit
V
IK
Input Clamp Voltage
V
CC
= 4.75V, I
IN
= -12 mA
-1.5
V
I
OH
High Level Output Current
V
CC
= 4.75V, V
OH
=30V
0.25
mA
V
OL
Low Level Output Voltage
V
CC
= 4.75V, I
OL
= 16 mA
0.4
V
V
CC
= 4.75V, I
OL
= 40 mA
0.7
I
IH
High Level Input Current
V
CC
= 5.25V, V
IN
= 2.4 V
0.04
mA
I
IL
Low Level Input Current
V
CC
= 5.25V, V
IN
= 0.4 V
-1.6
mA
V
CC
= 5.25V
Outputs High
48
mA
I
CC
Supply Current
Outputs Low
51
IN7406
3
INTEGRAL
AC ELECTRICAL CHARACTERISTICS
(T = 25
C, V
CC
= 5.0 V, C
L
= 15 pF,
R
L
= 110
, Input t
r
= t
f
= 10 ns)
Symbol
Parameter
Min
Max
Unit
t
PLH
Propagation Delay Time, Low to High Level Output (from
Input to Output)
18
ns
t
PHL
Propagation Delay Time, High to Low Level Output (from
Input to Output)
28
ns
Figure 1. Switching Waveforms
* Includes all probe and jig capacitance
Figure 2. Test Circuit
IN7406
4
INTEGRAL
CHIP PAD DIAGRAM IZ7406

Pad size 0.140 x 0.140 mm (Pad size is given as per metallization layer)
Thickness of chip 0,46
0,02 mm

PAD LOCATION
Pad No
Symbol
X
Y
01
A1
0.090
0.380
02
Y1
0.090
0.090
03
A2
0.460
0.090
04
Y2
0.830
0.090
05
A3
1.220
0.090
06
Y3
1.220
0.380
07
GND
1.220
0.630
08
Y4
1.220
0.880
09
A4
1.220
1.170
10
Y5
0.830
1.170
11
A5
0.460
1.170
12
Y6
0.090
1.170
13
A6
0.090
0.880
14
V
CC
0.090
0.630
09
08
12
11
10
07
1.45 0.03
06
05
04
03
(0,0)
02
01
Chip marking
3
13