TECHNICAL DATA
IN74ACT125
Quad 3-State Noninverting Buffers
High-Speed Silicon-Gate CMOS
ORDERING INFORMATION
IN74ACT125N Plastic
IN74ACT125D SOIC
T
A
= -40
to 85 C for all packages
The IN74ACT125 is identical in pinout to the LS/ALS125, HC/HCT125.
The IN74ACT125 may be used as a level converter for interfacing TTL or
NMOS outputs to High Speed CMOS inputs.
The IN74ACT125 noninverting buffers are designed to be used with 3-
state memory address drivers, clock drivers, and other bus-oriented systems.
The devices have four separate output enables that are active-low.
TTL/NMOS Compatible Input Levels
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 4.5 to 5.5 V
Low Input Current: 1.0
A; 0.1 A @ 25C
Outputs Source/Sink 24 mA
LOGIC DIAGRAM
PIN 14 =V
CC
PIN 7 = GND
PIN ASSIGNMENT
FUNCTION TABLE
Inputs Output
A OE Y
H L H
L L L
X H Z
X = don't care
Z = high impedance
1
IN74ACT125
MAXIMUM RATINGS
*
Symbol Parameter
Value
Unit
V
CC
DC Supply Voltage (Referenced to GND)
-0.5 to +7.0
V
V
IN
DC Input Voltage (Referenced to GND)
-0.5 to V
CC
+0.5
V
V
OUT
DC Output Voltage (Referenced to GND)
-0.5 to V
CC
+0.5
V
I
IN
DC Input Current, per Pin
20
mA
I
OUT
DC Output Sink/Source Current, per Pin
50
mA
I
CC
DC Supply Current, V
CC
and GND Pins
50
mA
P
D
Power Dissipation in Still Air, Plastic DIP+
SOIC Package+
750
500
mW
Tstg
Storage Temperature
-65 to +150
C
T
L
Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
260
C
*
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/
C from 65 to 125C
SOIC Package: : - 7 mW/
C from 65 to 125C
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min
Max
Unit
V
CC
DC Supply Voltage (Referenced to GND)
4.5
5.5
V
V
IN
, V
OUT
DC Input Voltage, Output Voltage (Referenced to GND)
0
V
CC
V
T
J
Junction Temperature (PDIP)
140
C
T
A
Operating Temperature, All Package Types
-40
+85
C
I
OH
Output Current - High
-24
mA
I
OL
Output Current - Low
24
mA
t
r
, t
f
Input Rise and Fall Time
*
(except Schmitt Inputs)
V
CC
=4.5 V
V
CC
=5.5 V
0
0
10
8.0
ns/V
*
V
IN
from 0.8 V to 2.0 V
This device contains protection circuitry to guard against damage due to high static voltages or electric fields.
However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this
high-impedance circuit. For proper operation, V
IN
and V
OUT
should be constrained to the range GND
(V
IN
or
V
OUT
)
V
CC
.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V
CC
). Unused
outputs must be left open.
2
IN74ACT125
DC ELECTRICAL CHARACTERISTICS
(Voltages Referenced to GND)
V
CC
Guaranteed Limits
Symbol Parameter
Test
Conditions V
25
C -40C to
85
C
Unit
V
IH
Minimum High-
Level Input Voltage
V
OUT
= V
CC
-0.1 V
4.5
5.5
2.0
2.0
2.0
2.0
V
V
IL
Maximum Low -
Level Input Voltage
V
OUT
=0.1 V
4.5
5.5
0.8
0.8
0.8
0.8
V
V
OH
Minimum High-
Level Output Voltage
I
OUT
-50 A
4.5
5.5
4.4
5.4
4.4
5.4
V
*
V
IN
=V
IH
I
OH
=-24 mA
I
OH
=-24 mA
4.5
5.5
3.86
4.86
3.76
4.76
V
OL
Maximum Low-
Level Output Voltage
I
OUT
50 A
4.5
5.5
0.1
0.1
0.1
0.1
V
*
V
IN
= V
IL
I
OL
=24 mA
I
OL
=24 mA
4.5
5.5
0.36
0.36
0.44
0.44
I
IN
Maximum Input
Leakage Current
V
IN
=V
CC
or GND
5.5
0.1
1.0
A
I
CCT
Additional Max.
I
CC
/Input
V
IN
=V
CC
- 2.1 V
5.5
1.5
mA
I
OZ
Maximum Three-
State Leakage
Current
V
IN
(OE)= V
IH
or V
IL
V
IN
=V
CC
or GND
V
OUT
=V
CC
or GND
5.5
0.5
5.0
A
I
OLD
+Minimum Dynamic
Output Current
V
OLD
=1.65 V Max
5.5
75
mA
I
OHD
+Minimum Dynamic
Output Current
V
OHD
=3.85 V Min
5.5
-75
mA
I
CC
Maximum Quiescent
Supply Current
(per Package)
V
IN
=V
CC
or GND
5.5
8.0
80
A
*
All outputs loaded; thresholds on input associated with output under test.
+Maximum test duration 2.0 ms, one output loaded at a time.
3
IN74ACT125
AC ELECTRICAL CHARACTERISTICS
(V
CC
=5.0 V
10%, C
L
=50pF,Input t
r
=t
f
=3.0 ns)
Guaranteed
Limits
Symbol Parameter
25
C -40C to 85C
Unit
Min
Max
Min
Max
t
PLH
Propagation Delay, Input A to Output Y (Figure 1)
1.0
9.0
1.0
10.0
ns
t
PHL
Propagation Delay, Input A to Output Y (Figure 1)
1.0
9.0
1.0
10.0
ns
t
PZH
Propagation Delay, Output Enable toY (Figure 2)
1.0
8.5
1.0
9.5
ns
t
PZL
Propagation Delay, Output Enable toY (Figure 2)
1.0
9.5
1.0
10.5
ns
t
PHZ
Propagation Delay, Output Enable toY (Figure 2)
1.0
9.5
1.0
10.5
ns
t
PLZ
Propagation Delay, Output Enable toY (Figure 2)
1.0
10.0
1.0
10.5
ns
C
IN
Maximum Input Capacitance
4.5
4.5
pF
Typical @25
C,V
CC
=5.0 V
C
PD
Power Dissipation Capacitance
45
pF
Figure 1. Switching Waveforms
Figure 2. Switching Waveforms
EXPANDED LOGIC DIAGRAM
(1/4 of the Device)
4
IN74ACT125
N SUFFIX PLASTIC DIP
(MS - 001AA)
Symbol
MIN
MAX
A
18.67
19.69
B
6.1
7.11
C
5.33
D
0.36
0.56
F
1.14
1.78
G
H
J
0
10
K
2.92
3.81
NOTES:
L
7.62
8.26
1.
Dimensions "A", "B" do not include mold flash or protrusions.
M
0.2
0.36
Maximum mold flash or protrusions 0.25 mm (0.010) per side.
N
0.38
D SUFFIX SOIC
(MS - 012AB)
Symbol
MIN
MAX
A
8.55
8.75
B
3.8
4
C
1.35
1.75
D
0.33
0.51
F
0.4
1.27
G
H
J
0
8
NOTES:
K
0.1
0.25
1.
Dimensions A and B do not include mold flash or protrusion.
M
0.19
0.25
2.
Maximum mold flash or protrusion 0.15 mm (0.006) per side
P
5.8
6.2
for A; for B 0.25 mm (0.010) per side.
R
0.25
0.5
Dimension, mm
1.27
5.27
2.54
7.62
Dimension, mm
A
B
H
C
K
C M
J
F
M
P
G
D
R x 45
SEATING
PLANE
0.25 (0.010) M T
-T-
1
14
7
8
A
B
F
G
D
L
H
SEATING
PLANE
N
K
0.25 (0.010) M T
M
J
-T-
C
1
14
7
8
5
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