IN74HC123
1
D
UAL
R
ETRIGGERABLE
M
ONOSTABLE
M
ULTIVIBRATOR
The IN74HC123 is identical in pinout to the LS/ALS123. The
device inputs are compatible with standard CMOS outputs; with
pullup resistors, they are compatible with LS/ALSTTL outputs.
There are two trigger inputs,
A
INPUT (negative edge) and
B INPUT (positive edge). These inputs are valid for rising/falling
signals.
The device may also be triggered by using the CLR input
(positive-edge) because of the Schmitt-trigger input; after triggering
the output maintains the MONOSTABLE state for the time period
determined by the external resistor R
X
and capacitor C
X
. Taking
CRL
low breaks this MONOSTABLE STATE. If the next trigger
pulse occurs during the MONOSTABLE period it makes the
MONOSTABLE period longer.
ћ Outputs Directly Interface to CMOS, NMOS, and TTL
ћ Operating Voltage Range: 3.0 to 6.0 V
ћ Low Input Current: 1.0 A
ћ High Noise Immunity Characteristic of CMOS Devices
ORDERING INFORMATION
IN74HC123N Plastic
IN74HC123D SOIC
T
A
= -55
њ to 125њ C for all
packages
FUNCTION TABLE
Inputs Outputs
Note
A B CRL Q
Q
H H Output
Enable
X L H L
*
H
*
Inhibit
H X H L
*
H
*
Inhibit
L H Output
Enable
L H
Output
Enable
X X L L H Inhibit
X = don't care
*
- except for monostable period
Note
(1) C
X
, R
X
, D
X
are external components.
(2) D
X
is a clamping diode.
The external capacitor is charged to V
CC
in the
stand-by state, i.e. no trigger. When the supply
voltage is turned off C
X
is discharged mainly
through an internal parasitic diode. If C
X
is
sufficiently large and V
CC
decreases rapidy, there
will be some possibility of damaging the I.C. with
a surge current or latch-up. If the voltage supply
filter capacitor is large enough and V
CC
decrease
slowly, the surge current is automatically limited
and damage the I.C. is avoided. The maximum
forward current of the parasitic diode is
approximately 20 mA.
LOGIC DIAGRAM
PIN 16 =V
CC
PIN 8 = GND
PIN ASSIGNMENT
IN74HC123
2
MAXIMUM RATINGS
*
Symbol Parameter
Value
Unit
V
CC
DC Supply Voltage (Referenced to GND)
-0.5 to +7.0
V
V
IN
DC Input Voltage (Referenced to GND)
-1.5 to V
CC
+1.5
V
V
OUT
DC Output Voltage (Referenced to GND)
-0.5 to V
CC
+0.5
V
I
IN
DC Input Current, per Pin
A, B, CLR
C
X
, R
X
20
30
mA
I
OUT
DC Output Current, per Pin
25
mA
I
CC
DC Supply Current, V
CC
and GND Pins
50
mA
P
D
Power Dissipation in Still Air, Plastic DIP+
SOIC Package+
750
500
mW
Tstg
Storage Temperature
-65 to +150
њC
T
L
Lead Temperature, 1 mm from Case for 10
Seconds
(Plastic DIP or SOIC Package)
260
њC
*
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/
њC from 65њ to 125њC
SOIC Package: : - 7 mW/
њC from 65њ to 125њC
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min
Max
Unit
V
CC
DC Supply Voltage (Referenced to GND)
3.0
**
6.0 V
V
IN
, V
OUT
DC Input Voltage, Output Voltage (Referenced to
GND)
0 V
CC
V
T
A
Operating Temperature, All Package Types
-55
+125
њC
t
r
, t
f
Input Rise and Fall Time
CRL
(Figure 2)
V
CC
=2.0 V
V
CC
=4.5 V
V
CC
=6.0 V
0
0
0
1000
500
400
ns
A or B
-
No
Limit
R
X
External Timing Resistor
V
CC
<4.5 V
V
CC
™ 4.5 V
10
2.0
1000
1000
k
C
X
External Timing Capacitor
0
No
Limit
F
**
The In74HC123 will function at 2.0 V but for optimum pulse width stability, V
CC
should be above
3.0 V.
This device contains protection circuitry to guard against damage due to high static
voltages or electric fields. However, precautions must be taken to avoid applications of any voltage
higher than maximum rated voltages to this high-impedance circuit. For proper operation, V
IN
and
V
OUT
should be constrained to the range GND
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