TECHNICAL DATA
IN74HC30A
8-Input NAND Gate
ORDERING INFORMATION
IN74HC30AN
Plastic
IN74HC30AD
SOIC
T
A
= -55
125 C for all packages
The IN74HC30A is high-speed Si-gate CMOS device and is
compatible with low power Schottky TTL (LSTTL) . The device provide
the 8-input NAND function.
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1.0
A
High Noise Immunity Characteristic of CMOS Devices
LOGIC DIAGRAM
PIN 14 =V
CC
PIN 7 = GND
PIN ASSIGNMENT
FUNCTION TABLE
Inputs Output
A B D E F G H Y
L X X X X X X X H
X L X X X X X X H
X X L X X X X X H
X X X L X X X X H
X X X X L X X X H
X X X X X L X X H
X X X X X X L X H
X X X X X X X L H
H H H H H H H H L
X = don't care
A
C
D
Y
E
F
G
H
B
1
2
3
5
4
6
7
V CC
14
13
12
11
10
8
9
GND
A
H
G
B
Y
-.
-
-
C
D
F
E
1
IN74HC30A
MAXIMUM RATINGS
*
Symbol Parameter
Value
Unit
V
CC
DC Supply Voltage (Referenced to GND)
-0.5 to +7.0
V
V
IN
DC Input Voltage (Referenced to GND)
-1.5 to V
CC
+1.5
V
V
OUT
DC Output Voltage (Referenced to GND)
-0.5 to V
CC
+0.5
V
I
IN
DC Input Current, per Pin
20
mA
I
OUT
DC Output Current, per Pin
25
mA
I
CC
DC Supply Current, V
CC
and GND Pins
50
mA
P
D
Power Dissipation in Still Air, Plastic DIP**
SOIC Package**
750
500
mW
Tstg
Storage Temperature
-65 to +150
C
T
L
Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
260
C
*Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
**Derating - Plastic DIP: - 10 mW/
C from 65 to 125C
SOIC Package: : - 7 mW/
C from 65 to 125C
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min
Max
Unit
V
CC
DC Supply Voltage (Referenced to GND)
2.0
6.0
V
V
IN
, V
OUT
DC Input Voltage, Output Voltage (Referenced to GND)
0
V
CC
V
T
A
Operating Temperature, All Package Types
-55
+125
C
t
r
, t
f
Input Rise and Fall Time (Figure 1)
V
CC
=2.0 V
V
CC
=4.5 V
V
CC
=6.0 V
0
0
0
1000
500
400
ns
This device contains protection circuitry to guard against damage due to high static voltages or electric fields.
However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this
high-impedance circuit. For proper operation, V
IN
and V
OUT
should be constrained to the range GND
(V
IN
or
V
OUT
)
V
CC
.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V
CC
). Unused
outputs must be left open.
2
IN74HC30A
DC ELECTRICAL CHARACTERISTICS
(Voltages Referenced to GND)
V
CC
Guaranteed Limit
Symbol Parameter
Test
Conditions
V
25
C
to
-55
C
85
C
125
C
Unit
V
IH
Minimum High-Level
Input Voltage
V
OUT
0.1V or
V
OUT
V
CC
-0.1V
I
OUT
20 A
2.0
3.0
4.5
6.0
1.5
2.1
3.15
4.2
1.5
2.1
3.15
4.2
1.5
2.1
3.15
4.2
V
V
IL
Maximum Low -Level
Input Voltage
V
OUT
0.1V or
V
OUT
V
CC
-0.1V
I
OUT
20 A
2.0
3.0
4.5
6.0
0.5
0.9
1.35
1.8
0.5
0.9
1.35
1.8
0.5
0.9
1.35
1.8
V
V
IN
=V
IH
or V
IL
I
OUT
- 20 A
2.0
4.5
6.0
1.9
4.4
5.9
1.9
4.4
5.9
1.9
4.4
5.9
V
IN
= V
IH
or V
IL
I
OUT
- 2.4 mA
3.0 2.48 2.34
2.20
V
IN
= V
IH
or V
IL
I
OUT
- 4.0 mA
4.5 3.98 3.84
3.70
V
OH
Minimum High-Level
Output Voltage
V
IN
= V
IH
or V
IL
I
OUT
- 5.2 mA
6.0 5.48 5.34
5.20
V
V
IN
= V
IH
or V
IL
I
OUT
20 A
2.0
4.5
6.0
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
V
IN
= V
IH
or V
IL
I
OUT
2.4 mA
3.0 0.26 0.33 0.4
V
IN
= V
IH
or V
IL
I
OUT
4.0 mA
4.5 0.26 0.33 0.4
V
OL
Maximum Low-Level
Output Voltage
V
IN
= V
IH
or V
IL
I
OUT
5.2 mA
6.0
0.26 0.33 0.4
V
I
IL
Maximum Low-Level
Input Leakage Current
V
IN
= 0 V
6.0
-0.1
-1.0
-1.0
A
I
IH
Maximum High-Level
Input Leakage Current
V
IN
= V
CC
6.0 0.1 1.0 1.0
A
I
CC
Maximum Quiescent
Supply Current
(per Package)
V
IN
=V
CC
or 0 V
I
OUT
=0 A
6.0 2.0 20 40
A
3
IN74HC30A
AC ELECTRICAL CHARACTERISTICS
(C
L
=50pF,Input t
r
=t
f
=6.0 ns)
V
CC
Guaranteed Limit
Symbol Parameter V
25
C
to
-55
C
85C 125C Unit
t
PHL
, t
PLH
Maximum Propagation Delay (Figure 1)
2.0
4.5
6.0
175
35
30
220
44
37
265
53
45
ns
t
THL
, t
TLH
Maximum Output Transition Time
(Figure 1)
2.0
4.5
6.0
75
15
13
95
19
16
110
22
19
ns
C
IN
Maximum Input Capacitance
5.0
10
10
10
pF
Power Dissipation Capacitance (Per Gate)
T
A
=25
C,V
CC
=5.0 V
C
PD
Used to determine the no-load dynamic power
consumption:
P
D
=C
PD
V
CC
2
f+I
CC
V
CC
27 pF
V = V
1 CC
V = 0.5 V
2 CC
Input
Output
0.1
0.1
0.1
0.1
0.9
0.9
0.9
0.9
t
PHL
t
f
t
THL
t
PLH
t
r
t
TLH
V
2
V
2
V
2
V
2
0 V
GND
V
CC
V
1
Figure 1. Switching Waveforms
PULSE
GENERATOR
DEVICE
UNDER
TEST
V
CC
V
I
V
O
C
50 pF
L
R
T
Termination resistance R
T
- should
be equal to Z
OUT
of pulse generators
Figure 2. Test Circuit
4
IN74HC30A
N SUFFIX PLASTIC DIP
(MS - 001AA)
Symbol
MIN
MAX
A
18.67
19.69
B
6.1
7.11
C
5.33
D
0.36
0.56
F
1.14
1.78
G
H
J
0
10
K
2.92
3.81
NOTES:
L
7.62
8.26
1.
Dimensions "A", "B" do not include mold flash or protrusions.
M
0.2
0.36
Maximum mold flash or protrusions 0.25 mm (0.010) per side.
N
0.38
D SUFFIX SOIC
(MS - 012AB)
Symbol
MIN
MAX
A
8.55
8.75
B
3.8
4
C
1.35
1.75
D
0.33
0.51
F
0.4
1.27
G
H
J
0
8
NOTES:
K
0.1
0.25
1.
Dimensions A and B do not include mold flash or protrusion.
M
0.19
0.25
2.
Maximum mold flash or protrusion 0.15 mm (0.006) per side
P
5.8
6.2
for A; for B 0.25 mm (0.010) per side.
R
0.25
0.5
Dimension, mm
1.27
5.27
2.54
7.62
Dimension, mm
A
B
H
C
K
C M
J
F
M
P
G
D
R x 45
SEATING
PLANE
0.25 (0.010) M T
-T-
1
14
7
8
A
B
F
G
D
L
H
SEATING
PLANE
N
K
0.25 (0.010) M T
M
J
-T-
C
1
14
7
8
5
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