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Электронный компонент: IN90LS2333DW

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IN90S2333DW, IN90LS2333DW,
1
8-
BIT
M
ICROCONTROLLER WITH
2K/4K
BYTES
B
UILD
-
IN
P
ROGRAMMABLE
F
LASH
Description
The IN90S2333 is a low-power CMOS 8-bit
microcontroller based on the AVR RISC architecture. By
executing powerful instructions in a single clock cycle, the
IN90S2333 achieves throughputs approaching 1 MIPS
per MHz allowing the system designer to optimize power
consumption versus processing speed.
1
28
The AVR core combines a rich instruction set with 32 general purpose working
registers. All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU),
allowing two independent registers to be accessed in one single instruction executed in
one clock cycle. The resulting architecture is more code efficient while achieving
throughputs up to ten times faster than conventional CISC microcontrollers.
The AT90S2333/4433 provides the following features: 2K/4K bytes of In-System
Programmable Flash, 128/256 bytes EEPROM, 128 bytes SRAM, 20 general purpose I/O
lines, 32 general purpose working registers, two flexible timer/counters with compare
modes, internal and external interrupts, a programmable serial UART, 6-channel, 10-bit
ADC, programmable Watchdog Timer with internal oscillator, an SPI serial port and two
software selectable power saving modes. The Idle mode stops the CPU while allowing the
SRAM, timer/counters, SPI port and interrupt system to continue functioning. The Power
Down mode saves the register contents but freezes the oscillator, disabling all other chip
functions until the next interrupt or hardware reset.
The device is manufactured using Atmel's high density nonvolatile memory
technology. The on-chip Flash program memory can be reprogrammed in-system through
an SPI serial interface or by a conventional nonvolatile memory programmer. By
combining a RISC 8-bit CPU with In-System Programmable Flash on a monolithic chip, the
Atmel AT90S2333/4433 is a powerful microcontroller that provides a highly flexible and
cost effective solution to many embedded control applications. The AT90S2333/4433 AVR
is supported with a full suite of program and system development tools including: C
compilers, macro assemblers, program debugger/simulators, in-circuit emulators, and
evaluation kits.
IN90S2333DW, IN90LS2333DW,
2

Features
High-performance and Low-power AVR
8-bit RISC Architecture
- 118 Powerful Instructions - Most Single Cycle Execution
-
32 x 8 General Purpose Working Registers
-
Up to 8 MIPS Throughput at 8 MHz
Data and Nonvolatile Program Memory
- 2K/4K Bytes of In-System Programmable Flash Endurance 1,000 Write/Erase Cycles
-
128 Bytes of SRAM
-
128/256 Bytes of In-System Programmable EEPROM Endurance: 100,000 Write/Erase Cycles
-
Programming Lock for Flash Program and EEPROM Data Security
Peripheral Features
- One 8-bit Timer/Counter with Separate Prescaler
-
Expanded 16-bit Timer/Counter with Separate Prescaler, Compare, Capture Modes and 8-, 9- or
10-bit PWM
- On-chip Analog Comparator
-
Programmable Watchdog Timer with Separate On-chip Oscillator
-
Programmable UART
-
6-channel, 10-bit ADC
-
Master/Slave SPI Serial Interface
Special Microcontroller Features
- Brown-Out Reset Circuit
-
Enhanced Power-on Reset Circuit
-
Low-Power Idle and Power Down Modes
-
External and Internal Interrupt Sources
Specifications
- Low-power, High-speed CMOS Process Technology
-
Fully Static Operation
Power Consumption at 4 MHz, 3V, 25
o
C
- Active: 3.4 mA
-
Idle Mode: 1.4 mA
-
Power Down Mode: <1 A
I/O and Packages
- 20 Programmable I/O Lines
-
28-pin PDIP and 32-pin TQFP
Operating Voltage
- 2.7V - 6.0V (IN90LS2333)
-
4.0V - 6.0V (IN90S2333 )
Speed Grades
-
0 - 4 MHz (IN90LS2333 )
0 - 8 MHz (IN90S2333 )
IN90S2333DW, IN90LS2333DW,
3
Block Diagram
IN90S2333DW, IN90LS2333DW,
4
Pin Descriptions
VCC
Supply voltage
GND
Ground
Port B (PB5..PB0)
Port B is a 6-bit bi-directional I/O port with internal pullup resistors.
The Port B output buffers can sink 20 mA. As inputs, Port B pins that
are externally pulled low will source current if the pull-up resistors are
activated.
Port B also serves the functions of various special features of the IN90S2333.
The port B pins are tristated when a reset condition becomes active, even if the clock is not running.
Port C (PC5..PC0)
Port C is a 6-bit bi-directional I/O port with internal pullup resistors. The Port C output buffers can sink 20
mA. As inputs, Port C pins that are externally pulled low will source current if the pull-up resistors are
activated. Port C also serves as the analog inputs to the A/D Converter.
The port C pins are tristated when a reset condition becomes active, even if the clock is not running.
Port D (PD7..PD0)
Port D is an 8-bit bi-directional I/O port with internal pull-up resistors. The Port D output buffers can sink
20 mA. As inputs, Port D pins that are externally pulled low will source current if the pull-up resistors are
activated.
Port D also serves the functions of various special features of the IN90S2333
The port D pins are tristated when a reset condition becomes active, even if the clock is not running.
RESET
Reset input. An external reset is generated by a low level on the RESET pin. Reset pulses longer than 50
ns will generate a reset, even if the clock is not running. Shorter pulses are not guaranteed to generate a
reset.
XTAL1
Input to the inverting oscillator amplifier and input to the internal clock operating circuit.
XTAL2
Output from the inverting oscillator amplifier
AVCC via a low-pass filter. See
This is the supply voltage pin for the A/D Converter. It should be externally connected to V
CC
Datasheet for details on operation of the ADC.
AREF
This is the analog reference input for the A/D Converter. For ADC operations, a voltage in the range 2.7V
to AVCC must be applied to this pin.
IN90S2333DW, IN90LS2333DW,
5
AGND
If the board has a separate analog ground plane, this pin should be connected to this ground plane.
Otherwise, connect to GND.
Architectural Overview
The fast-access register file concept contains 32 x 8-bit general purpose working registers with a single
clock cycle access time. This means that during one single clock cycle, one Arithmetic Logic Unit (ALU)
operation is executed. Two operands are output from the register file, the operation is executed, and the
result is stored back in the register file - in one clock cycle.
Six of the 32 registers can be used as three 16-bits indirect address register pointers for Data Space
addressing - enabling efficient address calculations. One of the three address pointers is also used as the
address pointer for the constant table look up function. These added function registers are the 16-bits X-
register, Y-register and Z-register.
The ALU supports arithmetic and logic functions between registers or between a constant and a register.
Single register operations are also executed in the ALU. In addition to the register operation, the
conventional memory addressing modes can be used on the register file as well. This is enabled by the
fact that the register file is assigned the 32 lowermost Data Space addresses ($00 - $1F), allowing them
to be accessed as though they were ordinary memory locations.
AVR IN90S2333 Architecture