ICs for TV-SETS
INF8594E
1
INTEGRAL
512 x 8-Bit CMOS EEPROM with I
2
C-Bus Interface
The INF8594E-2 is a 4-Kbit (512 x 8-bit) floating gate electrically erasable programmable read only memory
(EEPROM). By using an internal redundant storage code it is fault tolerant to single bit errors. This feature dramatically
increases reliability. IC works in systems with serial
I
2
C-bus which consists of 2 lines: for data -serial data input/output (SDA) and for clock - serial clock input (SCL). Up to four
INF8594E-2 devices may be connected to the I
2
C-bus.The programming
of the array is implemented by electron's tunneling. The programming voltage is generated on-chip, using a voltage multiplier.
Power consumption is low owing to the full CMOS technology used. Device is functionally identical to the PCF8594E-2, Philips.
IC are made in 8-pin DIP and 8-pin SOP.
FEATURES
Low Power CMOS
maximum active current 2.5 mA
maximum standby current 10
A
Non-volatile storage of 4-Kbits organized as two pages each 256 x 8-bits
Single supply (Ucc=4,5 B - 5,5 B)
On-chip voltage multiplier
Serial input/output I
2
C-bus
Automatically added word address
Internal timer for writing (no external components)
100 000 ERASE/WRITE cycles per byte;
Write
operations
-byte write mode
-8-byte page write mode (minimizes total write time per byte)
Write protection input
Read
operations
sequential read
random read
Power-on
reset
High reliability by using a redundant storage code (single bit error correction)
Endurance
100 k; T
amb
=85
0
C
10 years non-volatile data retention time
Pin and Address compatible to PCx8582x-2 Family and PCx8598x2 Family
Temperature range: -40
0
C
+85
0
C
PIN DESCRIPTION
SYMBOL
PIN
DESCRIPTION
WP
A1
A2
Uss
SDA
SCL
PTC
Ucc
1
2
3
4
5
6
7
8
WRITE protection input
address input 1
address input 2
GND
Informational line, input/output
Clock line, input
programming management
Supply voltage
WP
A1
A2
Uss
Ucc
PTC
SCL
SDA
1
2
3
4
8
7
6
5
PIN ASSIGNMENT
ICs for TV-SETS
INF8594E
2
INTEGRAL
Electrical Characteristics
Parameter
Conditions
Symbol
Min.
Max
Supply current READ,mkA
f
SCL
=100kHz
U
CC
=5.5B
I
CC0(RD)
-
200
Supply current ERASE/WRITE,
mA
f
SCL
=100kHz
U
CC
=5.5B
I
CC0(E/WR)
-
2,5
Standby Supply
Current,
A
U
CC
=5,5B
I
CCS
-
10.0
Clock input frequency, kHz
f
SCL
0
100
E/WR cycle time, ms
t
E/WR
4
10
PTC input
Input high voltage, V
U
IH
0,9U
CC
U
CC
+0,8
Input low voltage, V
U
IL
-0,8
0,1U
CC
SCL inputs
Input high voltage, V
U
IH
0,7U
CC
U
CC
+0,8
Input low voltage, V
U
IL
-0,8
0,3U
CC
Clock input frequency, kHz
f
SCL
0
100
Leakage current,
A
U
I
=Ucc or GND
I
LI
1A
Input capacitance, pF
U
I
=GND
C
I
7
SDA input/output
Low input voltage, V
U
IL
-0.8
0.3U
CC
High input voltage, V
U
IH
0.7Ucc
U
CC
+0.8
Low level output voltage, V
I
OL
=3,
Ucc=Uccmin
U
OL
0.4
Output leakage current,
A
U
OH
=Ucc
I
LO
1
Input capacitance, pF
U
I
=0B
I
7
Duration of the ERASE/WRITE
cycle
-internal generator
t
E/WR
4
10
-external clock signal
4
10
Frequency of the external clock
programming signals, kHz
fp
25
60
Number of the ERASE/WRITE
cycles per byte
=-40-+85
,
t
E/W
=4-10 ,
=22
, t
E/W
=5
N
E/W
100 000
10 000
Time of data storage
= 55
t
S
10
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