82562ET 10/100 Mbps Platform LAN
Connect (PLC)
Networking Silicon
Datasheet
Product Features
s
IEEE 802.3 10BASE-T/100BASE-TX
compliant physical layer interface
s
IEEE 802.3u Auto-Negotiation support
s
Digital Adaptive Equalization control
s
Link status interrupt capability
s
XOR tree mode support
s
3-port LED support (speed, link and
activity)
s
10BASE-T auto-polarity correction
s
LAN Connect Interface
s
Diagnostic loopback mode
s
1:1 transmit transformer ratio support
s
Low power (less than 300 mW in active
transmit mode)
s
Reduced power in "unplugged mode" (less
than 50 mW)
s
Automatic detection of "unplugged mode"
s
3.3 V device
s
48-pin Shrink Small Outline Package
Revision 1.3
March 2003
Datasheet
Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual
property rights is granted by this document. Except as provided in Intel's Terms and Conditions of Sale for such products, Intel assumes no liability
whatsoever, and Intel disclaims any express or implied warranty, relating to sale and/or use of Intel products including liability or warranties relating
to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. Intel products are not
intended for use in medical, life saving, or life sustaining applications.
Intel may make changes to specifications and product descriptions at any time, without notice.
Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined." Intel reserves these for
future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.
The 82562ET PLC may contain design defects or errors known as errata which may cause the product to deviate from published specifications.
Current characterized errata are available on request.
Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.
Copies of documents which have an ordering number and are referenced in this document, or other Intel literature may be obtained by calling 1-800-
548-4725 or by visiting Intel's website at http://www.intel.com.
Copyright 2003, Intel Corporation
* Other brands and names are the property of their respective owners.
Datasheet
iii
Networking Silicon -- 82562ET
Revision History
Revision
Revision Date
Description
1.3
March 2003
Added product ordering code in Section 1.0.
1.2
October 2001
Removed confidential status.
Removed sections: "Physical Layer Interface Functionality" and "Platform
LAN Connect".
Changed "Electrical and Timing Specifications" section to "Voltage and Tem-
perature Specifications" and removed timing specifications.
1.1
June 2000
Advance Information Datasheet release (Intel Confidential).
On cover page, replaced Boundary Scan Support with XOR tree mode sup-
port. Added bullet for LAN Connect I/F.
Pg. 3, added a Solution Block Diagram as included in OR-2338 Pg. 4 but
replaced EM with ET in diagram.
Pg. 11, removed Figure 4, "NRZ to MLT-3 Encoding Diagram".
Pg. 35, changed the Rev. number on the 82562 Pinout symbol to 1.0.
1.0
May 2000
Advance Information Datasheet release (Intel Secret).
Modified Table 1 "82562ET Hardware Configuration" to add one row for XOR
Tree and include column for comments.
Updated the descrition of the Activity LED signal in Section 3.6, "LED Pins".
Revised Section 3.7, "Miscellaneous Control Pins" to reflect references to
Table 1 "82562ET Hardware Configuration".
Updated Section 4.0, "Voltage and Temperature Specifications".
Replaced diagrams in Section 5.1, "Package Information".
0.6
Nov. 1999
Corrected Figure 4 "NRZ to MLT-3 Encoding Diagram on Pg. 11 to reflect
correct signal transitions.
Removed "10BASE-T Error Detection and Reporting" section since the
82562 does not do 10BASE-T error reporting.
0.55
Sept. 1999
Initial release.
82562ET -- Networking Silicon
iv
Datasheet
Datasheet
v
Networking Silicon -- 82562ET
Contents
1.0
Introduction......................................................................................................................... 1
1.1
Overview ............................................................................................................... 1
1.2
Features ................................................................................................................ 1
1.3
References ............................................................................................................ 1
2.0
82562ET Architectural Overview........................................................................................ 3
3.0
82562ET Signal Descriptions ............................................................................................. 5
3.1
Signal Type Definitions ......................................................................................... 5
3.2
Twisted Pair Ethernet (TPE) Pins .........................................................................5
3.3
External Bias Pins ................................................................................................ 5
3.4
Clock Pins ............................................................................................................ 6
3.5
Platform LAN Connect Interface Pins....................................................................6
3.6
LED Pins .............................................................................................................. 7
3.7
Miscellaneous Control Pins .................................................................................. 7
3.8
Power and Ground Connections .......................................................................... 8
4.0
Voltage and Temperature Specifications ...........................................................................9
4.1
Absolute Maximum Ratings................................................................................... 9
4.2
DC Characteristics ............................................................................................... 9
4.2.1
X1 Clock DC Specifications ..................................................................... 9
4.2.2
LAN Connect Interface DC Specifications .............................................10
4.2.3
LED DC Specifications .......................................................................... 10
4.2.4
10BASE-T Voltage and Current DC Specifications ............................... 10
4.2.5
100BASE-TX Voltage and Current DC Specifications ..........................11
5.0
Package and Pinout Information ...................................................................................... 13
5.1
Package Information ........................................................................................... 13
5.2
Pinout Information ............................................................................................... 14
5.2.1
82562ET Pin Assignments .................................................................... 14
5.2.2
82562ET Shrink Small Outlying Package Diagram ............................... 15
PDF 
ZIP