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Электронный компонент: N80930AD4

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ADVANCE INFORMATION
COPYRIGHT INTEL CORPORATION, 1997
February 1997
Order Number: 272917-003
8
x
930A
x
UNIVERSAL SERIAL BUS
MICROCONTROLLER
The 8
x
930A
x
USB microcontroller is based on an 8
x
C251S
x
microcontroller core. It consists of standard
8
x
C251Sx peripherals plus an added USB function. The 8
x
930A
x
uses the standard instruction set of the
MCS 251 architecture, which is binary code compatible with the MCS 51 architecture. The USB function
integrates the USB transceiver, serial bus interface engine (SIE), function interface unit (FIU) and
transmit/receive FIFOs. The USB function also supports full-speed/low-speed data rates, suspend/resume
modes, isochronous/non-isochronous transfers, and is fully compliant with the USB rev 1.0 specification.
s
Complete Universal Serial Bus
Specification 1.0 Compatibility
-- Supports Isochronous and
Non-isochronous Data
-- Bidirectional Half-duplex Link
s
On-chip USB Transceiver
s
Serial Bus Interface Engine (SIE)
-- Packet Decoding/Generation
-- CRC Generation and Checking
-- NRZI Encoding/Decoding and
Bit-stuffing
s
USB Reset Interrupt
s
Four Transmit FIFOs
-- Three 16-byte FIFOs
-- One Configurable FIFO (up to
1 Kbyte)
s
Four Receive FIFOs
-- Three 16-byte FIFOs
-- One Configurable FIFO (up to
1 Kbyte)
s
Automatic Transmit/Receive FIFO
Management
s
Suspend/Resume Operation
s
Three New USB Interrupt Vectors
-- USB Function Interrupt
-- Start of Frame
-- Suspend/Resume
s
Phase-locked Loop
-- 12 Mbps or 1.5 Mbps Data Rate
s
Low Clock Mode
s
User-selectable Configurations
-- External Wait State
-- Address Range
-- Page Mode
s
Real-time Wait Function
s
256-Kbyte External Code/Data Memory
Space
s
On-chip ROM Options
-- 0, 8, or 16 Kbytes
s
1 Kbyte On-chip Data RAM
s
Four Input/Output Ports
-- 1 Open-drain port
-- 3 Quasi-bidirectional Ports
s
Programmable Counter Array (PCA)
-- 5 Capture/Compare Modules
s
Serial I/O Port (UART)
s
Hardware Watchdog Timer
s
Three Flexible 16-bit Timer/Counters
s
Power-saving Idle and Powerdown
Modes
s
Register-based MCS
251 Architecture
-- 40-byte Register File
-- Registers Accessible as Bytes,
Words, or Doublewords
s
Code Compatible with MCS 51 and MCS
251 Microcontrollers
s
6 or 12 MHz Crystal Operation
Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or oth-
erwise, to any intellectual property rights is granted by this document. Except as provided in Intel's Terms and Conditions of
Sale for such products, Intel assumes no liability whatsoever, and Intel disclaims any express or implied warranty, relating to
sale and/or use of Intel products including liability or warranties relating to fitness for a particular purpose, merchantability, or
infringement of any patent, copyright or other intellectual property right. Intel products are not intended for use in medical, life
saving, or life sustaining applications.
Intel retains the right to make changes to specifications and product descriptions at any time, without notice.
The product may contain design defects or errors known as errata. Current characterized errata are available on request.
*Third-party brands and names are the property of their respective owners.
Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.
Copies of documents which have an ordering number and are referenced in this document, or other Intel literature, may be
obtained from:
Intel Corporation
Literature Sales
P.O. Box 7641
Mt. Prospect, IL 60056-7641
or call 1-800-548-4725
COPYRIGHT INTEL CORPORATION, 1997
iii
CONTENTS
1.0
Nomenclature Overview ...................................................................................................... 3
2.0
Pinout .................................................................................................................................. 4
3.0
Signals ................................................................................................................................ 7
4.0
Address Map ..................................................................................................................... 10
5.0
Electrical Characteristics ................................................................................................... 11
5.1
Operating Frequencies ................................................................................................. 12
5.2
DC Characteristics........................................................................................................ 13
5.3
Definition of AC Symbols.............................................................................................. 15
5.4
AC Characteristics........................................................................................................ 16
5.4.1
System Bus AC Characteristics ............................................................................ 16
5.4.2
System Bus Timing Diagrams, Nonpage Mode .................................................... 18
5.4.3
System Bus Timing Diagrams, Page Mode ........................................................... 20
5.4.4
Definition of Real-time Wait Symbols .................................................................... 22
5.4.5
Real-time Wait Function AC Characteristics ......................................................... 22
5.4.6
Real-Time Wait Function Timing Diagrams ........................................................... 23
5.5
AC Characteristics -- Serial Port, Synchronous Mode 0 ............................................. 27
5.6
External Clock Drive ..................................................................................................... 28
5.7
Testing Waveforms ...................................................................................................... 29
6.0
Thermal Characteristics .................................................................................................... 30
7.0
Product Reference ............................................................................................................ 30
7.1
External Bus Timing and Peripheral Timing Affected by PLLSEL2:0 Selection ........... 30
7.2
Low Clock Mode Frequency ......................................................................................... 30
7.3
Setting FFRC Bit Clears Only the Oldest Packet in the FIFO ...................................... 30
7.4
Series Resistor Requirement for Impedance Matching ................................................ 30
7.5
Pullup Requirement for Full Speed Device and Low Speed Device............................. 30
7.6
Powerdown Mode Cannot Be Invoked Before USB Suspend ...................................... 30
8.0
Specification Supplement for 8
x930Ax3 and 8x930Ax4.................................................... 31
8.1
Six Endpoint Pairs Functionality ................................................................................... 31
8.2
DC Characteristics........................................................................................................ 31
8.3
Extended Data Float (EDF) AC Timing Feature ........................................................... 31
9.0
Device Errata .................................................................................................................... 34
10.0 Datasheet Revision History ............................................................................................... 34
8x930Ax UNIVERSAL SERIAL BUS MICROCONTROLLER
iv
Figures
1.
8
x930Ax Internal Block Diagram ..........................................................................................1
2.
USB Module Block Diagram.................................................................................................2
3.
Product Nomenclature .........................................................................................................3
4.
8
x930Ax 68-pin PLCC Package...........................................................................................4
5.
Clock Circuit ....................................................................................................................... 12
6.
8
x930Ax Code Fetch, Nonpage Mode ............................................................................... 18
7.
8
x930Ax Data Read, Nonpage Mode ................................................................................ 19
8.
8
x930Ax Data Write, Nonpage Mode................................................................................. 19
9.
8
x930Ax Code Fetch, Page Mode ..................................................................................... 20
10.
8
x930Ax Data Read, Page Mode....................................................................................... 21
11.
8
x930Ax Data write, Page Mode........................................................................................ 21
12.
External Code Fetch/Data Read (Nonpage Mode, Real-time Wait State) ......................... 23
13.
External Data Write (Nonpage Mode, Real-time Wait State) ............................................. 24
14.
External Data Read (Page Mode, Real-time Wait State) ................................................... 25
15.
External Data Write (Page Mode, Real-time Wait State) ................................................... 26
16.
Serial Port Waveform -- Synchronous Mode 0.................................................................. 27
17.
External Clock Drive Waveforms........................................................................................ 28
18.
AC Testing Input, Output Waveforms................................................................................. 29
19.
Float Waveforms ................................................................................................................ 29
Tables
1.
Description of Product Nomenclature...................................................................................3
2.
Proliferation Options.............................................................................................................3
3.
68-pin PLCC Pin Assignment...............................................................................................5
4.
68-pin PLCC Signal Assignments Arranged by Functional Category ..................................6
5.
Signal Descriptions ..............................................................................................................7
6.
Memory Signal Selections (RD1:0) .................................................................................... 10
7.
8
x930Ax Address Map ....................................................................................................... 10
8.
Frequency Selection and Operating Frequency................................................................. 12
9.
DC Characteristics at Operating Conditions....................................................................... 13
10.
AC Timing Symbol Definitions............................................................................................ 15
11.
AC Characteristics at Operating Conditions....................................................................... 16
12.
Real-time Wait Timing Symbol Definitions ......................................................................... 22
13.
Real-time Wait AC Timing Specifications........................................................................... 22
14.
Serial Port Timing -- Synchronous Mode 0 ....................................................................... 27
15.
External Clock Drive........................................................................................................... 28
16.
Thermal Characteristics ..................................................................................................... 30
17.
SIx Endpoint Pair Feature .................................................................................................. 31
18.
Effect of "EDF#" on Wait States ......................................................................................... 31
19.
AC Characteristics for 8x930Ax3 and 8x930Ax4 in Compatibility Mode ............................ 32
20.
8
x930Ax3 and 8x930Ax4 Default and Extended Data Float Timings................................. 32
21.
8
x930Ax3 and 8x930Ax4 Real-time Wait State AC Timing Specifications ........................ 33
ADVANCE INFORMATION
1
8x930Ax UNIVERSAL SERIAL BUS (USB) MICROCONTROLLER
Figure 1. 8
x
930A
x
Internal Block Diagram
A4340-01
SRC2 (8)
Code Address (24)
Code Bus (16)
RAM
ROM
Watchdog
Timer
Timer/
Counters
PCA
Serial I/O
Port 2
Drivers
P2.7:0
Port 0
Drivers
P0.7:0
Port 3
Drivers
P3.7:0
Port 1
Drivers
P1.7:0
Data Address (24)
Data Bus (8)
Memory Address (16)
System Bus and I/O Ports
I/O Ports and
Peripheral Signals
SRC1 (8)
IB Bus (8)
Peripheral
Interface
Interrupt
Handler
Clock
&
Reset
Bus Interface
Instruction Sequencer
DST (16)
ALU
Data
Memory
Interface
Memory Data (16)
Register
File
USB
USB Ports
Microcontroller Core
For details, see the USB module block diagram.