B-18
01/99
2N5020, 2N5021
P-Channel Silicon Junction Field-Effect Transistor
Analog Switches
Absolute maximum ratings at T
A
= 25C
Reverse Gate Source & Reverse Gate Drain Voltage
50 V
Continuous Forward Gate Current
50 mA
Continuous Device Power Dissipation
500 mW
Power Derating
4 mW/C
Storage Temperature Range
65C to + 200C
TO18 Package
Dimensions in Inches (mm)
Pin Configuration
1 Source 1, 2 Gate & Case, 3 Drain
Surface Mount
SMP5020, SMP5021
At 25C free air temperature:
2N5020
2N5021
Process PJ32
Static Electrical Characteristics
Min
Max
Min
Max
Unit
Test Conditions
Gate Source Breakdown Voltage
V
(BR)GDO
25
25
V
I
G
= 1A, V
DS
= V
Gate Reverse Current
I
GSS
1
1
nA
V
GS
= 15V, V
DS
= V
Gate Source Cutoff Voltage
V
GS(OFF)
0.3
1.5
0.5
2.5
V
V
DS
= 15V, I
D
= 1 nA
Drain Saturation Current (Pulsed)
I
DSS
0.3 1.2
1
3.5
mA
V
DS
= 15V, V
GS
= V
Dynamic Electrical Characteristics
Common Source
g
fs
1
3.5
1.5
6
mS
V
DS
= 15V, V
GS
= V
Forward Transconductance
Common Source Output Conductance
g
os
20
20
S
V
DS
= 15V, V
GS
= V
Common Source Input Capacitance
C
iss
25
25
pF
V
DS
= 15V, V
GS
= V
f = 1 MHz
Common Source
C
rss
7
7
pF
V
DS
= 15V, V
GS
= V
f = 1 MHz
Reverse Transfer Capacitance
1000 N. Shiloh Road, Garland, TX 75042
(972) 487-1287
FAX
(972) 276-3375
www.interfet.com
Databook.fxp 1/13/99 2:09 PM Page B-18
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