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Электронный компонент: 82C284883

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1
March 1997
82C284/883
Clock Generator and
Ready Interface for 80C286 Processors
Features
This Circuit is Processed in Accordance to MIL-STD-
883 and is Fully Conformant Under the Provisions of
Paragraph 1.2.1.
Generates System Clock for 80C286 Processors
Generates System Reset Output from Schmitt Trigger
Input
- Improved Hysteresis
Uses Crystal or External Signal for Frequency Source
- Dynamically Switchable Between Two Input
Frequencies
Provides Local READY and MULTIBUSTM READY
Synchronization
Static CMOS Technology
Single +5V Power Supply
Available in 18 Lead CERDIP Package
Pinout
82C284/883
(CERDIP)
TOP VIEW
Description
The Intersil 82C284/883 is a clock generator/driver which
provides clock signals for 80C286 processors and support
components. It also contains logic to supply READY to the
CPU from either asynchronous or synchronous sources and
synchronous RESET from an asynchronous input with hys-
teresis.
Functional Diagram
10
11
12
13
14
15
16
17
18
9
8
7
6
5
4
3
2
1
VCC
S1
S0
NC
PCLK
RESET
RES
ARDYEN
CLK
ARDY
SRDY
SRDYEN
READY
EFI
F/C
X2
X1
GND
Ordering Information
PART NUMBER
TEMP. RANGE
PACKAGE
PKG. NO.
MD82C284-12/883
-55
o
C to +125
o
C CERDIP
F18.3
RESET
SYNCHRONIZER
RES
X1
X2
EFI
F/C
ARDYEN
ARDY
SRDYEN
SRDY
S1
S0
RESET
CLK
READY
PCLK
XTAL
OSC
MUX
SYNCHRONIZER
READY LOGIC
PCLK GENERATOR
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2003. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
FN2968.1
2
Absolute Maximum Ratings
Thermal Information
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +8.0V
Input, Output or I/O Voltage Applied. . . . . GND -0.1V to VCC +1.0V
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 2
Thermal Resistance
JA
(
o
C/W)
JC
(
o
C/W)
CERDIP Package . . . . . . . . . . . . . .
80
20
Gate Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200 Gates
Storage Temperature Range . . . . . . . . . . . . . . . . .-65
o
C to +150
o
C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175
o
C
Lead Temperature (Soldering 10s) . . . . . . . . . . . . . . . . . . . . +300
o
C
CAUTION: Stresses above those listed in the "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and opera-
tion of the device at these or any other conditions above those indicated in the operation section of this specification is not implied.
Operating Conditions
Operating Temperature Range. . . . . . . . . . . . . . . . -55
o
C to +125
o
C
Operating Supply Voltage. . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V
EFI Rise Time (From 0.8V to 3.2V). . . . . . . . . . . . . . . . . . 8ns (Max)
EFI Fall Time (From 3.2V to 0.8V) . . . . . . . . . . . . . . . . . . 8ns (Max)
TABLE 1. 82C284/883 D.C. ELECTRICAL PERFORMANCE SPECIFICATIONS
Device Guaranteed and 100% Tested.
PARAMETER
SYMBOL
CONDITIONS
GROUP A
SUBGROUPS
TEMPERATURE
MIN
MAX
UNITS
Input LOW Voltage
VIL
VCC = 4.5V
1, 2, 3
-55
o
C
T
A
+125
o
C
-
0.8
V
Input HIGH Voltage
VIH
VCC = 5.5V
1, 2, 3
-55
o
C
T
A
+125
o
C
2.2
-
V
EFI, F/C Input High Voltage
VIHC
VCC = 5.5V
1, 2, 3
-55
o
C
T
A
+125
o
C
3.2
-
V
RES HIGH Voltage
VIHR
VCC = 5.5V
1, 2, 3
-55
o
C
T
A
+125
o
C VCC -0.8
-
V
RES Input Hysteresis
VHYS
VCC = 5.5V
1, 2, 3
-55
o
C
T
A
+125
o
C
0.5
-
V
RESET, PCLK Output LOW
Voltage
VOL
IOL = 5mA,
VCC = 4.5V, Note 2
1, 2, 3
-55
o
C
T
A
+125
o
C
-
0.4
V
RESET, PCLK Output
Voltage
VOH
IOH = -1mA,
VCC = 4.5V, Note 2
1, 2, 3
-55
o
C
T
A
+125
o
C VCC -0.4
-
V
READY Output LOW
Voltage
VOLR
IOH = 10mA,
VCC = 4.55V, Note 2
1, 2, 3
-55
o
C
T
A
+125
o
C
-
0.4
V
CLK Output LOW Voltage
VOLC
IOL = 5mA,
VCC = 4.5V, Note 2
1, 2, 3
-55
o
C
T
A
+125
o
C
-
0.4
V
CLK Output HIGH Voltage
VOHC
IOH = -5mA,
VCC = 4.5V, Note 2
1, 2, 3
-55
o
C
T
A
+125
o
C VCC -0.4
-
V
Input Leakage Current
II
VIN = GND or VCC,
VCC = 5.5V
1, 2, 3
-55
o
C
T
A
+125
o
C
-10
10
A
Active Power Supply
Current
ICCOP
82C284-10/883, Note 1
1, 2, 3
-55
o
C
T
A
+125
o
C
-
48
mA
82C284-12/883, Note 1
1, 2, 3
-55
o
C
T
A
+125
o
C
-
60
mA
NOTES:
1. ICCOP measured at 10MHz for the 82C284-10/883 and at 12.5MHz for the 82C284-12/883. VIN = GND or VCC, VCC = 5.5V, outputs
unloaded.
2. Interchanging of force and sense conditions is permitted.
TABLE 2. 82C284/883 A.C. ELECTRICAL PERFORMANCE SPECIFICATIONS
Device Guaranteed and 100% Tested. A.C. timings are referenced to 0.8V and 2.0V points of the signals as illustrated in datasheet wave-
forms, unless otherwise specified.
PARAMETER
SYMBOL
(NOTE 1)
CONDITIONS
GROUP A
SUBGROUP
TEMPERATURE
10MHz
12MHz
UNITS
MIN
MAX
MIN
MAX
EFI LOW Time
t1
At VCC/2, Note 8
9, 10, 11
-55
o
C
T
A
+125
o
C
20
-
16
-
ns
EFI HIGH Time
t2
At VCC/2, Note 8
9, 10, 11
-55
o
C
T
A
+125
o
C
20
-
20
-
ns
82C284/883
3
Status Setup Time
for Status Going
Active
t5A
9, 10, 11
-55
o
C
T
A
+125
o
C
20
-
18
-
ns
Status Setup Time
for Going Inactive
t5B
9, 10, 11
-55
o
C
T
A
+125
o
C
20
-
16
-
ns
Status Hold Time
t6
9, 10, 11
-55
o
C
T
A
+125
o
C
1
-
1
-
ns
F/C Setup Time
t7
9, 10, 11
-55
o
C
T
A
+125
o
C
15
-
15
-
ns
F/C Hold Time
t8
9, 10, 11
-55
o
C
T
A
+125
o
C
15
-
15
-
ns
SRDY or SRDYEN
Setup Time
t9
9, 10, 11
-55
o
C
T
A
+125
o
C
15
-
15
-
ns
SRDY or SRDYEN
Hold Time
t10
9, 10, 11
-55
o
C
T
A
+125
o
C
2
-
2
-
ns
ARDY or ARDYEN
Setup Time
t11
Note 3
9, 10, 11
-55
o
C
T
A
+125
o
C
5
-
5
-
ns
ARDY or ARDYEN
Hold Time
t12
Note 3
9, 10, 11
-55
o
C
T
A
+125
o
C
30
-
25
-
ns
RES Setup Time
t13
Notes 3, 7
9, 10, 11
-55
o
C
T
A
+125
o
C
20
-
18
-
ns
RES Hold Time
t14
Notes 3, 7
9, 10, 11
-55
o
C
T
A
+125
o
C
10
-
8
-
ns
CLK Period
t16
9, 10, 11
-55
o
C
T
A
+125
o
C
50
-
40
-
ns
CLK LOW Period
t17
Notes 2, 6
9, 10, 11
-55
o
C
T
A
+125
o
C
12
-
11
-
ns
CLK HIGH Time
t18
Notes 2, 6
9, 10, 11
-55
o
C
T
A
+125
o
C
16
-
13
-
ns
READY Inactive
Delay
t21
At 0.8V, Note 4,
Test Condition 2
9, 10, 11
-55
o
C
T
A
+125
o
C
5
-
5
-
ns
READY Active De-
lay
t22
At 0.8V, Note 4
9, 10, 11
-55
o
C
T
A
+125
o
C
-
24
-
18
ns
PCLK Delay
t23
CL = 75pF,
Test Condition 1
9, 10, 11
-55
o
C
T
A
+125
o
C
-
20
-
16
ns
RESET Delay
t24
CL = 75pF,
Test Condition 3
9, 10, 11
-55
o
C
T
A
+125
o
C
-
27
-
26
ns
PCLK LOW Time
t25
CL = 75pF, Note 5
9, 10, 11
-55
o
C
T
A
+125
o
C
t16-
10
-
t16-
10
-
ns
PCLK HIGH Time
t26
CL = 75pF, Note 5
9, 10, 11
-55
o
C
T
A
+125
o
C
t16-
10
-
t16-
10
-
ns
TABLE 2. 82C284/883 A.C. ELECTRICAL PERFORMANCE SPECIFICATIONS (Continued)
Device Guaranteed and 100% Tested. A.C. timings are referenced to 0.8V and 2.0V points of the signals as illustrated in datasheet wave-
forms, unless otherwise specified. (Continued)
PARAMETER
SYMBOL
(NOTE 1)
CONDITIONS
GROUP A
SUBGROUP
TEMPERATURE
10MHz
12MHz
UNITS
MIN
MAX
MIN
MAX
82C284/883
4
NOTES:
1. VCC = 4.5V and 5.5V unless otherwise specified. CLK loading: CL = 100pF.
2. With the internal crystal oscillator using recommended crystal and capacitive loading; or with the EFI input meeting specifications t1 and t2.
The recommended crystal loading for CLK frequencies of 8MHz to 20MHz are 25pF from pin X1 to GND, and 15pF from pin X2 to GND; for
CLK frequencies from 20MHz to 25MHz the recommended loading is 15pF from pin X1 to GND, and 15pF from X2 to GND. These recom-
mended values are
5pF and include all stray capacitance. Decouple VCC and GND as close to the 80C284/883 as possible.
3. This is an asychronous input. This specification is given for testing purposes only, to assure recognition at a specific CLK edge.
4. The pull-up resistor value for the READY pin is 620
with the rated 150pF load.
5. t16 refers to any allowable CLK period.
6. When using a crystal with the recommended capacitive loading, CLK output HIGH and LOW times are guaranteed to meet 80C286 re-
quirements.
7. Measured from 1.0V on the CLK to 0.8V on the RES waveform for RES active, and to 4.2V on the RES waveform for RES inactive.
8. Input test waveform characteristics: VIL= 0.0V, VIH = 4.5V.
TABLE 2. 82C284/883 A.C. ELECTRICAL PERFORMANCE SPECIFICATIONS (Continued)
Device Guaranteed and 100% Tested. A.C. timings are referenced to 0.8V and 2.0V points of the signals as illustrated in datasheet wave-
forms, unless otherwise specified. (Continued)
PARAMETER
SYMBOL
(NOTE 1)
CONDITIONS
GROUP A
SUBGROUP
TEMPERATURE
10MHz
12MHz
UNITS
MIN
MAX
MIN
MAX
TABLE 3. 82C284/883 ELECTRICAL PERFORMANCE SPECIFICATIONS
PARAMETER
SYMBOL
CONDITIONS
NOTES
TEMPERATURE
10MHz
12MHz
UNITS
MIN
MAX
MIN
MAX
Input Capacitance
CIN
FREQ = 1MHz, All
measurements are
referenced to de-
vice GND
1
T
A
= +25
o
C
-
10
-
10
pF
EFI HIGH to CLK
LOW Delay
t15A
1, 2
-55
o
C
T
A
+125
o
C
-
30
-
25
ns
EFI LOW to CLK
HIGH Delay
t15B
1, 3
-55
o
C
T
A
+125
o
C
-
35
-
30
ns
CLK Rise Time
t19
1.0V to 3.6V,
CL = 100pF
1
-55
o
C
T
A
+125
o
C
-
8
-
8
ns
CLK Fall Time
t20
3.6V to 1.0V,
CL = 100pF
1
-55
o
C
T
A
+125
o
C
-
8
-
8
ns
X1 HIGH to CLK
t27
1, 4
-55
o
C
T
A
+125
o
C
-
35
-
30
ns
NOTES:
1. The parameters listed in Table 3 are controlled via design or process parameters and are not directly tested. These parameters are char-
acterized upon initial design and after major process and/or design changes.
2. Measured from 3.2V on the EFI waveform to 1.0V on the CLK.
3. Measured from 0.8V on the EFI waveform to 3.6V on the CLK.
4. Measured from 3.6V on the X1 input to 3.6V on the CLK.
TABLE 4. APPLICABLE SUBGROUPS
CONFORMANCE GROUPS
METHOD
SUBGROUPS
Initial Test
100%/5004
-
Interim Test
100%/5004
1, 7, 9
82C284/883
5
A.C. Test Conditions
A.C. Specifications
PDA
100%
1
Final Test
100%
2, 3, 8A, 8B, 10, 11
Group A
-
1, 2, 3, 7, 8A, 8B, 9, 10, 11
Groups C & D
Samples/5005
1, 7, 9
TEST CONDITION
RL
CL
1
750
75pF
2
620
150pF
3
75pF
TABLE 4. APPLICABLE SUBGROUPS
CONFORMANCE GROUPS
METHOD
SUBGROUPS
VCC
RL
CL
DEVICE
OUTPUT
3.2V
3.8V
0.4V
0.8V
3.6V
1.0V
3.6V
1.0V
0.4V
3.8V
0.4V
VCC - 0.4V
0.4V
2.6V
0.4V
VCC - 0.4V
t
DELAY
(MAX)
t
SETUP
3.2V
0.8V
3.2V
0.8V
VCC - 0.8V
0.8V
2.0V
0.8V
2.0V
0.8V
t
DELAY
(MIN)
t
DELAY
(MAX)
EFI INPUT
CLK
F/C
RES
OTHER
DEVICE
t
HOLD
0.8V
2.0V
0.8V
OUTPUT
DEVICE
INPUT
INPUT
INPUT
OUTPUT
FIGURE 1. A.C. DRIVE, SETUP, HOLD AND DELAY TIME MEASUREMENT POINTS
82C284/883