1
File Number
611.6
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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Copyright
Intersil Corporation 1999
CA3102
Dual High Frequency Differential Amplifier
For Low Power Applications Up to
500MHz
The CA3102 consists of two independent differential
amplifiers with associated constant current transistors on a
common monolithic substrate. The six transistors which
comprise the amplifiers are general purpose devices which
exhibit low 1/f noise and a value of f
T
in excess of 1GHz.
These features make the CA3102 useful from DC to
500MHz. Bias and load resistors have been omitted to
provide maximum application flexibility.
The monolithic construction of the CA3102 provides close
electrical and thermal matching of the amplifiers. This
feature makes this device particularly useful in dual channel
applications where matched performance of the two
channels is required.
The CA3102 has a separate substrate connection for greater
design flexibility.
Features
Power Gain 23dB (Typ). . . . . . . . . . . . . . . . . . . . . 200MHz
Noise Figure 4.6dB (Typ) . . . . . . . . . . . . . . . . . . . 200MHz
Two Differential Amplifiers on a Common Substrate
Independently Accessible Inputs and Outputs
Full Military Temperature Range . . . . . . . -55
o
C to 125
o
C
Applications
VHF Amplifiers
VHF Mixers
Multifunction Combinations - RF/Mixer/Oscillator;
Converter/IF
IF Amplifiers (Differential and/or Cascode)
Product Detectors
Doubly Balanced Modulators and Demodulators
Balanced Quadrature Detectors
Cascade Limiters
Synchronous Detectors
Balanced Mixers
Synthesizers
Balanced (Push-Pull) Cascode Amplifiers
Sense Amplifiers
Pinout
CA3102
(PDIP, SOIC)
TOP VIEW
Ordering Information
PART NUMBER
(BRAND)
TEMP.
RANGE (
o
C)
PACKAGE
PKG.
NO.
CA3102E
-55 to 125
14 Ld PDIP
E14.3
CA3102M
(3102)
-55 to 125
14 Ld SOIC
M14.15
SUBSTRATE
SUBSTRATE
1
2
3
4
5
6
7
14
13
12
11
10
9
8
Data Sheet
November 1999
2
Absolute Maximum Ratings
Thermal Information
Collector-to-Emitter Voltage, V
CEO
. . . . . . . . . . . . . . . . . . . . . . 15V
Collector-to-Base Voltage, V
CBO
. . . . . . . . . . . . . . . . . . . . . . . . 20V
Collector-to-Substrate Voltage, V
CIO
(Note 1) . . . . . . . . . . . . . . 20V
Emitter-to-Base Voltage, V
EBO
. . . . . . . . . . . . . . . . . . . . . . . . . . 5V
Collector Current, I
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50mA
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -55
o
C to 125
o
C
Thermal Resistance (Typical, Note 2)
JA
(
o
C/W)
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
110
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
205
Maximum Power Dissipation (Any One Transistor) . . . . . . . 300mW
Maximum Junction Temperature (Plastic Package) . . . . . . . 150
o
C
Maximum Storage Temperature Range . . . . . . . . . . -65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300
o
C
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. The collector of each transistor of the CA3102 is isolated from the substrate by an integral diode. The substrate (Terminal 9) must be connected
to the most negative point in the external circuit to maintain isolation between transistors and to provide for normal transistor action.
2.
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
T
A
= 25
o
C
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
DC CHARACTERISTICS FOR EACH DIFFERENTIAL AMPLIFIER
Input Offset Voltage (Figures 1, 4)
V
IO
-
0.25
5.0
mV
Input Offset Current (Figure 1)
I
IO
I
3
= I
9
= 2mA
-
0.3
3.0
A
Input Bias Current (Figures 1, 5)
I
B
-
13.5
33
A
Temperature Coefficient
Magnitude of Input Offset Voltage
-
1.1
-
V/
o
C
DC CHARACTERISTICS FOR EACH TRANSISTOR
DC Forward Base-to-Emitter Voltage
(Figure 6)
VBE
V
CE
= 6V, I
C
= 1mA
674
774
874
mV
Temperature Coefficient of
Base-to-Emitter Voltage
(Figure 6)
V
CE
= 6V, I
C
= 1mA
-
-0.9
-
mV/
o
C
Collector Cutoff Current (Figure 7)
I
CBO
V
CB
= 10V, I
E
= 0
-
0.0013
100
nA
Collector-to-Emitter Breakdown Voltage
V
(BR)CEO
I
C
= 1mA, I
B
= 0
15
24
-
V
Collector-to-Base Breakdown Voltage
V
(BR)CBO
I
C
= 10
A, I
E
= 0
20
60
-
V
Collector-to-Substrate Breakdown Voltage
V
(BR)CIO
I
C
= 10
A, I
B
= I
E
= 0
20
60
-
V
Emitter-to-Base Breakdown Voltage
V
(BR)EBO
I
E
= 10
A, I
C
= 0
5
7
-
V
DYNAMIC CHARACTERISTICS FOR EACH DIFFERENTIAL AMPLIFIER
1/f Noise Figure (For Single Transistor)
(Figure 12)
NF
f = 100kHz, R
S
= 500
,
I
C
= 1mA
-
1.5
-
dB
Gain Bandwidth Product (For Single
Transistor) (Figure 11)
f
T
V
CE
= 6V, I
C
= 5mA
-
1.35
-
GHz
Collector-Base Capacitance (Figure 8)
C
CB
I
C
= 0,
V
CB
= 5V
Note 3
-
0.28
-
pF
Note 4
-
0.15
-
pF
Collector-Substrate
Capacitance (Figure 8)
C
CI
I
C
= 0, V
CI
= 5V
-
1.65
-
pF
Common Mode Rejection Ratio
CMRR
I
3
= I
9
= 2mA
-
100
-
dB
AGC Range, One Stage (Figure 2)
AGC
Bias Voltage = -6V
-
75
-
dB
Voltage Gain, Single-Ended Output
(Figures 2, 9, 10)
A
Bias Voltage = -4.2V,
f = 10MHz
18
22
-
dB
V
IO
T
----------------
V
BE
T
---------------
CA3102
3
Insertion Power Gain (Figure 3)
G
P
V
CC
= 12V, for
Cascode
Configuration
I
3
= I
9
= 2mA. For
Diff. Amp.
Configuration
I
3
= I
9
= 4mA (Each
Collector I
C
2mA)
f = 200MHz
Cascode
-
23
-
dB
Noise Figure (Figure 3)
NF
Cascode
-
4.6
-
dB
Input Admittance
Y
11
Cascode (Figures
14, 16, 18)
-
1.5 + j2.45
-
mS
Diff. Amp. (Figures
15, 17, 19)
-
0.878 + j1.3
-
mS
Reverse Transfer Admittance
Y
12
Cascode
-
0.0 - j0.008
-
mS
Diff. Amp.
-
0.0 - j0.013
-
mS
Forward Transfer
Admittance
Y
21
Cascode (Figures
26, 28, 30)
-
17.9 - j30.7
-
mS
Diff. Amp. (Figures
27, 29, 31)
-
-10.5 + j13
-
mS
Output Admittance
Y
22
Cascode (Figures
20, 22, 24)
-
-0.503 - j15
-
mS
Diff. Amp. (Figures
21, 23, 25)
-
0.071 + j0.62
-
mS
NOTES:
3. Terminals 1 and 14 or 7 and 8.
4. Terminals 13 and 4 or 6 and 11.
Electrical Specifications
T
A
= 25
o
C (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Schematic Diagram
CA3102E, CA3102M
1
14
13
4
2
Q
2
Q
1
3
Q
3
8
11
Q
6
Q
5
9
Q
4
7
6
10
12
5
SUBSTRATE
CA3102
4
Test Circuits
FIGURE 1. DC CHARACTERISTICS TEST CIRCUIT FOR CA3102
FIGURE 2. AGC RANGE AND VOLTAGE GAIN TEST CIRCUIT
FOR CA3102
FIGURE 3. 200MHz CASCODE POWER GAIN AND NOISE FIGURE TEST CIRCUIT
M
M
M
I
3
or I
9
V
X
V- (-6V)
V+ (+6V)
1k
1k
S
2
S
1
S
1
S
2
1k
+1V
-1V
V
O
4
-6V
+6V
100
(11)
13
(6)
14
(7)
V
OUT
1k
Q
1
(Q
5
)
Q
2
(Q
6
)
1
10
F
V
IN
100
(8)
2
BIAS
VOLTAGE
3
500
(10)
(9)
5
12
Q
3
(Q
4
)
Q
1
(Q
5
)
Q
2
(Q
6
)
0.005
F
1(8)
14(7)
SUBSTRATE
5(12)
Q
3
(Q
4
)
3 (9)
2 (10)
4 (11)
13 (6)
C
1
0.001
F
2k
5.6pF
1k
L
1
5
F
INPUT
R
G
= 50
MA
0.001
F
100pF
5k
+12V
100
6V
2+
0.001
F
FERRITE
BEADS
5pF
0.001
F
13k
C
2
100pF
100pF
OUTPUT
R
L
= 50
L
2
0.001
F
0.001
F
2.7pF
10k
1/2 CA3102
NOTES:
5. Numbers in parentheses refer to the other
half of the CA3102.
6. L
1
, L
2
- Approximately
1
/
2
Turn #18 Tinned
Copper Wire, 5/8" Diameter.
7. C
1
, C
2
- 15pF Variable Capacitors
(Hammarlund, MAC-15; or Equivalent).
470pF
CA3102
5
Typical Performance Curves
FIGURE 4. INPUT OFFSET VOLTAGE vs EMITTER CURRENT
FIGURE 5. INPUT BIAS CURRENT vs EMITTER CURRENT
FIGURE 6. BASE-TO-EMITTER VOLTAGE vs COLLECTOR
CURRENT
FIGURE 7. COLLECTOR CUTOFF CURRENT vs TEMPERATURE
FIGURE 8. CAPACITANCE vs DC BIAS VOLTAGE
FIGURE 9. VOLTAGE GAIN vs DC BIAS VOLTAGE
0.5
0.4
0.3
0.2
INPUT OFFSET V
O
L
T
A
GE (mV)
0.1
1
10
EMITTER CURRENT (mA)
T
A
= 25
o
C
100
10
1.0
0.1
INPUT BIAS CURRENT (
A)
0.1
1.0
10
EMITTER CURRENT (mA)
T
A
= -40
o
C
T
A
= 25
o
C
T
A
= 85
o
C
1.0
0.9
0.8
0.7
0.6
0.5
B
ASE-T
O-EMITTER V
O
L
T
A
GE (V)
0.1
1.0
10
COLLECTOR CURRENT (mA)
T
A
= -40
o
C
T
A
= 25
o
C
T
A
= 85
o
C
1000
100
10
1.0
0.1
0.01
COLLECT
OR CUT
OFF CURRENT (pA)
-100
-75
-50
-25
0
25
50
75
100
TEMPERATURE (
C)
V
CB
= 10V
V
CB
= 5V
V
CB
= 15V
3
2
1
0
CAP
A
CIT
ANCE (pF)
0
1
2
3
4
5
6
7
8
9
10 11
12 13
14
BIAS VOLTAGE (V)
T
A
= 25
o
C
C
CI
C
CB
TERMINALS 14 AND 1; 7 AND 8
TERMINALS 13 AND 4; 6 AND 11
BIAS VOLTAGE ON TERMINALS 2 AND 10 (V)
40
30
20
10
0
-10
-20
-30
-40
-50
V
O
L
T
A
GE GAIN (dB)
70
60
50
0
-1
-2
-3
-4
-5
-6
-7
T
A
= 25
o
C
V+ = 6V, V- = -6V
f = 1kHz
CA3102
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