1
FN7331.4
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2002-2005. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.
EL5102, EL5103, EL5202, EL5203, EL5302
400MHz Slew Enhanced VFAs
The EL5x02 and EL5x03 families represent high-speed
VFAs based on a CFA amplifier architecture. This gives the
typical high slew rate benefits of a CFA family along with the
stability and ease of use associated with the VFA type
architecture. With slew rates of 3500V/s this family of
devices enables the use of voltage feedback amplifiers in a
space where the only alternative has been current feedback
amplifiers. This family will also be available in single, dual,
and triple versions, with 200MHz, 400MHz, and 750MHz
versions. These are all available in single, dual, and triple
versions.
Both families operate on single 5V or 5V supplies from
minimum supply current. EL5x02 also features an output
enable function, which can be used to put the output in to a
high-impedance mode. This enables the outputs of multiple
amplifiers to be tied together for use in multiplexing
applications.
Typical applications for these families will include cable
driving, filtering, A-to-D and D-to-A buffering, multiplexing
and summing within video, communications, and
instrumentation designs.
Features
Operates off 3V, 5V, or 5V applications
Power-down to 0A (EL5x02)
-3dB bandwidth = 400MHz
0.1dB bandwidth = 50MHz
Low supply current = 5mA
Slew rate = 3500V/s
Low offset voltage = 5mV max
Output current = 140mA
A
VOL
= 2000
Diff gain/phase = 0.01%/0.01
Pb-Free plus anneal available (RoHS compliant)
Applications
Video amplifiers
PCMCIA applications
A/D drivers
Line drivers
Portable computers
High speed communications
RGB applications
Broadcast equipment
Active filtering
Data Sheet
October 3, 2005
2
FN7331.4
October 3, 2005
Ordering Information
PART NUMBER
PART
MARKING
PACKAGE
TAPE &
REEL
PKG.
DWG. #
EL5102IS
5102IS
8 Ld SO
-
MDP0027
EL5102IS-T7
5102IS
8 Ld SO
7"
MDP0027
EL5102IS-T13
5102IS
8 Ld SO
13"
MDP0027
EL5102ISZ
(See Note)
5102ISZ
8 Ld SO
(Pb-free)
-
MDP0027
EL5102ISZ-T7
(See Note)
5102ISZ
8 Ld SO
(Pb-free)
7"
MDP0027
EL5102ISZ-T13
(See Note)
5102ISZ
8 Ld SO
(Pb-free)
13"
MDP0027
EL5102IW-T7
q
6 Ld SOT-23
7"
(3K pcs)
MDP0038
EL5102IW-T7A
q
6 Ld SOT-23
7"
(250 pcs)
MDP0038
EL5103IC-T7
B
5 Ld SC-70
7"
(3K pcs)
P5.049
EL5103IC-T7A
B
5 Ld SC-70
7"
(250 pcs)
P5.049
EL5103IW-T7
g
5 Ld SOT-23
7"
(3K pcs)
MDP0038
EL5103IW-T7A
g
5 Ld SOT-23
7"
(250 pcs)
MDP0038
EL5202IY
BRAAA
10 Ld MSOP
-
MDP0043
EL5202IY-T7
BRAAA
10 Ld MSOP
7"
MDP0043
EL5202IY-T13
BRAAA
10 Ld MSOP
13"
MDP0043
EL5202IYZ
(See Note)
BAAAD
10 Ld MSOP
(Pb-free)
-
MDP0043
EL5202IYZ-T7
(See Note)
BAAAD
10 Ld MSOP
(Pb-free)
7"
MDP0043
EL5202IYZ-T13
(See Note)
BAAAD
10 Ld MSOP
(Pb-free)
13"
MDP0043
EL5203IS
5203IS
8 Ld SO
-
MDP0027
EL5203IS-T7
5203IS
8 Ld SO
7"
MDP0027
EL5203IS-T13
5203IS
8 Ld SO
13"
MDP0027
EL5203ISZ
(See Note)
5203ISZ
8 Ld SO
(Pb-free)
-
MDP0027
EL5203ISZ-T7
(See Note)
5203ISZ
8 Ld SO
(Pb-free)
7"
MDP0027
EL5203ISZ-T13
(See Note)
5203ISZ
8 Ld SO
(Pb-free)
13"
MDP0027
EL5203IY
BSAAA
8 Ld MSOP
-
MDP0043
EL5203IY-T7
BSAAA
8 Ld MSOP
7"
MDP0043
EL5203IY-T13
BSAAA
8 Ld MSOP
13"
MDP0043
EL5203IYZ
(See Note)
BAAAE
8 Ld MSOP
(Pb-free)
-
MDP0043
EL5203IYZ-T7
(See Note)
BAAAE
8 Ld MSOP
(Pb-free)
7"
MDP0043
EL5203IYZ-T13
(See Note)
BAAAE
8 Ld MSOP
(Pb-free)
13"
MDP0043
EL5302IU
5302IU
16 Ld QSOP
-
MDP0040
EL5302IU-T7
5302IU
16 Ld QSOP
7"
MDP0040
EL5302IU-T13
5302IU
16 Ld QSOP
13"
MDP0040
EL5302IUZ
(See Note)
5302IUZ
16 Ld QSOP
(Pb-free)
-
MDP0040
EL5302IUZ-T7
(See Note)
5302IUZ
16 Ld QSOP
(Pb-free)
7"
MDP0040
EL5302IUZ-T13
(See Note)
5302IUZ
16 Ld QSOP
(Pb-free)
13"
MDP0040
NOTE: Intersil Pb-free products employ special Pb-free material sets;
molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both
SnPb and Pb-free soldering operations. Intersil Pb-free products are
MSL classified at Pb-free peak reflow temperatures that meet or
exceed the Pb-free requirements of IPC/JEDEC J STD-020.
Ordering Information
(Continued)
PART NUMBER
PART
MARKING
PACKAGE
TAPE &
REEL
PKG.
DWG. #
EL5102, EL5103, EL5202, EL5203, EL5302
3
FN7331.4
October 3, 2005
Pinouts
EL5102
(6 LD SOT-23)
TOP VIEW
EL5103
(5 LD SOT-23)
TOP VIEW
EL5102
(8 LD SO)
TOP VIEW
EL5203
(8 LD SO, MSOP)
TOP VIEW
EL5202
(10 LD MSOP)
TOP VIEW
EL5302
(16 LD QSOP)
TOP VIEW
1
2
3
6
4
5
+ -
OUT
VS-
IN+
VS+
CE
IN-
VS+
OUT
IN-
IN+
VS-
1
2
3
5
4
-
+
1
2
3
4
8
7
6
5
-
+
CE
VS+
OUT
NC
NC
IN-
IN+
VS-
1
2
3
4
8
7
6
5
-
+
-
+
OUTA
INA-
INA+
VS-
VS+
OUTB
INB-
INB+
1
2
3
4
10
9
8
7
5
6
OUT
IN-
IN+
VS-
VS+
OUT
IN-
IN+
CE
CE
-
+
7
-
+
1
2
3
4
16
15
14
13
5
6
7
12
11
10
8
9
-
+
-
+
-
+
INA+
CEA
VS-
CEB
INA-
OUTA
VS+
OUTB
INB+
NC
CEC
INC+
INB-
NC
OUTC
INC-
EL5102, EL5103, EL5202, EL5203, EL5302
4
FN7331.4
October 3, 2005
Absolute Maximum Ratings
(T
A
= 25C)
Supply Voltage between V
S
+ and GND . . . . . . . . . . . . . . . . . 13.2V
Maximum Supply Slewrate between V
S
+ and V
S
- . . . . . . . . . 1V/s
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
S
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4V
Maximum Continuous Output Current . . . . . . . . . . . . . . . . . . . 80mA
Maximum Current into I
N
+, I
N
-, CE . . . . . . . . . . . . . . . . . . . . . 5mA
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves
Storage Temperature Range . . . . . . . . . . . . . . . . . .-65C to +150C
Ambient Operating Temperature Range . . . . . . . . . .-40C to +85C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150C
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: T
J
= T
C
= T
A
DC Electrical Specifications
V
S
+
= +5V, V
S
-
= -5V, T
A
= 25C, R
L
= 500
, V
ENABLE
= +5V, unless otherwise specified.
PARAMETER
DESCRIPTION
CONDITIONS
MIN
TYP
MAX
UNIT
V
OS
Offset Voltage
EL5102, EL5103, EL5202, EL5203
1
5
mV
EL5302
2
8
mV
TCV
OS
Offset Voltage Temperature Coefficient
Measured from T
MIN
to T
MAX
10
V/C
IB
Input Bias Current
V
IN
= 0V
-12
2
12
A
I
OS
Input Offset Current
V
IN
= 0V
-8
1
8
A
TCI
OS
Input Bias Current Temperature
Coefficient
Measured from T
MIN
to T
MAX
50
nA/C
PSRR
Power Supply Rejection Ratio
V
S
= 4.75V to 5.25V
-70
-80
dB
CMRR
Common Mode Rejection Ratio
V
CM
= -3V to 3.0V
-60
-80
dB
CMIR
Common Mode Input Range
Guaranteed by CMRR test
-3
3.3
3
V
R
IN
Input Resistance
Common mode
200
400
k
C
IN
Input Capacitance
SO package
1
pF
I
S,ON
Supply Current - Enabled per amplifier
4.6
5.2
5.8
mA
I
S,OFF
Supply Current - Shut-down per amplifier V
S
+
+1
0
+25
A
V
S
-
-25
7
-1
A
AVOL
Open Loop Gain
V
OUT
= 2.5V, R
L
= 1k
to GND
58
66
dB
V
OUT
= 2.5V, R
L
= 150
to GND
60
dB
V
OUT
Output Voltage Swing
R
L
= 1k
to GND
3.5
3.9
V
R
L
= 150
to GND
3.4
3.7
V
I
OUT
Output Current
A
V
= 1, R
L
= 10
to 0V
80
150
mA
V
CE
-ON
CE Pin Voltage for Power-up
(V
S
+)-5
(V
S
+)-3
V
V
CE
-OFF
CE Pin Voltage for Shut-down
(V
S
+)-1
V
S
+
V
I
EN
-ON
Pin Current - Enabled
CE = 0V
-1
0
+1
A
I
EN
-OFF
Pin Current - Disabled
CE = +5V
1
14
25
A
EL5102, EL5103, EL5202, EL5203, EL5302
5
FN7331.4
October 3, 2005
Closed Loop AC Electrical Specifications
V
S
+
= +5V, V
S
-
= -5V, T
A
= 25C, V
ENABLE
= +5V, A
V
= +1, R
F
= 0
, R
L
= 150
to
GND pin, unless otherwise specified. (Note 1)
PARAMETER
DESCRIPTION
CONDITIONS
MIN
TYP
MAX
UNIT
BW
-3dB Bandwidth (V
OUT
= 400mV
P-P
)
A
V
= 1, R
F
= 0
400
MHz
SR
Slew Rate
A
V
= +2, R
L
= 100
, V
OUT
= -3V to +3V
1100
2200
5000
V/s
R
L
= 500
, V
OUT
= -3V to +3V
4000
V/s
t
R
,t
F
Rise Time, Fall Time
0.1V step
2.8
ns
OS
Overshoot
0.1V step
10
%
t
S
0.1% Settling Time
V
S
= 5V, R
L
= 500
, A
V
= 1, V
OUT
= 3V
20
ns
dG
Differential Gain (Note 2)
A
V
= 2, R
F
= 1k
0.01
%
dP
Differential Phase (Note 2)
A
V
= 2, R
F
= 1k
0.01
e
N
Input Noise Voltage
f = 10kHz
12
nV/
Hz
i
N
Input Noise Current
f = 10kHz
11
pA/
Hz
t
DIS
Disable Time (Note 3)
50
ns
t
EN
Enable Time (Note 3)
25
ns
NOTES:
1. All AC tests are performed on a "warmed up" part, except slew rate, which is pulse tested.
2. Standard NTSC signal = 286mV
P-P
, f = 3.58MHz, as V
IN
is swept from 0.6V to 1.314V.R
L
is DC coupled.
3. Disable/Enable time is defined as the time from when the logic signal is applied to the ENABLE pin to when the supply current has reached half
its final value.
EL5102, EL5103, EL5202, EL5203, EL5302
PDF 
ZIP