1
Features
47A, -100V, r
DS(ON)
= 0.053
Total Dose
- Meets Pre-RAD Specifications to 100K RAD (Si)
Single Event
- Safe Operating Area Curve for Single Event Effects
- SEE Immunity for LET of 36MeV/mg/cm
2
with
V
DS
up to 80% of Rated Breakdown and
V
GS
of 10V Off-Bias
Dose Rate
- Typically Survives 3E9 RAD (Si)/s at 80% BV
DSS
- Typically Survives 2E12 if Current Limited to I
DM
Photo Current
- 10.0nA Per-RAD(Si)/s Typically
Neutron
- Maintain Pre-RAD Specifications
for 3E13 Neutrons/cm
2
- Usable to 3E14 Neutrons/cm
2
Formerly available as type TA17766.
Description
The Discrete Products Operation of Intersil has developed a
series
of
Radiation
Hardened
MOSFETs
specifically
designed for commercial and military space applications.
Enhanced Power MOSFET immunity to Single Event Effects
(SEE), Single Event Gate Rupture (SEGR) in particular, is
combined with 100K RADS of total dose hardness to provide
devices which are ideally suited to harsh space environ-
ments. The dose rate and neutron tolerance necessary for
military applications have not been sacrificed.
The Intersil portfolio of SEGR resistant radiation hardened
MOSFETs includes N-Channel and P-Channel devices in a
variety of voltage, current and on-resistance ratings.
Numerous packaging options are also available.
This MOSFET is an enhancement-mode silicon-gate power
field-effect transistor of the Vertical DMOS (VDMOS) struc-
ture. It is specially designed and processed to be radiation
tolerant. The MOSFET is well suited for applications
exposed to radiation environments such as switching regula-
tion, switching converters, motor drives, relay drivers and
drivers for high-power bipolar switching transistors requiring
high speed and low gate drive power. This type can be
operated directly from integrated circuits.
Reliability screening is available as either commercial, TXV
equivalent
of
MIL-S-19500,
or
Space
equivalent
of
MIL-S-19500. Contact Intersil for any desired deviations
from the data sheet.
Symbol
Packaging
SMD-2
Ordering Information
RAD LEVEL
SCREENING LEVEL
PART NUMBER/BRAND
10K
Commercial
FSYC9160D1
10K
TXV
FSYC9160D3
100K
Commercial
FSYC9160R1
100K
TXV
FSYC9160R3
100K
Space
FSYC9160R4
G
D
S
July 1998
FSYC9160D,
FSYC9160R
Radiation Hardened, SEGR Resistant
P-Channel Power MOSFETs
File Number
4552
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
|
Copyright
Intersil Corporation 1999
2
Absolute Maximum Ratings
T
C
= 25
o
C, Unless Otherwise Specified
FSYC9160D, FSYC9160R
UNITS
Drain to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DS
-100
V
Drain to Gate Voltage (R
GS
= 20k
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DGR
-100
V
Continuous Drain Current
T
C
= 25
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
D
47
A
T
C
= 100
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
D
30
A
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I
DM
141
A
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
GS
20
V
Maximum Power Dissipation
T
C
= 25
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
T
208
W
T
C
= 100
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
T
83
W
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.67
W/
o
C
Single Pulsed Avalanche Current, L = 100
H, (See Test Figure). . . . . . . . . . . . . . . . . I
AS
141
A
Continuous Source Current (Body Diode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
S
47
A
Pulsed Source Current (Body Diode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
SM
141
A
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
J
, T
STG
-55 to 150
o
C
Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T
L
(Distance >0.063in (1.6mm) from Case, 10s Max)
300
o
C
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Electrical Specifications
T
C
= 25
o
C, Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Drain to Source Breakdown Voltage
BV
DSS
I
D
= 1mA, V
GS
= 0V
-100
-
-
V
Gate Threshold Voltage
V
GS(TH)
V
GS
= V
DS
,
I
D
= 1mA
T
C
= -55
o
C
-
-
-7.0
V
T
C
= 25
o
C
-2.0
-
-6.0
V
T
C
= 125
o
C
-1.0
-
-
V
Zero Gate Voltage Drain Current
I
DSS
V
DS
= -80V,
V
GS
= 0V
T
C
= 25
o
C
-
-
25
A
T
C
= 125
o
C
-
-
250
A
Gate to Source Leakage Current
I
GSS
V
GS
=
20V
T
C
= 25
o
C
-
-
100
nA
T
C
= 125
o
C
-
-
200
nA
Drain to Source On-State Voltage
V
DS(ON)
V
GS
= -12V, I
D
= 47A
-
-
-2.74
V
Drain to Source On Resistance
r
DS(ON)12
I
D
= 30A,
V
GS
= -12V
T
C
= 25
o
C
-
0.034
0.053
T
C
= 125
o
C
-
-
0.083
Turn-On Delay Time
t
d(ON)
V
DD
= -50V, I
D
= 47A,
R
L
= 1.1
, V
GS
= -12V,
R
GS
= 2.35
-
-
50
ns
Rise Time
t
r
-
-
75
ns
Turn-Off Delay Time
t
d(OFF)
-
-
100
ns
Fall Time
t
f
-
-
50
ns
Total Gate Charge
Q
g(TOT)
V
GS
= 0V to -20V
V
DD
= -50V,
I
D
= 47A
-
-
410
nC
Gate Charge at 12V
Q
g(12)
V
GS
= 0V to -12V
-
220
250
nC
Threshold Gate Charge
Q
g(TH)
V
GS
= 0V to -2V
-
-
17
nC
Gate Charge Source
Q
gs
-
48
66
nC
Gate Charge Drain
Q
gd
-
85
120
nC
Plateau Voltage
V
(PLATEAU)
I
D
= 47A, V
DS
= -15V
-
-7
-
V
Input Capacitance
C
ISS
V
DS
= -25V, V
GS
= 0V,
f = 1MHz
-
5600
-
pF
Output Capacitance
C
OSS
-
1550
-
pF
Reverse Transfer Capacitance
C
RSS
-
560
-
pF
Thermal Resistance Junction to Case
R
JC
-
-
0.6
o
C/W
FSYC9160D, FSYC9160R
3
Source to Drain Diode Specifications
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Forward Voltage
V
SD
I
SD
= 47A
-0.6
-
-1.8
V
Reverse Recovery Time
t
rr
I
SD
= 47A, dI
SD
/dt = 100A/
s
-
-
200
ns
Electrical Specifications up to 100K RAD
T
C
= 25
o
C, Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
MAX
UNITS
Drain to Source Breakdown Volts
(Note 3)
BV
DSS
V
GS
= 0, I
D
= 1mA
-100
-
V
Gate to Source Threshold Volts
(Note 3)
V
GS(TH)
V
GS
= V
DS
, I
D
= 1mA
-2.0
-6.0
V
Gate to Body Leakage
(Notes 2, 3)
I
GSS
V
GS
=
20V, V
DS
= 0V
-
100
nA
Zero Gate Leakage
(Note 3)
I
DSS
V
GS
= 0, V
DS
= -80V
-
25
A
Drain to Source On-State Volts
(Notes 1, 3)
V
DS(ON)
V
GS
= -12V, I
D
= 47A
-
-2.74
V
Drain to Source On Resistance
(Notes 1, 3)
r
DS(ON)12
V
GS
= -12V, I
D
= 30A
-
0.053
NOTES:
1. Pulse test, 300
s Max.
2. Absolute value.
3. Insitu Gamma bias must be sampled for both V
GS
= -12V, V
DS
= 0V and V
GS
= 0V, V
DS
= 80% BV
DSS
.
Single Event Effects (SEB, SEGR)
Note 4
TEST
SYMBOL
ENVIRONMENT (NOTE 5)
APPLIED
V
GS
BIAS
(V)
(NOTE 6)
MAXIMUM
V
DS
BIAS
(V)
ION
SPECIES
TYPICAL LET
(MeV/mg/cm)
TYPICAL
RANGE (
)
Single Event Effects Safe Operating
Area
SEESOA
Ni
26
43
20
-100
Br
37
36
10
-100
Br
37
36
15
-80
Br
37
36
20
-50
NOTES:
4. Testing conducted at Brookhaven National Labs; sponsored by Naval Surface Warfare Center (NSWC), Crane, IN.
5. Fluence = 1E5 ions/cm
2
(typical), T = 25
o
C.
6. Does not exhibit Single Event Burnout (SEB) or Single Event Gate Rupture (SEGR).
Typical Performance Curves
Unless Otherwise Specified
FIGURE 1. SINGLE EVENT EFFECTS SAFE OPERATING AREA
FIGURE 2. DRAIN INDUCTANCE REQUIRED TO LIMIT
GAMMA DOT CURRENT TO I
AS
-120
-100
-80
-60
-40
-20
0
0
10
15
20
25
5
V
DS
(V)
LET = 37MeV/mg/cm
2
, RANGE = 36
FLUENCE = 1E5 IONS/cm
2
(TYPICAL)
LET = 26MeV/mg/cm
2
, RANGE = 43
V
GS
(V)
TEMP = 25
o
C
-300
-100
-10
LIMITING INDUCT
ANCE (HENR
Y)
DRAIN SUPPLY (V)
-1000
ILM = 10A
300A
1E-4
1E-5
1E-6
-30
100A
30A
1E-3
1E-7
FSYC9160D, FSYC9160R
4
FIGURE 3. MAXIMUM CONTINUOUS DRAIN CURRENT vs
TEMPERATURE
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA
FIGURE 5. BASIC GATE CHARGE WAVEFORM
FIGURE 6. NORMALIZED r
DS(ON)
vs JUNCTION TEMPERATURE
FIGURE 7. NORMALIZED MAXIMUM TRANSIENT THERMAL RESPONSE
Typical Performance Curves
Unless Otherwise Specified (Continued)
I
D
, DRAIN (A)
T
C
, CASE TEMPERATURE (
o
C)
150
100
50
0
-50
0
20
40
60
-100
10
1
-1
I
D
,
DRAIN CURRENT (A)
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
-10
100
500
T
C
= 25
o
C
100
s
1ms
10ms
-300
OPERATION IN THIS
AREA MAY BE
LIMITED BY r
DS(ON)
CHARGE
V
G
Q
GS
BASIC GATE CHARGE WAVEFORM
-12V
Q
GD
Q
G
2.5
2.0
1.5
1.0
0.5
0.0
-80
-40
0
40
80
120
160
T
J
, JUNCTION TEMPERATURE (
o
C)
NORMALIZED r
DS(ON)
PULSE DURATION = 250ms, V
GS
= -12V, I
D
= 30A
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
0.001
0.01
0.1
NORMALIZED
t, RECTANGULAR PULSE DURATION (s)
1
THERMAL RESPONSE (Z
JC
)
10
P
DM
t
1
t
2
NOTES:
DUTY FACTOR: D = t
1
/t
2
PEAK T
J
= P
DM
x Z
JC
+ T
C
SINGLE PULSE
10
1
0.05
0.5
0.02
0.1
0.01
0.2
FSYC9160D, FSYC9160R
5
FIGURE 8. UNCLAMPED INDUCTIVE SWITCHING
Test Circuits and Waveforms
FIGURE 9. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 10. UNCLAMPED ENERGY WAVEFORMS
FIGURE 11. RESISTIVE SWITCHING TEST CIRCUIT
FIGURE 12. RESISTIVE SWITCHING WAVEFORMS
Typical Performance Curves
Unless Otherwise Specified (Continued)
300
100
10
1
0.01
0.1
1
t
AV
, TIME IN AVALANCHE (ms)
I
AS
,
A
V
ALANCHE CURRENT (A)
10
STARTING T
J
= 150
o
C
STARTING T
J
= 25
o
C
IF R
0
t
AV
= (L/R) ln [(I
AS
*R) / (1.3 RATED BV
DSS
- V
DD
) + 1]
t
AV
= (L) (I
AS
) / (1.3 RATED BV
DSS
- V
DD
)
IF R = 0
t
P
V
GS
20V
L
+
-
V
DS
V
DD
DUT
VARY t
P
TO OBTAIN
REQUIRED PEAK I
AS
0V
50
50
50V-150V
I
AS
+
-
ELECTRONIC SWITCH OPENS
WHEN I
AS
IS REACHED
CURRENT
TRANSFORMER
V
DD
V
DS
BV
DSS
I
AS
t
AV
t
P
V
DD
R
L
V
DS
DUT
R
GS
0V
V
GS
= -12V
t
d(ON)
t
r
90%
10%
V
DS
90%
10%
t
f
t
d(OFF)
t
OFF
90%
50%
50%
10%
V
GS
t
ON
PULSE WIDTH
FSYC9160D, FSYC9160R
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