ChipFind - документация

Электронный компонент: HFA3724IN96

Скачать:  PDF   ZIP
1
HFA3724
400MHz Quadrature IF
Modulator/Demodulator
The Intersil 2.4GHz PRISMTM chip set is a
highly integrated five-chip solution for RF
modems employing Direct Sequence
Spread Spectrum (DSSS) signaling. The
HFA3724 400MHz Quadrature IF
Modulator/Demodulator is one of the five chips in the PRISMTM
chip set (see the Typical Application Diagram).
The HFA3724 is a highly integrated baseband converter for
quadrature modulation applications. It features all the necessary
blocks for baseband modulation and demodulation of I and Q
signals. It has a two stage integrated limiting IF amplifier with 84db
of gain with a built in Receive Signal Strength Indicator (RSSI).
Baseband antialiasing and shaping filters are integrated in the
design. Four filter bandwidths are programmable via a two bit
digital control interface. In addition, these filters are continuously
tunable over a
20% frequency range via one external resistor. The
modulator channel receives digital I and Q data for processing. To
achieve broadband operation, the Local Oscillator frequency input
is required to be twice the desired frequency of
modulation/demodulation. A selectable buffered divide by 2 LO
output and a stable reference voltage are provided for convenience
of the user. The device is housed in a thin 80 lead TQFP package
well suited for PCMCIA board applications.
Features
Integrates all IF Transmit and Receive Functions
Broad Frequency Range . . . . . . . . . . . 10MHz to 400MHz
I/Q Amplitude and Phase Balance . . . . . . . . . . . 0.2dB, 2
o
5th Order Programmable
Low Pass Filter. . . . . . . . . . . . . . . . . . . 2.2MHz - 17.6MHz
400MHz Limiting IF Gain Strip with RSSI. . . . . . . . . .84dB
Low LO Drive Level . . . . . . . . . . . . . . . . . . . . . . . -15dBm
Fast Transmit-Receive Switching . . . . . . . . . . . . . . . . . 1
s
Power Management/Standby Mode
Single Supply 2.7V to 5.5V Operation
Applications
Systems Targeting IEEE 802.11 Standard
TDD Quadrature-Modulated Communication Systems
Wireless Local Area Networks
PCMCIA Wireless Transceivers
ISM Systems
TDMA Packet Protocol Radios
PCS/Wireless PBX
Wireless Local Loop
Simplified Block Diagram
Ordering Information
PART NUMBER
TEMP. RANGE
(
o
C)
PACKAGE
PKG. NO.
HFA3724IN
-40 to 85
80 Ld TQFP
Q80.14x14
HFA3724IN96
-40 to 85
Tape and Reel
TM
0
o
/90
o
LIM1_IN
MOD_LO_IN
MOD_TX_IF_OUT
LIM1_OUT
LIM2_IN
LPF_RXQ _OUT
RSSI2
MOD_LO_OUT
RSSI1
LIM2_OUT
LPF_TUNE_1
LPF_RX_I
LPF_RX_Q
MOD_RX_I
MOD_RX_Q
LPF_TX_Q
MOD_TX_I
MOD_TX_Q
LPF_TX_I
MOD_IF_IN
2
LPF_SEL0
LPF_SEL1
LPF_TXI_IN
LPF_TXQ_IN
2V
REF
2V REF
LPF_TUNE_0
LPF_RXI_OUT
I
Q
LO_GND
IF
IF
M
U
X
M
U
X
Data Sheet
November 1999
File Number
4067.7
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
|
Copyright
Intersil Corporation 1999
PRISM is a registered trademark of Intersil Corporation. PRISM logo is a trademark of Intersil Corporation.
2
Pinout
80 LEAD TQFP
TOP VIEW
21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
LPF_RX_PE
LPF_TX_PE
LPF_TXQ-
LPF_RXI+
GND
MOD_RXI-
GND
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
LIM2_RSSI
RSSI_RL2
GND
LIM2_OUT+
LIM2_OUT-
LIM2_V
CC
LIM2_PE
GND
GND
GND
LO_GND
MOD_IF_IN-
MOD IF_IN+
MOD_V
CC
MOD_LO_OUT
MOD_V
CC
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
LIM1_RSSI
RSSI_RL1
GND
LIM1_OUT+
LIM1_OUT
-
LIM1_V
CC
LIM1_PE
GND
GND
GND
GND
GND
GND
GND
GND
GND
63 62 61
LIM2_BYP-
LIM2_IN-
LIM2_IN+
LIM2_BYP+
37 38 39 40
MOD_TXI+
MOD_TXI-
MOD_TXQ+
MOD_TXQ-
MOD_LO_IN
MOD_RX_PE
MOD_TX_IF_OUT
MOD_TX_PE
44
43
42
41
17
18
19
20
80
LPF_TXQ+
LPF_TXI-
LPF_TXI+
LPF_RXQ-
LPF_RXQ+
LPF_RXI-
MOD_RXI+
MOD_RXQ+
MOD_RXQ-
LIM1_BYP+
LIM1_IN+
LIM1_IN-
LIM1_BYP-
GND
GND
GND
GND
LPF_V
CC
2V REF
LPF_TXI_IN
LPF_TXQ_IN
LPF_RXI_OUT
LPF_RXQ_OUT
LPF_SEL1
LPF_SEL0
LPF_TUNE1
LPF_TUNE0
GND
LPF_BYP
HFA3724
3
Block Diagram
NOTE: V
CC
, GND and Bypass capacitors not shown.
0
o
/9
0
o
IF
LIM1_IN+
LIM1_IN-
MOD_LO_IN
IF_OUT
LIM1_OUT +
LIM1_OUT -
LIM2_IN-
LIM2_IN+
LPF_RXI_OUT
RSSI_RL1
MOD_LO_OUT
LIM1_RSSI
LIM2_OUT +
LIM2_OUT -
LPF_TUNE1
LPF_RX I +
LPF_RX I -
LPF_RX Q +
LPF_RX Q -
MOD_RX I +
MOD_RX I -
MOD_RX Q +
MOD_RX Q -
MOD_IF_IN +
MOD_IF_IN -
2
LPF_SEL0
LPF_SEL1
LPF_TXI_IN
2V
REF
2V REF
LPF_TUNE0
MOD_TX
LPF_RXQ_OUT
I
LPF_TX_Q -
MOD TX I +
MOD TX Q -
LPF_TX_Q +
MOD TX Q +
MOD TX I -
LPF_TX_I -
LPF_TX_I +
LPF_TXQ_IN
SA
W
V
CC
50
RSSI
UP CONVER
TER
IF LIMITERS
MUX_LPF
DO
WN CONV
LO_GND
LIM1_PE
LIM2_PE
MOD_RX PE
MOD_TX_PE
LPF_TX_PE
LPF_RX PE
LIM2_RSSI
RSSI_RL2
IF
LPF_BYP
1.25V
IN
(2XLO)
IF
MUX
Q
MUX
HFA3724
4
Typical Application Diagram
For additional information on the PRISMTM chip set, call
(407) 724-7800 to access Intersil' AnswerFAX system. When
prompted, key in the four-digit document number (File #) of
the datasheets you wish to receive.
The four-digit file numbers are shown in Typical Application
Diagram, and correspond to the appropriate circuit.
QUAD IF MODULATOR
RFPA
HFA3925
HFA3724
DSSS BASEBAND PROCESSOR
D
A
T
A
T
O
MA
C
CTRL
HSP3824
TUNE/SELECT
HFA3524
0
o
/90
o
VCO
A/D
A/D
MAC-PHY
INTERFACE
802.11
VCO
DUAL SYNTHESIZER
HFA3624
RF/IF
CONVERTER
A/D
(FILE# 4067)
(FILE# 4064)
(FILE# 4062)
(FILE# 4066)
(FILE# 4132)
PRISMTM CHIP SET FILE #4063
M
U
X
M
U
X
DPSK
DEMOD
DPSK
MOD.
DE-
SPREAD
SPREAD
Q
I
HFA3424
(NOTE)
(FILE# 4131)
TYPICAL TRANSCEIVER APPLICATION USING THE HFA3724
NOTE: Required for systems targeting 802.11 specifications.
CCA
RXI
RXQ
RSSI
TXI
TXQ
2
HFA3724
5
Typical Application Diagram
(Targeting IEEE 802.11 Standard)
V
CC
316
0.1
56
47p 220
LO_IN
1K
100p
100p
V
CC
V
CC
0.1
0.1
TX_IF_OUT
74
75
79
80
PE
54
55
56
57
59
60
PE
44
46
42
43
48
49
(NOTE 3)
61
64
100p
100p
260
100p
100p
1
2
3
4
100p
100p
0.1
560
100p
100p
76
77
62
63
100p
100p
10nH
8 T
O
40p
(NOTE 2)
0.1
47p
47p
47nH
100p
(NOTE 4)
(NOTE 1)
56n
0.01
0.01
LPF_SEL0
LPF_SEL1
0.1
RXQ_OUT
LPF_RX_PE
LPF_TX_PE
MOD_TX_PE
MOD_RX_PE
RSSI
RXI_OUT
V
CC
0.1
0.1
V
CC
TXQ
0.1
29
30
33
34
14
15
16
17
9
10
11
12
13
21
22
41
45
47
900
18
19
2V REF
0.01
0.01
4.3K
4.3K
0.01
0.01
27
28
35
36
0.01
0.01
25
26
37
38
0.01
0.01
23
24
39
40
B
ASEB
AND PR
OCESSOR
HSP3824VI
680
680
TXI
V
CC
20
(NOTE 5)
CONVER
TER
HF
A3624IA
RF/IF
IF/RF
TOYOCOM
TQS 432
TOYOCOM
TQS 432
VCO
560MHz
VCO (AUXILIARY)
DUAL SYNTHESIZER
HFA3524IA
47
100p
(NOTE 6)
NC
50
TYPICAL APPLICATION DIAGRAM (TARGETING IEEE 802.11 STANDARD)
NOTES:
1. Input termination used to match a SAW filter.
2. Typical bandpass filter for 280MHz, BW = 47MHz, Q = 6. Can also be used if desired after the second stage.
3. Network shown for a typical -10dBm input at 50
.
4. Output termination used to match a SAW filter.
5. R
TUNE
value for a 7.7MHz cutoff frequency setting.
6. LO buffer output termination is needed only when the buffer is enabled by pin 50 connected to GND, otherwise tie pin 46 to pin 47.
HFA3724