ChipFind - документация

Электронный компонент: HFA3765IA96

Скачать:  PDF   ZIP
www.docs.chipfind.ru
background image
1
PRELIMINARY
February 1998
HFA3765
AGC and Quadrature IF Demodulator
Features
DescriptionIF Operation10MHz to 250MHz
I/Q Amplitude and Phase Balance . . 0.5dB, 2 Degrees
Voltage Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .>60dB
AGC Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .90dB
Output P1dB With 20pF Load . . . . . . . . . . . . . . . 2.5V
PP
Low LO Drive Level . . . . . . . . . . . . . . . . . . . . . . -10dBm
Power Enable/Disable Control
Single Supply Battery Operation . . . . . . . . . 2.7 to 3.3V
Applications
IS-95A CDMA/AMPS Dual Mode Handsets
Wideband CDMA Handsets
Full Duplex Transceivers
CDMA/TDMA Packet Protocol Radios
Description
The HFA3765 is a monolithic quadra-
ture demodulator and a gain control
amplifier stage with 90dB of dynamic
range for CDMA/AMPS cellular applications. Two amplifier
inputs are provided for interfacing different IF input filters. A
local oscillator input requires low drive levels and a divide by
two phase shifter with duty cycle compensation achieves
excellent phase and amplitude balance properties. The
HFA3765 is one of the four chips in the PRISMTM chip set
and is housed in a 28 lead SSOP package ideally suited to
cellular handset applications.
Pinout
HFA3765
(SSOP)
TOP VIEW
PRISMTM and the PRISMTM logo are trademarks of Intersil Corporation.
Simplified Block Diagram
Ordering Information
PART NUMBER
TEMP.
RANGE (
o
C)
PACKAGE
PKG. NO.
HFA3765IA
-40 to 85
28 Ld SSOP
M28.15
HFA3765IA96
-40 to 85
Tape and Reel
BYP+
BYP-
IF_CDMA+
IF_CDMA-
GND
IF_FM+
IF_FM-
AGC_CTRL
SEL
RX_PE
GND
GND_LO
LO_IN
V+_AGC
IF_OUT-
GND_AGC
GND
DEMOD+
V+_AMP
QOUT-
GND
IOUT+
GND_AMP
IF_OUT+
DEMOD-
QOUT+
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
V+_LO
IOUT-
LO_IN
2 0
o
/90
o
I O
U
T
P
UT
Q OU
T
P
U
T
CDM
A
F
M
IF
INP
U
T
AGC_CTRL
CDM
A
/F
M
IF
INP
U
T
BIAS
NETWORK
RX_PE
SEL
SW
IF
O
U
T
+
IF
O
U
T
-
DE
M
O
D-
DE
M
O
D+
File Number
4300.3
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2002. All Rights Reserved
background image
Pin Descriptions
PIN NUMBER
NAME
DESCRIPTION
1
BYP+
DC feedback pin for the AGC amplifier. Requires good RF decoupling to a solid ground.
2
IF_CDMA+
Non-inverting analog input of the AGC amplifier, CDMA channel.Requires a DC blocking
capacitor. A parallel differential DC coupled resistor setting the input impedance with its
complementary input is possible.
3
IF_CDMA-
Inverting analog input of the AGC amplifier, CDMA channel. Requires a DC blocking ca-
pacitor. A parallel differential DC coupled resistor setting the input impedance with its com-
plementary input is possible. AC couple to ground if the port is to be used single ended.
4
GND
Ground. Connect to a solid ground plane.
5
IF_FM+
Non-inverting analog input of the AGC amplifier, FM channel. Requires a DC blocking ca-
pacitor. A parallel differential DC coupled resistor setting the input impedance with its com-
plementary input is possible.
6
IF_FM-
Inverting analog input of the AGC amplifier, FM channel. Requires a DC blocking capacitor.
A parallel differential DC coupled resistor setting the input impedance with its complemen-
tary input is possible. AC couple to ground if the port is to be used single ended.
7
BYP -
DC feedback pin for the AGC amplifier. Require good RF decoupling to a solid ground.
8
AGC_CTRL
AGC current control input. Requires a 15K 1% series resistor.
9
SEL
Selects the CDMA or FM AGC Amplifier differential input. HIGH selects the CDMA input;
LOW selects the FM input.
10
RX_PE
Power enable control input. HIGH for normal operation. LOW for power down.
11
GND
Ground. Connect to a solid ground plane.
12
GND_LO
LO_IN input ground return. Ground to Local Oscillator ground plane or transmission line.
13
V+_LO
LO divider network Power Supply. Use high quality RF decoupling capacitors at the pin.
14
LO_IN
Current input from the Local Oscillator. Use a 50
power to current converter. See appli-
cations diagram. Requires a DC blocking capacitor.
15
GND_AMP
IF output amplifiers ground return.
16
IOUT-
Negative I channel baseband output. Requires a DC blocking capacitor.
17
IOUT+
Positive I channel baseband output. Requires a DC blocking capacitor.
18
GND
Ground. Connect to a solid ground plane.
19
QOUT-
Negative Q channel baseband output. Requires a DC blocking capacitor.
20
QOUT+
Positive Q channel baseband output. Requires a DC blocking capacitor.
21
V+_AMP
IF output amplifier Power Supply. Use high quality RF decoupling capacitors at the pin.
22
DEMOD+
Positive input of the quadrature demodulator. Requires a DC blocking capacitor.
23
DEMOD -
Negative input of the quadrature demodulator. Requires a DC blocking capacitor.
24
GND_AGC
AGC amplifier main ground return.
25
GND
Ground. Connect to a solid ground plane.
26
IF_OUT-
Negative output from the AGC amplifier. Requires a DC blocking capacitor.
27
IF_OUT+
Positive output from the AGC amplifier. Requires a DC blocking capacitor.
28
V+_AGC
AGC amplifier Power Supply. Use high quality RF decoupling capacitors at the pin.
HFA3765
background image
Absolute Maximum Ratings
Thermal Information
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +3.6V
Voltage on Any Other Pin . . . . . . . . . . . . . . . . . . -0.3V to V
CC
+0.3V
Operating Conditions
Supply Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7 to 3.3V
Temperature Range . . . . . . . . . . . . . . . . . . . . . . -40
o
C
T
A
85
o
C
Thermal Resistance (Typical, Note 1)
JA
(
o
C/W)
SSOP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . .
88
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150
o
C
Maximum Storage Temperature Range . . . . . . -65
o
C
T
A
150
o
C
Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . . 300
o
C
(Lead Tips Only)
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1.
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
PARAMETER
TEST CONDITIONS
(NOTE
2)
TEST
LEVEL
TEMP
(
o
C)
MIN
TYP
MAX
UNITS
OVERALL CASCADED SPECIFICATIONS, V
CC
= 2.7V, IF_IN = Differential - 60dBm or higher at 85MHz
IF Frequency Range
B
Full
10
85
250
MHz
Baseband Frequency Range
B
Full
0
-
1
MHz
LO Frequency Range
B
Full
20
170
500
MHz
AGC Gain Control Voltage Range
A
Full
0.5
-
2.4
V
AGC Gain Control Sensitivity
A
25
-
60
-
dB/V
AGC Gain Control Slope Change
A
25
-
1.2:1
3:1
-
Insertion Phase vs AGC
B
25
-
0.1
-
deg/dB
Gain Switching Speed, Full Scale
To
1dB Settling
B
25
-
TBD
10
s
Amplitude Balance (Note 3)
A
Full
-0.5
0
0.5
dB
Phase Balance (Note 3)
A
Full
-2
0
+2
Degrees
Power Gain
500
in, 5000
Differential load.
AGC_CTRL set for
48
0.2dB of powergain
(CDMA and FM mode)
A
Full
-
48
-
dB
Voltage Gain
A
Full
-
58
-
dB
Noise Figure (CDMA, SEL = HIGH)
B
Full
-
6.6
7.5
dB
Noise Figure (FM, SEL = LOW)
B
Full
-
6.9
8.0
dB
IP3, Output
A
Full
0.5
4.8
-
dBm
P1dB Output
A
Full
-10
-5
-
dBm
Voltage Gain
500
in, 5000 load
AGC_CTRL set for
38
0.2dB of powergain
(CDMA and FM mode)
B
Full
-
48
-
dB
Noise Figure
B
Full
-
8.4
-
dB
IP3, Output
B
Full
-
4.4
-
dBm
P1dB Output
B
Full
-
-6
-
dBm
Voltage Gain
500
in, 5000 load
AGC_CTRL set for
28
0.2dB of powergain
(CDMA and FM mode)
B
Full
-
38
-
dB
Noise Figure
B
Full
-
11
-
dB
IP3, Output
B
Full
-
3.2
-
dBm
P1dB Output
B
Full
-
-8
-
dBm
Voltage Gain
500
in, 5000 load
AGC_CTRL set for
18
0.2dB of powergain
(CDMA and FM mode)
B
Full
-
28
-
dB
Noise Figure
B
Full
-
14
-
dB
IP3, Output
B
Full
-
-1.0
-
dBm
P1dB Output
B
Full
-
-11
-
dBm
HFA3765
background image
Voltage Gain
500
in, 5000 load
AGC_CTRL set for
8
0.2dB of powergain
(CDMA and FM mode)
B
Full
-
18
-
dB
Noise Figure
B
Full
-
20
-
dB
IP3, Output
B
Full
-
-7.2
-
dBm
P1dB Output
B
Full
-
-17
-
dBm
Voltage Gain
500
in, 5000 load
AGC_CTRL set for
-2
0.2dB of powergain
(CDMA and FM mode)
B
Full
-
8
-
dB
Noise Figure
B
Full
-
28
-
dB
IP3, Output
B
Full
-
-15.2
-
dBm
P1dB Output
B
Full
-
-25
-
dBm
Voltage Gain
500
in, 5000 load
AGC_CTRL set for
-12
0.2dB of powergain
(CDMA and FM mode)
A
Full
-
-2
-
dB
Noise Figure
B
Full
-
37
-
dB
IP3, Output
A
Full
-26
-24.2
-
dBm
P1dB Output
A
Full
-36
-33
-
dBm
Voltage Gain
500
in, 5000 load
AGC_CTRL set for
-25
0.2dB of powergain
(CDMA and FM mode)
A
Full
-
-15
-
dB
Noise Figure
B
Full
48
-
dB
IP3, Output
A
Full
-38
-35.2
-
dBm
P1dB Output
A
Full
-48
-46
-
dBm
LO Current Input Impedance
Single end
C
25
-
130
-
LO Drive Level
Applications diagram
A
25
-
-10
-
dBm
LO Drive Optimal Current Range
B
25
50
200
300
A
Baseband Differential Load Resistance
B
Full
-
5000
-
Baseband Single ended Load Capacitance
B
Full
-
-
20
pF
Baseband Differential Load Capacitance
B
Full
-
-
10
pF
Single end Input Impedance CDMA or FM Measured single end
B
25
-
1500
-
Differential Input Impedance CDMA or FM Measured differential
B
25
-
3300
-
AGC Gain Control Input Impedance
Set externally
C
25
15K
-
-
AGC Amp Output Differential Impedance
C
25
-
80
-
POWER SUPPLY AND LOGIC SPECIFICATIONS
Supply Voltage Range
A
Full
2.7
-
3.3
V
Total Supply Current
V
CC
= 3.3V
A
Full
-
28
-
mA
Power Down Supply Current
V
CC
= 3.3V
A
Full
-
1
100
A
Power Up/Down Speed
B
25
-
-
10
s
RX_PE and SEL V
IL
A
Full
-
-
0.2*V
CC
V
RX_PE and SEL V
IH
A
Full
2.0
-
-
V
RXPE and SEL Input Bias Current
V
IH
= 2.0V, V
CC
= 3.3V
A
Full
-50
-
+50
A
V
IL
= 0.66V, V
CC
= 2.7V
A
Full
-50
-
+50
A
NOTES:
2. A = Production Tested, B = Based on Characterization, C = By Design
3. A positive frequency offset from the carrier produces the I channel leading the Q channel by 90 degrees.
Electrical Specifications
(Continued)
PARAMETER
TEST CONDITIONS
(NOTE
2)
TEST
LEVEL
TEMP
(
o
C)
MIN
TYP
MAX
UNITS
HFA3765
background image
Typical Applications Diagram
0
o
/90
o
2
1
220
1000p
56
IF_LO_INPUT
V+_AGC
BYP+
GND_AGC
IFOUT+
IFOUT-
IF_CDMA
IF_FM
+
-
+
-
BYP-
1000p
0.1
1000p
0.03
100p
1000p
1000p
10
00
p
10
00p
GND_AMP
QOUT
+
-
IOUT
+
-
GND
GND
DEMOD
GND
GND
SEL
RX_PE
GND_LO
V+_LO
LO_IN
HFA3765
0.01
10p
SEL
PE
V
CC
15K
BEAD
0.01
0.1
+
-
CDMA IF
FM IF
I+
Q+
I-
Q-
AGC_CTRL
0.1
0.1
0.1
0.1
560
680
1000p
220n
220n
22.7p
SAWTEK
855292
220n
MURATA
SX0439A
820n
4.1p
AGC_CTRL
V+_AMP

Document Outline