1
FN8027.1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
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Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2002. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
PRELIMINARY
ISL3872
Wireless LAN Integrated Medium Access
Controller with Baseband Processor
The Intersil ISL3872 Wireless LAN
Integrated Medium Access Controller
with Integrated Baseband Processor
is part of the PRISM III, 2.4GHz
radio chipset. The ISL3872 directly interfaces with the
Intersil's RF Front End (ISL3684). Adding Intersil's Power Amp
(ISL3984) offers the designer a complete end-to-end WLAN
Chipset solution. Protocol and PHY support are implemented
in firmware thus, allowing customization of the WLAN
solution.
Firmware implements the full IEEE 802.11 Wireless LAN
MAC protocol. It supports BSS and IBSS operation under
DCF, and operation under the optional Point Coordination
Function (PCF). Low level protocol functions such as
RTS/CTS generation and acknowledgment, fragmentation
and de-fragmentation, and automatic beacon monitoring are
handled without host intervention. Active scanning is
performed autonomously once initiated by host command.
Host interface command and status handshakes allow
concurrent operations from multi-threaded I/O drivers.
The ISL3872 has on-board A/D and D/A converters for
analog I and Q inputs and outputs, for which the ISL3684
Zero-IF QMODEM is recommended. Differential phase shift
keying modulation schemes DBPSK and DQPSK, with data
scrambling capability, are available along with
Complementary Code Keying to provide a variety of data
rates. Both Receive and Transmit AGC functions with 7-bit
AGC control obtain maximum performance in the analog
portions of the transceiver.
Built-in flexibility allows the ISL3872 to be configured
through a general purpose control bus, for a range of
applications.
The ISL3872 is designed to provide maximum performance
with minimum power consumption. External pin layout is
organized to provide optimal PC board layout to all user
interfaces including mini PCI.
The ISL3872 is housed in a thin plastic BGA package
suitable for mini PCI board applications.
Features
Firmware implements the full IEEE 802.11 Wireless LAN
MAC protocol
Improved Performance of Internal WEP Engine
Improvements to Debug Mode Support Tracing Execution
From on Chip Memory.
New Start Up Modes Allow the PCI and mini PCI
Configuration Registers to be Initialized From a Serial
EEPROM. This Allows Firmware to be Downloaded from
the Host, Eliminating the Parallel Flash Memory Device
Firmware Can be Loaded from Serial Flash Memory
Zero Glue Connection to 16-Bit Wide SRAM Devices
Low Frequency Crystal Oscillator to Maintain Time and
Allow Baseband Clock Source to Power off During Sleep
Mode
Programmable MBUS Cycle Extension Allows Accessing
of Slow Memory Devices Without Slowing the Clock
Complete DSSS Baseband Processor
RAKE Receiver with Decision Feedback Equalizer
Processing Gain. . . . . . . . . . . . . . . . . . . . .FCC Compliant
Programmable Data Rate . . . . . . . 1, 2, 5.5, and 11Mbps
Modulation Methods. . . . . . . . DBPSK, DQPSK, and CCK
Supports full or half duplex operations
On-chip A/D and D/A converters for I/Q data, AGC, and
adaptive power control
Targeted for Multipath Delay Spreads 100ns at 11Mbps,
250ns at 5.5Mbps
Supports Short Preamble and Antenna Diversity
Applications
High Data Rate Wireless LAN Systems Targeting IEEE
802.11b Standard
Mini PCI and 3V PCI Wireless LAN Adapters
PCN / Wireless PBX / Wireless Local Loop
Wireless LAN Access Points and Bridge Products
Spread Spectrum WLAN RF Modems
TDMA or CSMA Packet Protocol Radios
Ordering Information
PART
NUMBER
TEMP.
RANGE (
o
C)
PACKAGE
PART
NUMBER
ISL3872 IK
-40 to 85
256 BGA
V256.17x17A
ISL3872 IK96
-40 to 85
Tape and Reel 1000 Units /Reel
Data Sheet
November 2002
PDF 
ZIP