1
TB435.0
Using the EL7516 Demo Board
The complete schematic of EL7516 demo board is shown in
Figure 1. With different components stuffed, this demo board
can easily be configured into the applications shown in this
technical brief. The standard demo board being sent out is
the complete 5V to 12V converter shown in Table 1, which
occupies less than 0.4 in
2
area with components on top side
only. Layout diagrams are given at the end of this document.
1. V
IN
= 2.5V-5.5V. Can be higher with higher voltage rated
C
1
2. V
O
= 12V. Can be set according to the following formula:
where V
FB
is 1.294V.
3. I
O
- up to 750mA depending on input voltage, provided
that diode and inductor can handle the corresponding
currents (refer to data sheet for the chart)
4. Switching frequency - can be selected between 620KHz
(FSEL <0.6V) or 12.5MHz (FSEL >2.7V)
5. R
3
and C
5
are the compensation network.
V
O
V
FB
1
R
1
R
2
-------
+
=
FIGURE 1. 3.3V TO 12V CONVERTER
1
2
3
4
8
7
6
5
COMP
FB
SHDN
GND
SS
FSEL
VDD
LX
+
+
3.9k
4.7nF
27nF
22F
C
4
C
1
0.1F
L
1
D
1
22F
C
3
12V
2.7V TO 5.5V
R
3
C
6
85.2k
R
1
10k
R
2
C
2
R
4
10k
10k
R
5
SW
10H
C
5
TABLE 1. EL7516 BILL OF MATERIALS FOR V
O
= 12V
REFERENCE
DESIGNATOR
VALUE
MANUFACTURER
MANUFACTURER'S
PHONE NUMBER
MANUFACTURER'S
PART NUMBER
R
1
85.2k
/1%, 0603
Any
R
2
10k
/1%, 0603
Any
R
3
3.9k
, 0603
Any
R
4
, R
5
10k
/1%, 0603
Any
C
1
, C
3
22F, 16V, 1812
TDK
C4532X5R1C226M
C
2
0.1F, 16V, 0805
Any
C
4
27nF, 0603
Any
C
5
OPEN
C
6
4.7nF, 0603
Any
L
1
10H
Coilcraft
847-639-6400
DO1608C-103
D
1
MBR0520
On Semiconductor
800-282-9855
MBR0520
Technical Brief
May 13, 2005
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-352-6832
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
2
Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to
verify that the Application Note or Technical Brief is current before proceeding.
For information regarding Intersil Corporation and its products, see www.intersil.com
TB435.0
Demo Board Layout
Layout Guidelines
To achieve highest efficiency, best regulation and most
stable operation, a good printed circuit board layout is
essential. It is strongly recommended that the demo board
layout to be followed as closely as possible. Use the
following general guidelines when laying out the print circuit
board:
1. Place C
4
as close to the V
DD
pin as possible. C
4
is the
supply bypass capacitor of the device.
2. Keep the C
1
ground, GND pin and C
2
ground as close as
possible.
3. Keep the two high current paths a) from C
1
through L
1
, to
the LX pin and GND and b) from C
1
through L
1
, D
1
, and
C
2
as short as possible.
4. High current traces should be short and as wide as
possible.
5. Place feedback resistor close to the FB pin to avoid noise
pickup.
6. Place the compensation network close to the COMP pin.
The demo board is a good example of layout based on these
principles; it is available upon request.
FIGURE 2. TOP LAYER
1500 mil
1500 mil
FIGURE 3. BOTTOM LAYER
1500 mil
1500 mil
FIGURE 4. TOP SILKSCREEN
1.5 in
1.5 in
Technical Brief 435
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