2101-02_N.p65
Data Sheet No. PD60043-N
Typical Connection
Features
Floating channel designed for bootstrap operation
Fully operational to +600V
Tolerant to negative transient voltage
dV/dt immune
Gate drive supply range from 10 to 20V
Undervoltage lockout
3.3V, 5V, and 15V logic input compatible
Matched propagation delay for both channels
Outputs in phase with inputs (IR2101) or out of
phase with inputs (IR2102)
Description
The IR2101(S)/IR2102(S) are high voltage, high
speed power MOSFET and IGBT drivers with inde-
pendent high and low side referenced output chan-
nels. Proprietary HVIC and latch immune CMOS
technologies enable ruggedized monolithic con-
struction. The logic input is compatible with stan-
dard CMOS or LSTTL output, down to 3.3V logic. The
output drivers feature a high pulse current buffer
HIGH AND LOW SIDE DRIVER
Packages
Product Summary
V
OFFSET
600V max.
I
O
+/-
130 mA / 270 mA
V
OUT
10 - 20V
t
on/off
(typ.)
160 & 150 ns
Delay Matching
50 ns
IR2101
IR2102
IR2101
(S)
IR2102
(S)
8 Lead SOIC
8 Lead PDIP
stage designed for minimum driver cross-conduction. The floating channel can be used to drive an N-channel
power MOSFET or IGBT in the high side configuration which operates up to 600 volts.
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1
V
CC
V
B
V
S
HO
LO
COM
HIN
LIN
LIN
HIN
up to 600V
TO
LOAD
V
CC
V
CC
V
B
V
S
HO
LO
COM
HIN
LIN
LIN
HIN
up to 600V
TO
LOAD
V
CC
(Refer to Lead Assignments for correct pin
configuration). This/These diagram(s) show
electrical connections only. Please refer to
our Application Notes and DesignTips for
proper circuit board layout.
IR2101/IR2102
(S)
2
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Symbol
Definition
Min.
Max.
Units
V
B
High side floating supply voltage
-0.3
625
V
S
High side floating supply offset voltage
V
B
- 25
V
B
+ 0.3
V
HO
High side floating output voltage
V
S
- 0.3
V
B
+ 0.3
V
CC
Low side and logic fixed supply voltage
-0.3
25
V
LO
Low side output voltage
-0.3
V
CC
+ 0.3
V
IN
Logic input voltage (HIN & LIN)
-0.3
V
CC
+ 0.3
dV
S
/dt
Allowable offset supply voltage transient
--
50
V/ns
P
D
Package power dissipation @ T
A
+25
C
(8 lead PDIP)
--
1.0
(8 lead SOIC)
--
0.625
Rth
JA
Thermal resistance, junction to ambient
(8 lead PDIP)
--
125
(8 lead SOIC)
--
200
T
J
Junction temperature
--
150
T
S
Storage temperature
-55
150
T
L
Lead temperature (soldering, 10 seconds)
--
300
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions.
W
C/W
V
C
Symbol
Definition
Min.
Max.
Units
V
B
High side floating supply absolute voltage
V
S
+ 10
V
S
+ 20
V
S
High side floating supply offset voltage
Note 1
600
V
HO
High side floating output voltage
V
S
V
B
V
CC
Low side and logic fixed supply voltage
10
20
V
LO
Low side output voltage
0
V
CC
V
IN
Logic input voltage (HIN & LIN) (IR2101) & (HIN & LIN) (IR2102)
0
V
CC
T
A
Ambient temperature
-40
125
Note 1: Logic operational for V
S
of -5 to +600V. Logic state held for V
S
of -5V to -V
BS
. (Please refer to the Design Tip
DT97-3 for more details).
Recommended Operating Conditions
The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the
recommended conditions. The V
S
offset rating is tested with all supplies biased at 15V differential.
C
V
IR2101/IR2102
(S)
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3
Symbol
Definition
Min. Typ. Max. Units Test Conditions
V
IH
Logic "1" input voltage (IR2101)
Logic "0" input voltage (IR2102)
V
IL
Logic "0" input voltage (IR2101)
Logic "1"input voltage (IR2102)
V
OH
High level output voltage, V
BIAS
- V
O
--
--
100
I
O
= 0A
V
OL
Low level output voltage, V
O
--
--
100
I
O
= 0A
I
LK
Offset supply leakage current
--
--
50
V
B
= V
S
= 600V
I
QBS
Quiescent V
BS
supply current
--
30
55
V
IN
= 0V or 5V
I
QCC
Quiescent V
CC
supply current
--
150
270
V
IN
= 0V or 5V
I
IN+
Logic "1" input bias current
I
IN-
Logic "0" input bias current
V
CCUV+
V
CC
supply undervoltage positive going
8
8.9
9.8
threshold
V
CCUV-
V
CC
supply undervoltage negative going
7.4
8.2
9
threshold
I
O+
Output high short circuit pulsed current
130
210
--
V
O
= 0V
V
IN
= Logic "1"
PW
10
s
I
O-
Output low short circuit pulsed current
270
360
--
V
O
= 15V
V
IN
= Logic "0"
PW
10
s
Symbol
Definition
Min. Typ. Max. Units Test Conditions
ton
Turn-on propagation delay
--
160
220
V
S
= 0V
toff
Turn-off propagation delay
--
150
220
V
S
= 600V
tr
Turn-on rise time
--
100
170
tf
Turn-off fall time
--
50
90
MT
Delay matching, HS & LS turn-on/off
--
--
50
Static Electrical Characteristics
V
BIAS
(V
CC
, V
BS
) = 15V and T
A
= 25
C unless otherwise specified. The V
IN
, V
TH
and I
IN
parameters are referenced to
COM. The V
O
and I
O
parameters are referenced to COM and are applicable to the respective output leads: HO or LO.
Dynamic Electrical Characteristics
V
BIAS
(V
CC
, V
BS
) = 15V, C
L
= 1000 pF and T
A
= 25
C unless otherwise specified.
V
mA
3 -- -- V
CC
= 10V to 20V
V
-- -- 0.8 V
CC
= 10V to 20V
mV
A
-- 3 10
-- -- 1
V
IN
= 5V (IR2101)
V
IN
= 5V (IR2102)
V
IN
= 0V (IR2101)
V
IN
= 0V (IR2102)
ns
IR2101/IR2102
(S)
4
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Functional Block Diagram
PULSE
GEN
HIN
UV
DETECT
LIN
COM
HO
V
S
V
CC
LO
V
B
R
Q
S
PULSE
FILTER
HV
LEVEL
SHIFT
IR2101
IR2102
PULSE
GEN
HIN
UV
DETECT
LIN
COM
HO
V
S
V
CC
LO
V
B
R
Q
S
PULSE
FILTER
HV
LEVEL
SHIFT
Vcc
Vcc
IR2101/IR2102
(S)
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5
Lead Definitions
Symbol
Description
HIN
Logic input for high side gate driver output (HO), in phase (IR2101)
HIN
Logic input for high side gate driver output (HO), out of phase (IR2102)
LIN
Logic input for low side gate driver output (LO), in phase (IR2101)
LIN
Logic input for low side gate driver output (LO), out of phase (IR2102)
V
B
High side floating supply
HO
High side gate drive output
V
S
High side floating supply return
V
CC
Low side and logic fixed supply
LO
Low side gate drive output
COM
Low side return
Lead Assignments
8 Lead PDIP
8 Lead SOIC
IR2101
IR2101S
8 Lead PDIP
8 Lead SOIC
IR2102
IR2102S
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