Integrated Silicon Solution, Inc. -- 1-800-379-4774
1
SR072-1E
05/12/99
ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which
may appear in this publication. Copyright 1999, Integrated Silicon Solution, Inc.
FEATURES
Access time: 45, 70 ns
Low active power: 200 mW (typical)
Low standby power
-- 250
W (typical) CMOS standby
-- 28 mW (typical) TTL standby
Fully static operation: no clock or refresh
required
TTL compatible inputs and outputs
Single 5V power supply
DESCRIPTION
The
ISSI
IS62C256 is a low power, 32,768 word by 8-bit
CMOS static RAM. It is fabricated using
ISSI
's high-
performance, low power CMOS technology.
When
CS
is HIGH (deselected), the device assumes a standby
mode at which the power dissipation can be reduced down to
250
W (typical) at CMOS input levels.
Easy memory expansion is provided by using an active LOW
Chip Select (
CS
) input and an active LOW Output Enable (
OE
)
input. The active LOW Write Enable (
WE
) controls both writing
and reading of the memory.
The IS62C256 is pin compatible with other 32K x 8 SRAMs in
plastic SOP or TSOP (Type I) package.
IS62C256
32K x 8 LOW POWER CMOS STATIC RAM
FUNCTIONAL BLOCK DIAGRAM
A0-A14
CS
OE
WE
32K X 8
MEMORY ARRAY
DECODER
COLUMN I/O
CONTROL
CIRCUIT
GND
VCC
I/O
DATA
CIRCUIT
I/O0-I/O7
ISSI
IS62C256
2
Integrated Silicon Solution, Inc. -- 1-800-379-4774
SR072-1E
05/12/99
ISSI
PIN CONFIGURATION
28-Pin SOP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
GND
VCC
WE
A13
A8
A9
A11
OE
A10
CS
I/O7
I/O6
I/O5
I/O4
I/O3
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
Parameter
Value
Unit
V
TERM
Terminal Voltage with Respect to GND
0.5 to +7.0
V
T
BIAS
Temperature Under Bias
55 to +125
C
T
STG
Storage Temperature
65 to +150
C
P
T
Power Dissipation
0.5
W
I
OUT
DC Output Current (LOW)
20
mA
Note:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation of the
device at these or any other conditions above those indicated in the operational sections of
this specification is not implied. Exposure to absolute maximum rating conditions for extended
periods may affect reliability.
22
23
24
25
26
27
28
1
2
3
4
5
6
7
21
20
19
18
17
16
15
14
13
12
11
10
9
8
OE
A11
A9
A8
A13
WE
VCC
A14
A12
A7
A6
A5
A4
A3
A10
CS
I/O7
I/O6
I/O5
I/O4
I/O3
GND
I/O2
I/O1
I/O0
A0
A1
A2
PIN CONFIGURATION
28-Pin TSOP
PIN DESCRIPTIONS
A0-A14
Address Inputs
CS
Chip Select Input
OE
Output Enable Input
WE
Write Enable Input
I/O0-I/O7
Input/Output
Vcc
Power
GND
Ground
TRUTH TABLE
Mode
WE
WE
WE
WE
WE
CS
CS
CS
CS
CS
OE
OE
OE
OE
OE
I/O Operation
Vcc Current
Not Selected
X
H
X
High-Z
I
SB
1
, I
SB
2
(Power-down)
Output Disabled
H
L
H
High-Z
I
CC
1
, I
CC
2
Read
H
L
L
D
OUT
I
CC
1
, I
CC
2
Write
L
L
X
D
IN
I
CC
1
, I
CC
2
IS62C256
Integrated Silicon Solution, Inc. -- 1-800-379-4774
3
SR072-1E
05/12/99
ISSI
OPERATING RANGE
Range
Ambient Temperature
V
CC
Commercial
0
C to +70
C
5V
10%
Industrial
40
C to +85
C
5V
10%
CAPACITANCE
(1,2)
Symbol
Parameter
Conditions
Max.
Unit
C
IN
Input Capacitance
V
IN
= 0V
8
pF
C
OUT
Output Capacitance
V
OUT
= 0V
10
pF
Notes:
1. Tested initially and after any design or process changes that may affect these parameters.
2. Test conditions: T
A
= 25
C, f = 1 MHz, Vcc = 5.0V.
POWER SUPPLY CHARACTERISTICS
(1)
(Over Operating Range)
-45 ns
-70 ns
Symbol
Parameter
Test Conditions
Min. Max.
Min. Max.
Unit
I
CC
1
Vcc Operating
V
CC
= Max.,
CS
= V
IL
Com.
--
60
--
60
mA
Supply Current
I
OUT
= 0 mA, f = 0
Ind.
--
70
--
70
I
CC
2
Vcc Dynamic Operating
V
CC
= Max.,
CS
= V
IL
Com.
--
70
--
65
mA
Supply Current
I
OUT
= 0 mA, f = f
MAX
Ind.
--
80
--
75
I
SB
1
TTL Standby Current
V
CC
= Max.,
Com.
--
5
--
5
mA
(TTL Inputs)
V
IN
= V
IH
or V
IL
Ind.
--
10
--
10
CS
V
IH
, f = 0
I
SB
2
CMOS Standby
V
CC
= Max.,
Com.
--
0.5
--
0.5
mA
Current (CMOS Inputs)
CS
V
CC
0.2V,
Ind.
--
1.0
--
1.0
V
IN
V
CC
0.2V, or
V
IN
0.2V, f = 0
Note:
1. At f = f
MAX
, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
DC ELECTRICAL CHARACTERISTICS
Symbol
Parameter
Test Conditions
Min.
Max.
Unit
V
OH
Output HIGH Voltage
V
CC
= Min., I
OH
= 1.0 mA
2.4
--
V
V
OL
Output LOW Voltage
V
CC
= Min., I
OL
= 2.1 mA
--
0.4
V
V
IH
Input HIGH Voltage
2.2
V
CC
+ 0.5
V
V
IL
Input LOW Voltage
(1)
0.3
0.8
V
I
LI
Input Leakage
GND
V
IN
V
CC
Com.
2
2
A
Ind.
10
10
I
LO
Output Leakage
GND
V
OUT
V
CC
,
Com.
2
2
A
Outputs Disabled
Ind.
10
10
Note:
1. V
IL
= 3.0V for pulse width less than 10 ns.
IS62C256
4
Integrated Silicon Solution, Inc. -- 1-800-379-4774
SR072-1E
05/12/99
ISSI
DATA RETENTION CHARACTERISTICS
Symbol
Parameter
Test Conditions
Min.
Max.
Units
V
DR
V
CC
for retention of data
2.0
--
V
I
DR
1
Data retention current
V
DR
= 3.0V, T
A
= 0
C to +25
C
--
200
A
I
DR
2
Data retention current
V
DR
= 3.0V, T
A
= 0
C to +70
C
--
200
A
Figure 1.
Figure 2.
480
100 pF
Including
jig and
scope
255
OUTPUT
5V
480
5 pF
Including
jig and
scope
255
OUTPUT
5V
AC TEST LOADS
AC TEST CONDITIONS
Parameter
Unit
Input Pulse Level
0V to 3.0V
Input Rise and Fall Times
3 ns
Input and Output Timing
1.5V
and Reference Levels
Output Load
See Figures 1 and 2
READ CYCLE SWITCHING CHARACTERISTICS
(1)
(Over Operating Range)
-45 ns
-70 ns
Symbol
Parameter
Min.
Max.
Min.
Max.
Unit
t
RC
Read Cycle Time
45
--
70
--
ns
t
AA
Address Access Time
--
45
--
70
ns
t
OHA
Output Hold Time
2
--
2
--
ns
t
ACS
CS
Access Time
--
45
--
70
ns
t
DOE
OE
Access Time
--
25
--
35
ns
t
LZOE
(2)
OE
to Low-Z Output
0
--
0
--
ns
t
HZOE
(2)
OE
to High-Z Output
0
20
0
25
ns
t
LZCS
(2)
CS
to Low-Z Output
3
--
3
--
ns
t
HZCS
(2)
CS
to High-Z Output
0
20
0
25
ns
t
PU
(3)
CS
to Power-Up
0
--
0
--
ns
t
PD
(3)
CS
to Power-Down
--
30
--
50
ns
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V and
output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured
500 mV from steady-state voltage. Not 100% tested.
3. Not 100% tested.
IS62C256
Integrated Silicon Solution, Inc. -- 1-800-379-4774
5
SR072-1E
05/12/99
ISSI
DATA VALID
READ1.eps
PREVIOUS DATA VALID
t
AA
t
OHA
t
OHA
t
RC
D
OUT
ADDRESS
READ CYCLE NO. 2
(1,3)
AC WAVEFORMS
READ CYCLE NO. 1
(1,2)
t
RC
t
OHA
t
AA
t
DOE
t
LZOE
t
ACS
t
LZCS
t
HZOE
HIGH-Z
DATA VALID
ADDRESS
OE
CS
D
OUT
t
HZCS
CS_RD2.eps
Notes:
1.
WE
is HIGH for a Read Cycle.
2. The device is continuously selected.
OE
,
CS
= V
IL
.
3. Address is valid prior to or coincident with
CS
LOW transitions.
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