Integrated Silicon Solution, Inc. -- www.issi.com --
1-800-379-4774
1
Rev. A
03/17/06
ISSI
Copyright 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability
arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any
published information and before placing orders for products.
IS65LV256AL
IS62LV256AL
FEATURES
High-speed access time: 20, 45 ns
Automatic power-down when chip is deselected
CMOS low power operation
-- 17 W (typical) CMOS standby
-- 50 mW (typical) operating
TTL compatible interface levels
Single 3.3V power supply
Fully static operation: no clock or refresh
required
Three-state outputs
Industrial and Automotive temperatures avail-
able
Lead-free available
DESCRIPTION
The
ISSI
IS62/65LV256AL is a very high-speed, low
power, 32,768-word by 8-bit static RAM. It is fabricated
using
ISSI
's high-performance CMOS technology. This
highly reliable process coupled with innovative circuit
design techniques, yields access times as fast as 15 ns
maximum.
When
CE is HIGH (deselected), the device assumes a
standby mode at which the power dissipation is reduced to
150 W (typical) with CMOS input levels.
Easy memory expansion is provided by using an active
LOW Chip Enable (
CE). The active LOW Write Enable
(
WE) controls both writing and reading of the memory.
The IS62/65LV256AL is available in the JEDEC standard
28-pin SOJ, 28-pin SOP, and the 28-pin 450-mil TSOP
package.
32K x 8 LOW VOLTAGE
CMOS STATIC RAM
FUNCTIONAL BLOCK DIAGRAM
A0-A14
CE
OE
WE
32K x 8
MEMORY ARRAY
DECODER
COLUMN I/O
CONTROL
CIRCUIT
GND
VDD
I/O
DATA
CIRCUIT
I/O0-I/O7
MARCH 2006
IS65LV256AL
IS62LV256AL
ISSI
2
Integrated Silicon Solution, Inc. -- www.issi.com --
1-800-379-4774
Rev. A
03/17/06
PIN CONFIGURATION
28-Pin SOJ/ 28-pin SOP
22
23
24
25
26
27
28
1
2
3
4
5
6
7
21
20
19
18
17
16
15
14
13
12
11
10
9
8
OE
A11
A9
A8
A13
WE
VDD
A14
A12
A7
A6
A5
A4
A3
A10
CE
I/O7
I/O6
I/O5
I/O4
I/O3
GND
I/O2
I/O1
I/O0
A0
A1
A2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
GND
VDD
WE
A13
A8
A9
A11
OE
A10
CE
I/O7
I/O6
I/O5
I/O4
I/O3
PIN CONFIGURATION
28-Pin TSOP
PIN DESCRIPTIONS
A0-A14
Address Inputs
CE
Chip Enable Input
OE
Output Enable Input
WE
Write Enable Input
I/O0-I/O7
Input/Output
V
DD
Power
GND
Ground
TRUTH TABLE
Mode
WE
WE
WE
WE
WE
CE
CE
CE
CE
CE
OE
OE
OE
OE
OE
I/O Operation
V
DD
Current
Not Selected
X
H
X
High-Z
I
SB
1
, I
SB
2
(Power-down)
Output Disabled
H
L
H
High-Z
I
CC
1
, I
CC
2
Read
H
L
L
D
OUT
I
CC
1
, I
CC
2
Write
L
L
X
D
IN
I
CC
1
, I
CC
2
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
Parameter
Value
Unit
V
TERM
Terminal Voltage with Respect to GND
0.5 to +4.6
V
T
BIAS
Temperature Under Bias
55 to +125
C
T
STG
Storage Temperature
65 to +150
C
P
T
Power Dissipation
0.5
W
I
OUT
DC Output Current (LOW)
20
mA
Note:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation of the
device at these or any other conditions above those indicated in the operational sections of
this specification is not implied. Exposure to absolute maximum rating conditions for extended
periods may affect reliability.
ISSI
Integrated Silicon Solution, Inc. -- www.issi.com --
1-800-379-4774
3
Rev. A
03/17/06
IS65LV256AL
IS62LV256AL
DC ELECTRICAL CHARACTERISTICS
(Over Operating Range)
Symbol
Parameter
Test Conditions
Min.
Max.
Unit
V
OH
Output HIGH Voltage
V
DD
= Min., I
OH
= 2.0 mA
2.4
--
V
V
OL
Output LOW Voltage
V
DD
= Min., I
OL
= 4.0 mA
--
0.4
V
V
IH
Input HIGH Voltage
2.2
V
DD
+ 0.3
V
V
IL
Input LOW Voltage
(1)
0.3
0.8
V
I
LI
Input Leakage
GND
V
IN
V
DD
Com.
1
1
A
Ind.
2
2
Auto.
10
10
I
LO
Output Leakage
GND
V
OUT
V
DD
, Outputs Disabled
Com.
1
1
A
Ind.
2
2
Auto.
10
10
Notes:
1. V
IL
= 3.0V for pulse width less than 10 ns.
2. Not more than one output should be shorted at one time. Duration of the short circuit should not exceed 30 seconds.
OPERATING RANGE
Part No.
Range
Ambient Temperature
V
DD
IS62LV256AL
Commercial
0C to +70C
3.3V +10%
IS62LV256AL
Industrial
40C to +85C
3.3V 10%
IS65LV256AL
Automotive
40C to +125C
3.3V 10%
IS65LV256AL
IS62LV256AL
ISSI
4
Integrated Silicon Solution, Inc. -- www.issi.com --
1-800-379-4774
Rev. A
03/17/06
CAPACITANCE
(1,2)
Symbol
Parameter
Conditions
Max.
Unit
C
IN
Input Capacitance
V
IN
= 0V
6
pF
C
OUT
Output Capacitance
V
OUT
= 0V
5
pF
Notes:
1. Tested initially and after any design or process changes that may affect these parameters.
2. Test conditions: T
A
= 25C, f = 1 MHz, V
DD
= 3.3V.
POWER SUPPLY CHARACTERISTICS
(1)
(Over Operating Range)
-20 ns
-45 ns
Symbol Parameter
Test Conditions
Min. Max.
Min. Max.
Unit
I
CC
1
V
DD
Operating
V
DD
= Max.,
CE = V
IL
Com.
--
4
--
4
mA
Supply Current
I
OUT
= 0 mA, f = 1 MHz
Ind.
--
5
--
5
Auto.
--
--
--
8
I
CC
2
V
DD
Dynamic Operating
V
DD
= Max.,
CE = V
IL
Com.
--
20
--
10
mA
Supply Current
I
OUT
= 0 mA, f = f
MAX
Ind.
--
25
--
12
Auto.
--
--
--
20
typ.
(2)
15
7
I
SB
1
TTL Standby Current
V
DD
= Max.,
Com.
--
1.5
--
1.5
mA
(TTL Inputs)
V
IN
= V
IH
or V
IL
Ind.
--
1.8
--
1.8
CE
V
IH
, f = 0
Auto.
--
--
--
2
I
SB
2
CMOS Standby
V
DD
= Max.,
Com.
--
15
--
15
A
Current (CMOS Inputs)
CE
V
DD
0.2V,
Ind.
--
20
--
20
V
IN
> V
DD
0.2V, or
Auto.
--
--
--
50
V
IN
0.2V, f = 0
typ.
(2)
2
2
Note:
1. At f = f
MAX
, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
2. Typical values are measured at V
DD
= 3.3V, T
A
= 25
o
C and not 100% tested.
ISSI
Integrated Silicon Solution, Inc. -- www.issi.com --
1-800-379-4774
5
Rev. A
03/17/06
IS65LV256AL
IS62LV256AL
READ CYCLE SWITCHING CHARACTERISTICS
(1)
(Over Operating Range)
-20 ns
-45 ns
Symbol
Parameter
Min.
Max.
Min.
Max.
Unit
t
RC
Read Cycle Time
20
--
45
--
ns
t
AA
Address Access Time
--
20
--
45
ns
t
OHA
Output Hold Time
2
--
2
--
ns
t
ACE
CE Access Time
--
20
--
45
ns
t
DOE
OE Access Time
--
10
--
25
ns
t
LZOE
(2)
OE to Low-Z Output
0
--
0
--
ns
t
HZOE
(2)
OE to High-Z Output
--
9
0
20
ns
t
LZCE
(2)
CE to Low-Z Output
3
--
3
--
ns
t
HZCE
(2)
CE to High-Z Output
--
9
0
20
ns
t
PU
(3)
CE to Power-Up
0
--
0
--
ns
t
PD
(3)
CE to Power-Down
--
18
--
30
ns
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V and
output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured 500 mV from steady-state voltage. Not 100% tested.
3. Not 100% tested.
AC TEST LOADS
AC TEST CONDITIONS
Parameter
Unit
Input Pulse Level
0V to 3.0V
Input Rise and Fall Times
3 ns
Input and Output Timing
1.5V
and Reference Levels
Output Load
See Figures 1 and 2
Figure 1.
Figure 2.
635
30 pF
Including
jig and
scope
702
OUTPUT
3.3V
635
5 pF
Including
jig and
scope
702
OUTPUT
3.3V
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