King Billion Electronics Co., Ltd

HE84770

HE80000 SERIES

August 25, 2003

Page 1 of 26

V2.6E

This specification is subject to change without notice. Please contact sales person for the latest version before use.

- Table of Contents -

General Description ___________________________________________________________________2

Features _____________________________________________________________________________2

Functional Block Diagram______________________________________________________________3

Pin Description _______________________________________________________________________3

LCD RAM Map ______________________________________________________________________5

LCD Power Supply____________________________________________________________________8

6.1.

LCDC Control register _____________________________________________________________10

Oscillators __________________________________________________________________________10

General Purpose I/O__________________________________________________________________12

Key Scan Circuit_____________________________________________________________________13

10.

Timer1 ___________________________________________________________________________15

11.

Timer2 ___________________________________________________________________________16

12.

Time Base Interrupt________________________________________________________________18

13.

Watch Dog Timer __________________________________________________________________18

14.

Digital-to-Analog Converter _________________________________________________________19

15.

Pulse-Width Modulation ____________________________________________________________20

16.

Absolute Maximum Rating __________________________________________________________21

17.

Recommended Operating Conditions _________________________________________________21

18.

AC/DC Characteristics _____________________________________________________________21

19.

Application Circuit_________________________________________________________________23

20.

Important Note ____________________________________________________________________24

21.

Updated Record ___________________________________________________________________25

King Billion Electronics Co., Ltd

HE84770

HE80000 SERIES

August 25, 2003

Page 2 of 26

V2.6E

This specification is subject to change without notice. Please contact sales person for the latest version before use.

1. General Description

HE84770 is a member of 8-bit Micro-controller series developed by King Billion Electronics. Four LCD
driver configurations, 32 COM x 128 SEG, 48 COM x 112 SEG, 64 COM x 96 SEG or 80 COM x 80
SEG are available by mask option. 24 LCD segment driver pins are multiplexed with I/O pins to provide
flexibility of wide variety of combinations to suit the needs of applications. The built-in LCD power
supply is equipped with voltage charge-pump circuit to generate the high voltage required by the high
duty LCD driver, bias voltage generating circuit and input voltage regulator circuit to supply stable LCD
display effect over the wide battery life. The built-in OP comparator can be used with (light, voice,
temperature, humility) sensor and used as battery low detection. 7-bit current-type D/A converter and
PWM device provide the complete speech output mechanism. The 2 MB ROM can be used in the storage
of speech, graphic, text, etc. It is ideal for applications such as Translator, Data Bank, Educational Toy,
Digital Voice Recording System, etc.

The instruction set of HE80000 series is easy to learn and simple to use. Only 32 instructions with four
addressing modes are provided. Most of instructions take only 3 oscillator clocks to execute. The
processing power is enough to most of battery operation system.

2. Features

Operation Voltage:

2.4V ~ 3.6V

System Clock:

DC ~ 8MHz @ 3.6V

DC ~ 4MHz @ 2.4V

Internal ROM:

2 MB (256 KB Program ROM + 1792 KB Data ROM)

Internal RAM:

16 KB

Dual Clock System: Fast clock:

32768 ~ 8M Hz (No Internal Clock)

Slow clock: 32768 Hz

Operation Mode:

Fast, Slow, Idle and Sleep modes.

24 ~ 48 bit bi-directional general purpose I/O port with push-pull or Open-Drain output type

selectable for each I/O pin by mask option. 24 of them are multiplexed with LCD segment
pins.

Built-in 4x20 hardware keyboard scan circuit (multiplexed with LCD SEG pin) helps to

reduce the pin counts as well as the firmware effort.

Voltage Detector with two detecting thresholds.
Four LCD configurations: 32 COM x 128 SEG, 48 COM x 112 SEG, 64 COM x 96 SEG or

80 COM x 80 SEG. All of LCD configurations are B TYPE.

Built-in LCD power supply with input voltage regulator, x3, x4, x5 voltage multiplier and

bias voltage generating circuit.

One 7-bit current-type DAC output.
Single-ended Pulse Width Modulation circuit for alternative voice output.
Built-in OP comparator.
Two 16-bit timers and one Time-Base timer.
Watch Dog Timer to prevent deadlock condition.
Two external interrupts and three internal timer interrupts.
Instruction set: 32 instructions with 4 addressing modes.

King Billion Electronics Co., Ltd

HE84770

HE80000 SERIES

August 25, 2003

Page 3 of 26

V2.6E

This specification is subject to change without notice. Please contact sales person for the latest version before use.

3. Functional Block Diagram

SEG

FXI, FXO

COM

LCD

Driver

8 Bit CPU

Fast Clock

OSC.

2 MB ROM

SXI, SXO

LCD Power

Supply

Slow Clock

OSC

16 KB RAM

PRTC, PRTD, PRT10,

PWM

PRT17

I/O Port

TC1

PWM

SGKY[43..24]

TC2

VO, DAO

Key Scan

DAC

TBI

OPO,OPIN, OPIP

WDT

OP Amp

4. Pin Description

HE84770

1
2

4
5

7
8

12
13

15
16

18
19

20
21

23
24

26
27

30 31

32 33 34

35 36 37

38 39 40

41 42

43 44 45

46 47 48

49 50 51

52 53

54 55 56

57 58 59

60 61 62

63 64

65 66 67

68 69 70

71 72 73

74 75 76

77 78

79 80 81

82 83 84

85 86 87

88 89

90 91 92

93 94 95

96 97 98

99 100

101 102 103

104 105 106

107 108

109

110

111

112

113

114

115

116

117

118

119

120

121

122

123

124

125

126

127

128

129

130

131

132

133

134

135

136

137

SEG48
SEG47

SEG46

SEG45
SEG44

SGKY43

SGKY42
SGKY41

SGKY40
SGKY39

SGKY38

SGKY37
SGKY36

SGKY35

SGKY34
SGKY33

SGKY32

SGKY31
SGKY30

SGKY29
SGKY28

SGKY27

SGKY26
SGKY25

SGKY24

PRT147
PRT146

PRT145
PRT144

1
43

1
42

1
41

1
40

1
57

1
56

1
55

1
54

1
53

1
52

1
51

1
50

1
77

1
76

1
75

1
74

1
73

1
72

1
71

1
70

LVL1 LVL2 LVL3

LVL4 LVL5 LG

LVP LC

AP4A

AP2B

AP2A

AP1A

AP1B

AP3A

LVR

LVAG GN

VO DA

I
N

I
P

_
N

SXO

SXI

VDD

PRT107

PRT106

PRT105

PRT104

PRT103

PRT102

PRT101

PRT100

PRTD7

PRTD6

PRTD5

PRTD4

PRTD3

PRTD2

PRTD1

PRTD0

GND_PWM

PWM

PRTC7

PRTC6

PRTC5

PRTC4

PRTC3

PRTC2

PRTC1

PRTC0

VDD_RAM

SEG79

SEG78

SEG77

SEG76

SEG75

SEG74

SEG73

SEG72

SEG71

SEG70

SEG69

SEG68

SEG67

SEG66

SEG65

SEG64

SEG63

SEG62

SEG61

SEG60

SEG59

SEG58

SEG57

SEG56

SEG55

SEG54

SEG53

SEG52

SEG51

SEG50

SEG49

Pin Name

Pin # I/O

Description

SEG[79..44]

186~216
, 1 ~ 5

O LCD segment SEG[79..44] driver outputs.

SGKY[43..24] 6 ~ 25 O

LCD segments share pads with key scan out SCNO[19..0]. The key scan function of
these pins can be disabled by mask option clearing MO_LCDKEY to `0', then
SGKY[43..24] function as LCD segment driver only. Setting MO_LCDKEY to `1'

King Billion Electronics Co., Ltd

HE84770

HE80000 SERIES

August 25, 2003

Page 4 of 26

V2.6E

This specification is subject to change without notice. Please contact sales person for the latest version before use.

Pin Name

Pin # I/O

Description

will turn on the key scan function.

PRT14[7..0]/
SEG[23:16]

26 ~ 33

B/
O

8-bit bi-directional I/O port 14 is shared with LCD segment pads SEG[23..16]. The
function of the pad can be selected individually by mask options MO_LIO14[7..0].
(`1' for LCD and `0' for I/O).
The output type of I/O pad can also be selected by mask option MO_14PP[7..0] (1 for
push-pull and `0' for open-drain).
As the output structure of I/O pad does not contain tri-state buffer. When using the I/O
as input, "1" must be outputted before reading.

PRT15[7..0]/
SEG[15:8]

34 ~ 41

B/
O

8-bit bi-directional I/O port 15 is shared with LCD segment pads SEG[15..8]. The
function of the pad can be selected individually by mask options MO_LIO15[7..0].
(`1' for LCD and `0' for I/O).
The output type of I/O pad can also be selected by mask option MO_15PP[7..0] (1 for
push-pull and `0' for open-drain).
As the output structure of I/O pad does not contain tri-state buffer. When using the I/O
as input, "1" must be outputted before reading.

PRT17[7..0]/
SEG[7:0]

42 ~ 49

B/
O

8-bit bi-directional I/O port 17 is shared with LCD segment pads SEG[7..0]. The
function of the pad can be selected individually by mask options MO_LIO17[7..0].
(`1' for LCD and `0' for I/O).
The output type of I/O pad can also be selected by mask option MO_17PP[7..0] (1 for
push-pull and `0' for open-drain).
As the output structure of I/O pad does not contain tri-state buffer. When using the I/O
as input, "1" must be outputted before reading.

COM[31..0] 50 ~ 81 O LCD COMMON Driver pads.
LVL1

P LCD Bias Voltage 1.

LVL2

P LCD Bias Voltage 2

LVL3 84

LCD Bias Voltage 3

LVL4

P LCD Bias Voltage 4

LVL5

P LCD Bias Voltage 5.

LGS2

LCD Drive Voltage Setting

LVP

P Charge Pump Output..

LCAP4A

O Charge Pump Capacitor Pin.

LCAP2B

O Charge Pump Capacitor Pin.

LCAP2A

O Charge Pump Capacitor Pin.

LCAP1A

O Charge Pump Capacitor Pin.

LCAP1B

O Charge Pump Capacitor Pin.

LCAP3A

O Charge Pump Capacitor Pin.

LVREG 95 O

Voltage Regulator Output. VDD is regulated to generate LVREG, which is in turns
pumped to LVP. Adjust resistor between LGS1 and LVREG to set LVREG voltage.

LGS1 96

Regulator

Voltage

Setting

LVAG 97

Reference

Voltage

Output.

Fixed 0.9 Volt DC reference voltage

GND

P Power ground Input.

VO 99

DAC Voice Output. Set the bit 1 and clear the bit 0 of VOC (DA = `1' and OP = `0')
register to turn on DAC with VO output.

DAO 100

Alternate output of DAC. Set both bit 1 and bit 0 of VOC register (DA = `1' and OP =
`1') to turn on DAC with DAO output as well as OP comparator.

OPIN 101

Inverting input of OP Amp. Set the bit 0 of VOC register (OP = `1') to turn on OP
comparator.

OPIP

102

Non-inverting input of OP Amp.

OPO

103

O Output of OP Amp.

RSTP_N 104 I

System Reset input pin. Level trigger, active low on this pin will put the chip in reset
state.

FXO,

105, 106 O, External fast clock pin. Two types of oscillator can be selected by MO_FXTAL (`0'

King Billion Electronics Co., Ltd

HE84770

HE80000 SERIES

August 25, 2003

Page 5 of 26

V2.6E

This specification is subject to change without notice. Please contact sales person for the latest version before use.

Pin Name

Pin # I/O

Description

FXI

B for RC type and `1' for crystal type). For RC type oscillator, one resistor need to be

connected between FXI and GND. For crystal oscillator, one crystal need to be placed
between FXI and FXO. Please refer to application circuit for details.

TSTP_P 107

Test input pin. Please bond this pad and reserve a test point on PCB for debugging.
But for improving ESD, please connect this point with zero Ohm resistor to GND

SXO,
SXI

108, 109

O,
I

External slow clock pins. Slow clock is clock source for LCD display, TIMER1,
Time-Base and other internal blocks. Both crystal and RC oscillator are provided. The
slow clock type can be selected by mask option MO_SXTAL. Choose `0' for RC type
and `1' for crystal oscillator.

VDD 110

Positive power Input. 0.1 �F decoupling capacitors should be placed as close to IC
VDD and GND pads as possible for best decoupling effect.

PRT10[7..0]

111 ~
118

8-bit bi-directional I/O port 10. The output type of I/O pad can be selected by mask
option MO_10PP[7..0] (`1' for push-pull and `0' for open-drain).
As the output structure of I/O pad does not contain tri-state buffer. When using the I/O
pad as input pad, "1" must be outputted before reading.

PRTD[7..0]

119 ~
126

8-bit bi-directional I/O port D. The output type of I/O pad can also be selected by
mask option MO_DPP[7..0] (`1' for push-pull and `0' for open-drain).
As the output structure of I/O pad does not contain tri-state buffer. When using the I/O
as input, `1' must be outputted before reading the pin.
PRTD[7..2] can be used as wake-up pins. PRTD[7..6] can be as external interrupt
sources.

GND_PWM 127

O Dedicated Ground for PWM output.

PWM 128

The PWM output can drive speaker or buzzer directly. Set the bit2 of VOC register as
one to turn on PWM. Using VDD & PWM to drive output device.

PRTC[7..0]

129 ~
136

8-bit bi-directional I/O port C. PRTC[7:4] is shared with Key Scan Dedicated Input
SCNI[3:0]. The Key Scan function can be disabled by clearing MO_LCDKEY mask
option to `0'.
The output type of I/O pad can also be selected by mask option MO_CPP[7..0] (`1'
for push-pull and `0' for open-drain).
As the output structure of I/O pad does not contain tri-state buffer. When using the I/O
as input, `1' must be outputted before reading the pin.

VDD_RAM 137

P Dedicated power input for RAM

CMSG[32..79]

138 ~
185

COM[32..79] pads are shared with SEG[127..80] outputs. The functions of the pads to
be COM drivers or SEG drivers can be selected by mask option MO_COM[0]. Please
refer to LCD driver configuration for details.

I: Input, O: Output, B: Bidirectional, P: Power.

5. LCD RAM Map

There are 4 LCD configurations as determined by mask option MO_COM[1..0]. The functions of
CMSG[79..32] are different in each configuration as listed in the following table.

MO_COM[1..0] Configuration CMSG[79..64] CMSG[63..48] CMSG[47..32]

32 x 128 SEG[80..95] SEG[96..111] SEG[112..127]

48 x 112 SEG[80..95] SEG[96..111] COM[47..32]

64 x 96

SEG[80..95] COM[63..48] COM[47..32]

80 x 80

COM[79..64] COM[63..48] COM[47..32]

Электронный компонент: HE84770