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Электронный компонент: KAF-1301E

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Eastman Kodak Company - Image Sensor Solutions
For the most current information regarding this product:
Phone: (585) 722-4385 Fax: (585) 477-4947 Web: www.kodak.com/go/imagers E-mail: imagers@kodak.com
KAF-1301E
Performance Specification


KAF - 1301E
1280 (H) x 1024 (V) Pixel
Full-Frame CCD Image Sensor
Performance Specification



Eastman Kodak Company
Image Sensor Solutions
Rochester, New York 14650-2010





Revision 3
February 5, 2003
Eastman Kodak Company - Image Sensor Solutions
For the most current information regarding this product:
Phone: (585) 722-4385 Fax: (585) 477-4947 Web: www.kodak.com/go/imagers E-mail: imagers@kodak.com
2
Revision No. 3
KAF-1301E
Performance Specification
TABLE OF CONTENTS
1.1 Features............................................................................................................................................3
1.2 Description........................................................................................................................................3
1.3 Image Acquisition..............................................................................................................................4
1.4 Charge Transport ..............................................................................................................................4
1.5 Output Structure................................................................................................................................4
1.6 Dark Reference Pixels .......................................................................................................................4
1.7 Dummy Pixels....................................................................................................................................4
2.1 Pin Description..................................................................................................................................5
3.1 Absolute Maximum Ratings................................................................................................................6
3.2 DC Operating Conditions ..................................................................................................................7
3.3 AC Operating Conditions ..................................................................................................................8
3.4 AC Timing Conditions .......................................................................................................................8
3.5 AC Timing Diagrams .........................................................................................................................9
4.1 Performance Specifications ..............................................................................................................10
4.2 Typical Performance Characteristics.................................................................................................11
4.3 Cosmetic Specification.....................................................................................................................12
5.1 Quality Assurance and Reliability......................................................................................................13
5.2 Ordering Information.......................................................................................................................13

Revision Changes .....................................................................................................................................14
Package Drawing .....................................................................................................................................16
FIGURES
Figure 1 Functional Block Diagram............................................................................................................3
Figure 2 Package Pin Designations.............................................................................................................5
Figure 3 Typical Output Load....................................................................................................................7
Figure 4 Timing Diagrams ..........................................................................................................................9
Figure 5 KAF-1301E Spectral Response.................................................................................................11
Eastman Kodak Company - Image Sensor Solutions
For the most current information regarding this product:
Phone: (585) 722-4385 Fax: (585) 477-4947 Web: www.kodak.com/go/imagers E-mail: imagers@kodak.com
3
Revision No. 3
KAF-1301E
Performance Specification

1.1
Features
Y
1.3M Pixel Area CCD
Y
1280H x 1024V (16
m) Pixels
Y
Transparent Gate True Two Phase
Y
Technology (Enhanced Spectral Response)
Y
20.48 mm H x 16.38 mm V Photosensitive Area
Y
2-Phase Register Clocking
Y
Low Dark Current ( <15pA/cm2 @ 25oC)
1.2 Description
The KAF-1301E is a high performance monochrome area
CCD (charge-coupled device) image sensor with 1280H x
1024V photo-active pixels designed for a wide range of
image sensing applications in the 400nm to 1000 nm
wavelength band. Typical applications include military,
scientific, and industrial imaging. A 75dB dynamic range is
possible when operating at room temperature.
The sensor is built with a true two-phase CCD technology.
This technology simplifies the support circuits that drive
the sensor and reduces the dark current without
compromising charge capacity.
The transparent gate results in spectral response increased
ten times at 400nm, compared to a front side illuminated
standard poly silicon gate technology. The sensitivity is
increased 50% over the rest of the visible wavelengths.
Total chip size is 22.0 mm x 17.1 mm and is housed in a 36-
pin package with an integral copper tungsten back plate
providing excellent thermal conductivity.

The sensor consists of 1296 parallel (vertical) CCD shift
registers each 1028 elements long. These registers act as
both the photosensitive elements and as the transport
circuits that allow the image to be sequentially read out of
the sensor. The elements of these registers are arranged
into a 1280 x 1024 photosensitive array surrounded by a
light shielded dark reference of 16 columns and 4 rows.
Parallel (vertical) CCD registers transfer the image one line
at a time into a single 1304 element (horizontal) CCD shift
register. The horizontal register transfers the charge to a
single output amplifier. The output amplifier is a two-stage
source follower that converts the photo-generated charge
to a voltage for each pixel.
KAF-1301E
Usable Active Image Area
1280(H) x 1024(V)
16
m x 16
m pixels
1280 Active Pixels/Line
4 Inactive
H1
H2
4 Inactive
16 Dark
Guard
1.5 Dark
Lines
V1
V2
2.5 Dark
Lines
R
Vog
Vrd
Vss
Vout
Vdd
Sub
Vlg
= scavenging
shift registers
Figure 1 - Functional Block Diagram
Eastman Kodak Company - Image Sensor Solutions
For the most current information regarding this product:
Phone: (585) 722-4385 Fax: (585) 477-4947 Web: www.kodak.com/go/imagers E-mail: imagers@kodak.com
4
Revision No. 3
KAF-1301E
Performance Specification
1.3
Image Acquisition
An electronic representation of an image is formed when incident photons falling on the sensor plane create electron-hole
pairs within the sensor. These photon-induced electrons are collected locally by the formation of potential wells at each
photo-gate or pixel site. The number of electrons collected is linearly dependent on light level and exposure time and non-
linearly dependent on wavelength. When the pixel's capacity is reached, the charge will 'bloom' into vertically adjacent
pixels. During the integration period, the
V1and
V2 register clocks are held at a constant (low) level.
See Figure 5 - Timing Diagrams.
1.4
Charge Transport
Referring again to Figure 5 - Timing Diagrams, the integrated charge from each photo gate is transported to the output using
a two step process. Each line (row) of charge is first transported from the vertical CCD to the horizontal CCD register using
the
V1and
V2 regis ter clocks. The horizontal CCD is presented a new line on the falling edge of
V2 while
H1 is held high.
The horizontal CCD then transports each line, pixel by pixel, to the output structure by alternately clocking the
H1 and
H2
pins in a complementary fashion. On each falling edge of
H1 a new charge packet is transferred onto a floating diffusion
and sensed by the output amplifier.
1.5
Output Structure
Charge presented to the floating diffusion (FD) is converted into a voltage and current amplified in order to drive off-chip
loads. The resulting voltage change seen at the output is linearly related to the amount of charge placed on FD. Once the
signal has been sampled by the system electronics, the reset gate (
R
) is clocked to remove the signal and FD is reset to the
potential applied by VRD. More signal at the floating diffusion reduces the voltage seen at the output pin. To activate the
output structure, an off-chip load must be added to the Vout pin of the device - see Figure 4. The amplifier has a 45 MHz
bandwidth.
1.6
Dark Reference Pixels
Surrounding the peripheral of the device is a border of light shielded pixels. These can be used to to track the dark level if
the temperature of the array is allowed to vary. Each line has 16 trailing pixels that are connected to vertical CCD registers
covered with aluminum. There are also 2.5 dark lines at the start of every frame and 1.5 dark lines at the end of each frame.
That is, the light shield covering the dark reference rows extend into the adjacent photo-active row. This provides better
rejection of unwanted optical signal at the expense of lower response in the adjacent photo-active rows. Under normal
circumstances, these pixels do not respond to light. However, dark reference pixels in close proximity to an active pixel, or
the outer bounds of the chip (including the first two lines out), can scavenge signal depending on light intensity and
wavelength and therefore will not represent the true dark signal.
1.7
Dummy Pixels
Within the horizontal shift register are 4 leading and 4 trailing additional phases that are not associated with a column of
pixels within the vertical register. These pixels contain only horizontal shift register dark current and do not respond to light.
A few leading dummy pixels may scavenge false signal depending on operating conditions.
There are several columns of dummy vertical CCD adjacent to the photo active and light shielded vertical CCD that act to
scavenge unwanted stray signal away from the imaging area. These columns are not connected to the horizontal register so
their presence does not have to be taken into account when clocking out each line. They transfer their charge in a direction
opposite of the photo-active columns and the charge is removed through a connection to Vdd.
Eastman Kodak Company - Image Sensor Solutions
For the most current information regarding this product:
Phone: (585) 722-4385 Fax: (585) 477-4947 Web: www.kodak.com/go/imagers E-mail: imagers@kodak.com
5
Revision No. 3
KAF-1301E
Performance Specification
2.1
Pin Description
Pin
Symbol
Description
Pin
Symbol
Description
3, 4, 33, 34
V2
Vertical (Parallel) CCD Clock -
Phase 2
16
VLG
Amplifier Load Gate
5, 6, 31, 32
V1
Vertical (Parallel) CCD Clock -
Phase 1
17
VOUT
Video Output
2
N/C
No connect
18
VDD
Amplifier Supply
12
VOG
Output Gate
23
H1
Horizontal CCD Clock - Phase 1
13
R
Reset Clock
24
H2
Horizontal CCD Clock - Phase 2
14
VRD
Reset Drain
30
VSUB
Substrate (Ground)
15
VSS
Amplifier Supply Return
All others
N/C
No Connection (open pin)
Notes:
Pin 2 is connected to an internal test node and must be left floating (a real `No Connect').
All other unlabelled pins are `No Connects' and are not connected internally.


V1
V1
V2
V2
H2
H1
VOG
VRD
VLG
VDD
SUB
V2
V1
R
VSS
VOUT
V2
V1
Pixel 1,1
18
17
16
14
15
7
8
9
10
11
4
12
5
3
6
2
1
13
36
34
29
27
23
20
28
21
22
31
26
24
19
30
32
33
35
25
N/C
Figure 3 - Package Pin Designations