GM71C(S)4400C/CL
1,048,576 WORDS x 4BIT
CMOS DYNAMIC RAM
Description
The GM71C(S)4400C/CL is the new generation
dynamic RAM organized 1,048,576 words x 4 bit.
GM71C(S)4400C/CL has realized higher density,
higher performance and various functions by
utilizing advanced CMOS process technology. The
GM71C(S)4400C/CL offers Fast Page Mode as a
high speed access Mode. Multiplexed address
inputs permit the GM71C(S)4400C/CL to be
packaged in a standard 300mil 20(26) pin plastic
SOJ and standard 300mil 20(26) pin plastic
TSOP II. The package size provides high system
bit densities and is compatible with widely
available automated testing and insertion
equipment. System oriented features include single
power supply of 5V+/-10% tolerance, direct
interfacing capability with high performance logic
families such as Schottky TTL.
Features
* 1,048,576 Words x 4 Bit Organization
* Fast Page Mode Capability
* Single Power Supply (5V+/-10%)
* Fast Access Time & Cycle Time
GM71C(S)4400C/CL-60
GM71C(S)4400C/CL-70
GM71C(S)4400C/CL-80
t
RAC
t
CAC
t
RC
t
PC
60
70
80
15
20
20
110
130
150
40
45
50
* Low Power
Active : 605/550/495mW (MAX)
Standby : 5.5mW (CMOS level : MAX)
1.1mW (L-version)
* RAS Only Refresh, CAS before RAS Refresh,
Hidden Refresh Capability
* All inputs and outputs TTL Compatible
* 1024 Refresh Cycles/16ms
* 1024 Refresh Cycles/128ms (L-version)
* Battery Back Up Operation (L-version)
(Unit: ns)
1
Pin Configuration
I/O1
I/O2
WE
RAS
A9
A0
A1
A2
A3
V
CC
6
7
8
9
10
11
12
13
14
15
V
SS
I/O4
I/O3
CAS
OE
A8
A7
A6
A5
A4
20 (26) SOJ
(Top View)
20 (26) TSOP II
(Top View)
LG Semicon Co.,Ltd.
1
2
3
4
5
16
17
18
19
20
6
7
8
9
10
11
12
13
14
15
I/O1
I/O2
WE
RAS
A9
A0
A1
A2
A3
V
CC
V
SS
I/O4
I/O3
CAS
OE
A8
A7
A6
A5
A4
1
2
3
4
5
16
17
18
19
20
6
7
8
9
10
11
12
13
14
15
V
SS
I/O4
I/O3
CAS
OE
A8
A7
A6
A5
A4
I/O1
I/O2
WE
RAS
A9
A0
A1
A2
A3
V
CC
NORMAL TYPE
REVERSE TYPE
LG Semicon
GM71C(S)4400C/CL
2
Pin Description
Pin
Function
Pin
Function
A0-A9
A0-A9
I/O1-I/O4
RAS
CAS
V
CC
V
SS
Address Inputs
Refresh Address Inputs
Data Input / Data Output
Row Address Strobe
Column Address Strobe
Read/Write Enable
Output Enable
Power (+5V)
Ground
Ordering Information
Type No.
Access Time
Package
GM71C(S)4400CJ/CLJ-60
GM71C(S)4400CJ/CLJ-70
GM71C(S)4400CJ/CLJ-80
300 Mil, 20 (26) Pin
Plastic SOJ
300 Mil, 20 (26) Pin
Plastic TSOP II
(Normal Type)
Absolute Maximum Ratings*
Symbol
Parameter
Rating
Unit
T
A
T
STG
V
IN
/V
OUT
V
CC
I
OUT
0 ~ 70
-55 ~ 125
-1.0 ~ 7.0
-1.0 ~ 7.0
50
Ambient Temperature under Bias
Storage Temperature (Plastic)
Voltage on any Pin Relative to V
SS
Voltage on V
CC
Relative to V
SS
Short Circuit Output Current
C
C
V
V
mA
P
D
1.0
Power Dissipation
W
*Note: Operation at or above Absolute Maximum Ratings can adversely affect device reliability.
WE
GM71C(S)4400CT/CLT-60
GM71C(S)4400CT/CLT-70
GM71C(S)4400CT/CLT-80
300 Mil, 20 (26) Pin
Plastic TSOP II
(Reverse Type)
GM71C(S)4400CR/CLR-60
GM71C(S)4400CR/CLR-70
GM71C(S)4400CR/CLR-80
Recommended DC Operating Conditions (T
A
= 0 ~ 70C)
Symbol
Parameter
Unit
V
CC
V
IH
V
IL
Supply Voltage
Input High Voltage
Input Low Voltage (I/O Pin)
V
V
V
Max
5.5
6.5
0.8
Typ
5.0
-
-
Min
4.5
2.4
-1.0
V
IL
Input Low Voltage (Others)
V
0.8
-
-2.0
60
ns
70
ns
80
ns
OE
60
ns
70
ns
80
ns
60
ns
70
ns
80
ns
LG Semicon
GM71C(S)4400C/CL
3
DC Electrical Characteristics (V
CC
= 5V+/-10%, T
A
= 0 ~ 70C)
Note: 1. I
CC
depends on output load condition when the device is selected. I
CC
(max) is specified at the output
open condition.
2. Address can be changed once or less while RAS = V
IL
.
3. Address can be changed once or less while CAS = V
IH
.
4. L-version.
5. V
CC
-0.2V<=V
IH
<=6.5V, 0V<=V
IL
<=0.2V.
Symbol
Parameter
Note
V
OH
V
OL
Output Level
Output "H" Level Voltage (I
OUT
= -5mA)
Unit
V
V
Max
V
CC
0.4
Min
2.4
0
Output Level
Output "L" Level Voltage (I
OUT
= 4.2mA)
I
CC1
mA
110
-
Operating Current
Average Power Supply Operating Current
(RAS, CAS, Address Cycling: t
RC
= t
RC
min)
60ns
70ns
80ns
100
90
-
-
1, 2
I
CC2
mA
Standby Current (TTL)
Power Supply Standby Current
(RAS, CAS= V
IH
, D
OUT
= High-Z)
2
-
I
CC3
mA
2
I
CC4
mA
1, 3
110
-
60ns
70ns
80ns
100
90
-
-
110
-
60ns
70ns
80ns
100
90
-
-
I
CC5
mA
1
-
I
CC6
mA
CAS-before-RAS Refresh Current
(t
RC
= t
RC
min)
110
-
60ns
70ns
80ns
100
90
-
-
I
CC7
uA
300
-
4, 5
uA
200
-
5
I
CC8
mA
Standby Current RAS = V
IH
CAS = V
IL
D
OUT
= Enable
5
-
1
I
I(L)
uA
10
-10
I
O(L)
uA
10
-10
Input Leakage Current
Any Input (0V<=V
IN
<=7V)
Output Leakage Current
(D
OUT
is Disabled, 0V<=V
OUT
<=7V)
RAS-Only Refresh Current
Average Power Supply Current
RAS-Only Refresh Mode
(RAS Cycling, CAS = V
IH
, t
RC
= t
RC
min)
Fast Page Mode Current
Average Power Supply Current
Fast Page Mode
(RAS = V
IL
, CAS, Address Cycling: t
PC
= t
PC
min)
Standby Current (CMOS)
Power Supply Standby Current
(RAS, CAS >= V
CC
- 0.2V , D
OUT
=High-Z)
Battery Back Up Current (Standby with CBR Refresh)
(t
RC
=125us, t
RAS
<=1us, WE=V
IH
, CAS=V
IL
,
OE, Address and D
IN
=V
IH
or V
IL
, D
OUT
=High-Z)
4, 5
LG Semicon
GM71C(S)4400C/CL
4
Read, Write, Read-Modify-Write and Refresh Cycles (Common Parameters)
Symbol
Parameter
Note
Max
Unit
Min
Max
Min
Max
Min
t
RC
Random Read or Write Cycle Time
110
-
130
-
150
-
ns
t
RP
RAS Precharge Time
40
-
50
-
60
-
ns
t
RAS
RAS Pulse Width
60
10,000
70
10,000
80
10,000
ns
t
CAS
CAS Pulse Width
15
10,000
10,000
10,000
ns
20
20
t
ASR
Row Address Set-up Time
0
-
-
-
ns
0
0
t
RAH
Row Address Hold Time
10
-
-
-
ns
10
10
t
ASC
Column Address Set-up Time
0
-
-
-
ns
0
0
t
CAH
Column Address Hold Time
15
-
-
-
ns
15
15
t
RCD
RAS to CAS Delay Time
20
45
50
60
ns
20
20
8
t
RAD
RAS to Column Address Delay Time
15
30
35
40
ns
15
15
9
t
RSH
RAS Hold Time
15
-
-
-
ns
20
20
t
CSH
CAS Hold Time
60
-
-
-
ns
70
80
t
CRP
CAS to RAS Precharge Time
10
-
-
-
ns
10
10
t
T
Transition Time
(Rise and Fall)
3
50
50
50
ns
3
3
7
t
REF
Refresh Period
-
16
16
16
ms
-
-
Capacitance (V
CC
= 5V+/-10%, T
A
= 25C)
Symbol
Parameter
Note
C
I1
C
I2
C
I/O
Input Capacitance (Address)
Input Capacitance (Clocks)
Data Input, Output Capacitance (Data-In, Out)
1
1
1, 2
Unit
Max
5
7
10
Min
-
-
-
Note: 1. Capacitance measured with Boonton Meter or effective capacitance measuring method.
2. CAS = V
IH
to disable D
OUT
.
AC Characteristics (V
CC
= 5V+/-10%, T
A
= 0 ~ 70C, Notes 1, 14, 15, 16)
-
128
128
128
ms
-
-
Refresh Period (L-version)
t
ODD
OE to D
IN
Delay Time
15
-
-
-
ns
20
20
t
DZO
OE Delay Time from D
IN
0
-
-
-
ns
0
0
t
DZC
CAS Set-up Time from D
IN
0
-
-
-
ns
0
0
GM71C(S)4400
C/CL-60
GM71C(S)4400
C/CL-70
GM71C(S)4400
C/CL-80
Test Conditions
Input rise and fall times: 5ns
Input, output timing reference levels: 0.8V, 2.4V
Output load : 2 TTL gate + C
L
(100)
(Including scope and jig)
LG Semicon
GM71C(S)4400C/CL
Read Cycle
Symbol
Parameter
Note
Max
Unit
Min
Max
Min
Max
Min
t
RAC
Access Time from RAS
-
60
-
70
-
80
ns
t
CAC
Access Time from CAS
-
15
-
20
-
20
ns
t
AA
Access Time from Address
-
30
-
35
-
40
ns
t
RCS
Read Command Setup Time
0
-
0
-
0
-
ns
t
RCH
Read Command Hold Time to CAS
0
-
-
-
ns
0
0
t
RRH
Read Command Hold Time to RAS
0
-
-
-
ns
0
0
t
RAL
Column Address to RAS Lead Time
30
-
-
-
ns
35
40
5
2,3,17
3, 4,
13, 17
3, 5,
13, 17
t
OFF1
Output Buffer Turn-off Time
15
15
15
ns
6
Write Cycle
Symbol
Parameter
Note
Max
Unit
Min
Max
Min
Max
Min
t
WCS
Write Command Setup Time
0
-
0
-
0
-
ns
t
WCH
Write Command Hold Time
15
-
15
-
15
-
ns
t
WP
Write Command Pulse Width
10
-
10
-
10
-
ns
t
RWL
Write Command to RAS Lead Time
15
-
20
-
20
-
ns
t
CWL
Write Command to CAS Lead Time
15
-
-
-
ns
20
20
t
DS
Data-in Setup Time
0
-
-
-
ns
0
0
t
DH
Data-in Hold Time
15
-
-
-
ns
15
15
11
11
10
0
0
0
t
OAC
Access Time from OE
-
15
-
20
-
20
ns
3,17
t
OFF2
Output Buffer Turn-off Time from OE
15
15
15
ns
6
0
0
0
t
CDD
CAS to D
IN
Delay Time
-
-
-
ns
18
15
20
20
18
GM71C(S)4400
C/CL-60
GM71C(S)4400
C/CL-70
GM71C(S)4400
C/CL-80
t
OEP
OE Pulse width
-
-
-
ns
15
20
20
GM71C(S)4400
C/CL-60
GM71C(S)4400
C/CL-70
GM71C(S)4400
C/CL-80
PDF 
ZIP