1
LTC1538-AUX/LTC1539
Dual High Efficiency,
Low Noise, Synchronous
Step-Down Switching Regulators
Figure 1. High Efficiency Dual 5V/3V Step-Down Converter
BOOST 2
BOOST 1
TGL2
TGS2
SW2
BG2
SENSE
+
2
SENSE
2
V
OSENSE2
I
TH2
TGL1
M3*
M1
M2
TGS1
D1
MBR140T3
V
OUT1
5V
3.5A
V
OUT2
3.3V
3.5A
L1
10
H
SW1
BG1
LTC1539
SENSE
+
1
SENSE
1
C
SS1
0.1
F
C
C1
1000pF
C
OUT1
220
F
10V
R
SENSE1
0.03
R
SENSE2
0.03
C
OUT
220
F
10V
R
C1
10k
I
TH1
RUN/SS2
PGND
SGND
V
PROG2
C
DSC
INTV
CC
D
B2
, CMDSH-3
D
B1
, CMDSH-3
V
IN
V
PROG1
RUN/SS1
D2
MBR140T3
C
B1
0.1
F
C
B2
,
0.1
F
4.7
F
16V
M6*
1538 F01
M4
1000pF
1000pF
C
OSC
56pF
C
SS2
0.1
F
C
C1A
220pF
M1, M2, M4, M5: Si4412DY
M3, M6: IRLML2803
*NOT REQUIRED FOR LTC1538-AUX
C
C2A
470pF
C
C2
1000pF
R
C2
10k
+
L2
10
H
V
IN
5.2V TO 28V
5V STANDBY
+
+
C
IN
22
F
35V
4
+
BOLD LINES INDICATE HIGH CURRENT PATHS
M5
TYPICAL APPLICATIO
N
U
s
Maintains Constant Frequency at Low Output Currents
s
Dual N-Channel MOSFET Synchronous Drive
s
Programmable Fixed Frequency (PLL Lockable)
s
Wide V
IN
Range: 3.5V to 36V Operation
s
Ultrahigh Efficiency
s
Very Low Dropout Operation: 99% Duty Cycle
s
Low Dropout, 0.5A Linear Regulator for VPP
Generation or Low Noise Audio Supply
s
Built-In Power-On Reset Timer
s
Programmable Soft Start
s
Low-Battery Detector
s
Remote Output Voltage Sense
s
Foldback Current Limiting (Optional)
s
Pin Selectable Output Voltage
s
5V Standby Regulator Active in Shutdown: I
Q
< 200
A
s
Output Voltages from 1.19V to 9V
s
Available in 28- and 36-Lead SSOP Packages
The LTC
1538-AUX/LTC1539 are dual, synchronous step-
down switching regulator controllers which drive external
N-channel power MOSFETs in a phase-lockable fixed
frequency architecture. The Adaptive Power
TM
output stage
selectively drives two N-channel MOSFETs at frequencies
up to 400kHz while reducing switching losses to maintain
high efficiencies at low output currents.
An auxiliary 0.5A linear regulator using an external PNP
pass device provides a low noise, low dropout voltage
source. A secondary winding feedback control pin (SFB1)
guarantees regulation regardless of load on the main
output by forcing continuous operation.
A 5V/20mA regulator, internal 1.19V reference and an
uncommitted comparator remain active when both con-
trollers are shut down. A power-on reset timer (POR) is
included which generates a signal delayed by 65536/f
CLK
(typ 300ms) after the controller's output is within 5% of
the regulated first voltage. Internal resistive dividers pro-
vide pin selectable output voltages with remote sense
capability on one of the two outputs.
The operating current levels are user-programmable via
external current sense resistors. Wide input supply range
allows operation from 3.5V to 30V (36V maximum).
FEATURES
DESCRIPTIO
N
U
, LTC and LT are registered trademarks of Linear Technology Corporation.
Adaptive Power is a trademark of Linear Technology Corporation.
s
Notebook and Palmtop Computers, PDAs
s
Portable Instruments
s
Battery-Operated Devices
s
DC Power Distribution Systems
APPLICATIO
N
S
U
2
LTC1538-AUX/LTC1539
ABSOLUTE
M
AXI
M
U
M
RATINGS
W
W
W
U
Input Supply Voltage (V
IN
)....................... 36V to 0.3V
Topside Driver Voltage (BOOST 1, 2) ...... 42V to 0.3V
Peak Switch Voltage > 10
s (SW 1, 2) ... V
IN
+ 5V to 5V
EXTV
CC
Voltage........................................ 10V to 0.3V
POR1, LBO Voltages ................................ 12V to 0.3V
AUXFB Voltage ........................................ 20V to 0.3V
AUXDR Voltage ........................................ 28V to 0.3V
SENSE
+
1, SENSE
+
2, SENSE
1, SENSE
2,
V
OSENSE2
Voltages ................... INTV
CC
+ 0.3V to 0.3V
V
PROG1
, V
PROG2
Voltages .................... INTV
CC
to 0.3V
PLL LPF, I
TH1
, I
TH2
Voltages ................... 2.7V to 0.3V
AUXON, PLLIN, SFB1,
RUN/SS1, RUN/SS2, LBI, Voltages ......... 10V to 0.3V
Peak Output Current < 10
s (TGL1, 2, BG1, 2) ......... 2A
Peak Output Current < 10
s (TGS1, 2) .............. 250mA
INTV
CC
Output Current ........................................ 50mA
Operating Temperature Range
LTC1538-AUXCG/LTC1539CGW ............ O
C to 70
C
LTC1538-AUXIG/LTC1539IGW .......... 40
C to 85
C
Junction Temperature (Note 1) ............................ 125
C
Storage Temperature Range ................ 65
C to 150
C
Lead Temperature (Soldering, 10 sec) ................. 300
C
PACKAGE/ORDER I
N
FOR
M
ATIO
N
W
U
U
ORDER
PART NUMBER
LTC1538CG-AUX
LTC1538IG-AUX
ORDER
PART NUMBER
LTC1539CGW
LTC1539IGW
T
JMAX
= 125
C,
JA
= 95
C/ W
1
2
3
4
5
6
7
8
9
10
11
12
13
14
TOP VIEW
G PACKAGE
28-LEAD PLASTIC SSOP
28
27
26
25
24
23
22
21
20
19
18
17
16
15
BOOST 1
RUN/SS1
SENSE
+
1
SENSE
1
V
PROG1
I
TH1
C
OSC
SGND
SFB1
I
TH2
V
OSENSE2
SENSE
2
SENSE
+
2
RUN/SS2
TGL1
SW1
V
IN
BG1
INTV
CC
/5V
PGND
BG2
EXTV
CC
SW2
TGL2
BOOST 2
AUXON
AUXFB
AUXDR
T
JMAX
= 125
C,
JA
= 85
C/ W
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
TOP VIEW
GW PACKAGE
36-LEAD PLASTIC SSOP
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
RUN/SS1
SENSE
+
1
SENSE
1
V
PROG1
I
TH1
POR1
C
OSC
SGND
LBI
LBO
SFB1
I
TH2
V
PROG2
V
OSENSE2
SENSE
2
SENSE
+
2
RUN/SS2
AUXDR
PLL LPF
PLLIN
BOOST 1
TGL1
SW1
TGS1
V
IN
BG1
INTV
CC
/5V
PGND
BG2
EXTV
CC
TGS2
SW2
TGL2
BOOST 2
AUXON
AUXFB
Consult factory for Military grade parts.
3
LTC1538-AUX/LTC1539
ELECTRICAL CHARACTERISTICS
T
A
= 25
C, V
IN
= 15V, V
RUN/SS1,2
= 5V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Main Control Loops
I
IN
V
OSENSE2
Feedback Current
V
PROG1,
V
PROG2
Pins Open (Note 2)
10
50
nA
V
OUT1,2
Regulated Output Voltage
(Note 2)
1.19V (Adjustable) Selected
V
PROG1,
V
PROG2
Pins Open
q
1.178
1.19
1.202
V
3.3V Selected
V
PROG1,
V
PROG2
= 0V
q
3.220
3.30
3.380
V
5V Selected
V
PROG1,
V
PROG2
= INTV
CC
q
4.900
5.00
5.100
V
V
LINEREG1,2
Reference Voltage Line Regulation
V
IN
= 3.6V to 20V (Note 2), V
PROG1,2
Pins Open
0.002
0.01
%/V
V
LOADREG1,2
Output Voltage Load Regulation
I
TH1,2
Sinking 5
A (Note 2)
q
0.5
0.8
%
I
TH1,2
Sourcing 5
A
q
0.5
0.8
%
V
SFB1
Secondary Feedback Threshold
V
SFB1
Ramping Negative
q
1.16
1.19
1.22
V
I
SFB1
Secondary Feedback Current
V
SFB1
= 1.5V
1
2
A
V
OVL
Output Overvoltage Lockout
V
PROG1,2
Pin Open, SENSE
1
and V
OSENSE2
Pins
1.24
1.28
1.32
V
I
PROG1,2
V
PROG1,2
Input Current
0.5V > V
PROG1,2
3
6
A
INTV
CC
0.5V < V
PROG1,2
< INTV
CC
3
6
A
I
Q
Input DC Supply Current
EXTV
CC
= 5V (Note 3)
Normal Mode
3.6V < V
IN
< 30V, V
AUXON
= 0V
320
A
Shutdown
V
RUN/SS1,2
= 0V, 3.6V < V
IN
< 15V
70
200
A
V
RUN/SS1,2
Run Pin Threshold
q
0.8
1.3
2
V
I
RUN/SS1,2
Soft Start Current Source
V
RUN/SS1,2
= 0V
1.5
3
4.5
A
V
SENSE(MAX)
Maximum Current Sense Threshold
V
OSENSE1,2
= 0V, 5V V
PROG1,2
= Pins Open
130
150
180
mV
TGL1, 2 t
r
, t
f
TGL1, TGL2 Transition Time
Rise Time
C
LOAD
= 3000pF
50
150
ns
Fall Time
C
LOAD
= 3000pF
50
150
ns
TGS1, 2 t
r
, t
f
TGS1, TGS2 Transition Time
Rise Time
C
LOAD
= 500pF
100
150
ns
Fall Time
C
LOAD
= 500pF
50
150
ns
BG1, 2 t
r
, t
f
BG1, BG2 Transition Time
Rise Time
C
LOAD
= 3000pF
50
150
ns
Fall Time
C
LOAD
= 3000pF
50
150
ns
Internal V
CC
Regulator 5V Standby
V
INTVCC
Internal V
CC
Voltage
6V < V
IN
< 30V, V
EXTVCC
= 4V
q
4.8
5.0
5.2
V
V
LDO
INT
INTV
CC
Load Regulation
INTV
CC
= 20mA, V
EXTVCC
= 4V
0.2
1
%
V
LDO
EXT
EXTV
CC
Voltage Drop
INTV
CC
= 20mA, V
EXTVCC
= 5V
170
300
mV
V
EXTVCC
EXTV
CC
Switchover Voltage
INTV
CC
= 20mA, EXTV
CC
Ramping Positive
q
4.5
4.7
V
Oscillator and Phase-Locked Loop
f
OSC
Oscillator Frequency
C
OSC
= 100pF, LTC1539: PLL LPF = 0V (Note 4)
112
125
138
kHz
VCO High
LTC1539, V
PLLLPF
= 2.4V
200
240
kHz
R
PLLIN
PLLIN
Input Resistance
50
k
I
PLLLPF
Phase Detector Output Current
LTC1539
Sinking Capability
f
PLLIN
< f
OSC
10
15
20
A
Sourcing Capability
f
PLLIN
> f
OSC
10
15
20
A
Power-On Reset
V
SATPOR1
POR1 Saturation Voltage
I
POR1
= 1.6mA, V
OSENSE1
= 1V,
0.6
1
V
V
PROG1
Pins Open
I
LPOR1
POR1 Leakage
V
POR1
= 12V, V
OSENSE1
= 1.19V, V
PROG1
Pin Open
0.2
1
A
V
THPOR1
POR1 Trip Voltage
V
PROG1
Pin Open % of V
REF
V
OSENSE1
Ramping Negative
11
7.5
4
%
t
DPOR1
POR1 Delay
V
PROG1
Pin Open
65536
Cycles
4
LTC1538-AUX/LTC1539
ELECTRICAL CHARACTERISTICS
T
A
= 25
C, V
IN
= 15V, V
RUN/SS1,2
= 5V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Low-Battery Comparator
V
SATLBO
LBO Saturation Voltage
I
LBO
= 1.6mA, V
LBI
= 1.1V
0.6
1
V
I
LLBO
LBO Leakage
V
LBO
= 12V, V
LBI
= 1.4V
q
0.01
1
A
V
THLB1
LBI Trip Voltage
High to Low Transition on LBO
q
1.16
1.19
1.22
V
I
INLB1
LBI Input Current
V
LBI
= 1.19V
q
1
50
nA
V
HYSLBO
LBO Hysteresis
20
mV
Auxiliary Regulator/Comparator
I
AUXDR
AUXDR Current
V
EXTVCC
= 0V
Max Current Sinking Capability
V
AUXDR
= 4V, V
AUXFB
= 1.0V, V
AUXON
= 5V
10
15
mA
Control Current
V
AUXDR
= 5V, V
AUXFB
= 1.5V, V
AUXON
= 5V
1
5
A
Leakage when OFF
V
AUXDR
= 24V, V
AUXFB
= 1.5V, V
AUXON
= 0V
0.01
1
A
I
INAUXFB
AUXFB Input Current
V
AUXFB
= 1.19V, V
AUXON
= 5V
0.01
1
A
I
INAUXON
AUXON Input Current
V
AUXON
= 5V
0.01
1
A
V
THAUXON
AUXON Trip Voltage
V
AUXDR
= 4V, V
AUXFB
= 1V
1.0
1.19
1.4
V
V
SATAUXDR
AUXDR Saturation Voltage
I
AUXDR
= 1.6mA, V
AUXFB
= 1V, V
AUXON
= 5V
0.4
0.8
V
V
AUXFB
AUXFB Voltage
V
AUXON
= 5V, 11V < V
AUXDR
< 24V (Note 5)
q
11.5
12.00
12.5
V
V
AUXON
= 5V, 3V < V
AUXDR
< 7V
q
1.14
1.19
1.24
V
V
THAUXDR
AUXFB Divider Disconnect Voltage
V
AUXON
= 5V (Note 5); Ramping Negative
7.5
8.5
9.5
V
The
q
denotes specifications which apply over the full operating
temperature range.
Note 1: T
J
is calculated from the ambient temperature T
A
and power
dissipation P
D
according to the following formulas:
LTC1538CG-AUX: T
J
= T
A
+ (P
D
)(95
C/W)
LTC1539CGW: T
J
= T
A
+ (P
D
)(85
C/W)
Note 2: The LTC1538-AUX and LTC1539 are tested in a feedback loop
which servos V
OSENSE1,2
to the balance point for the error amplifier
(V
ITH1,2
= 1.19V).
Note 3: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency. See Applications Information.
Note 4: Oscillator frequency is tested by measuring the C
OSC
charge and
discharge current (I
OSC
) and applying the formula:
f
OSC
(kHz) = 8.4(10
8
)[C
OSC
(pF) + 11]
-1
(1/I
CHG
+ 1/I
DISC
)
1
Note 5: The auxiliary regulator is tested in a feedback loop which servos
V
AUXFB
to the balance point for the error amplifier. For applications with
V
AUXDR
> 9.5V, V
AUXFB
uses an internal resistive divider. See Applications
Information section.
5
LTC1538-AUX/LTC1539
TYPICAL PERFOR
M
A
N
CE CHARACTERISTICS
U
W
Adaptive Power and Burst Mode are trademarks of Linear Technology Corporation.
INPUT VOLTAGE (V)
0
70
EFFICIENCY (%)
75
80
85
90
100
5
10
15
20
1538/39 G01
25
30
95
I
LOAD
= 1A
I
LOAD
= 100mA
V
OUT
= 3.3V
LOAD CURRENT (A)
0.001
50
EFFICIENCY (%)
55
65
70
75
100
85
0.01
0.1
1
1538/39 G03
60
90
95
80
10
Adaptive Power
TM
MODE
CONTINUOUS
MODE
V
IN
= 10V
V
OUT
= 5V
R
SENSE
= 0.33
Burst Mode
TM
OPERATION
Efficiency vs Load Current
Efficiency vs Input Voltage:
V
OUT
= 3.3V
INPUT VOLTAGE (V)
0
70
EFFICIENCY (%)
75
80
85
90
100
5
10
15
20
1538/39 G02
25
30
95
I
LOAD
= 1A
I
LOAD
= 100mA
V
OUT
= 5V
Efficiency vs Input Voltage:
V
OUT
= 5V
V
ITH
Pin Voltage vs Output Current
V
IN
V
OUT
Dropout Voltage vs
Load Current
Load Regulation
LOAD CURRENT (A)
0
0
V
IN
V
OUT
(V)
0.2
0.1
0.3
0.4
0.5
0.5
1.0
1.5
2.0
1538/39 G04
2.5
3.0
R
SENSE
= 0.033
V
OUT
DROP OF 5%
LOAD CURRENT (A)
0
V
OUT
(%)
0
0.5
1.0
1.5
2.0
1538/39 G05
2.5
3.0
0.25
0.50
0.75
1.00
1.25
1.50
R
SENSE
= 0.033
OUTPUT CURRENT (%)
0
V
ITH
(V)
1.0
2.0
3.0
0.5
1.5
2.5
20
40
60
80
1538/39 G06
100
10
0
30
50
70
90
Burst Mode
OPERATION
CONTINUOUS/
Adaptive Power
MODE
EXTV
CC
Switch Drop
vs INTV
CC
Load Current
Input Supply Current
vs Input Voltage
INTV
CC
Regulation
vs INTV
CC
Load Current
INPUT VOLTAGE (V)
0
0
SUPPLY CURRENT (mA)
0.5
1.0
1.5
2.0
2.5
0
5V STANDBY CURRENT (
A)
20
40
60
80
100
5
10
15
20
LTC1538/39 TPC07
25
30
5V, 3.3V OFF
5V STANDBY
5V, 3.3V ON
5V OFF, 3.3V ON
5V ON, 3.3V OFF
INTV
CC
LOAD CURRENT (mA)
0
INTV
CC
PERCENT CHANGE, NORMALIZED (V)
0
1
50
40
1538/39 G08
1
2
10
20
30
2
70
C
25
C
EXTV
CC
= 0V
INTV
CC
LOAD CURRENT (mA)
0
EXTV
CC
INTV
CC
(mV) 200
300
20
1538/39 G09
100
0
5
10
15
25
30
45
C
25
C
70
C
6
LTC1538-AUX/LTC1539
TYPICAL PERFOR
M
A
N
CE CHARACTERISTICS
U
W
SFB1 Pin Current vs
Temperature
Normalized Oscillator Frequency
vs Temperature
TEMPERATURE (
C)
40
FREQUENCY (%)
5
10
35
85
1538/39 G10
f
O
15
10
60
110
135
5
10
TEMPERATURE (
C)
40
SFB CURRENT (
A) 1.50
0.25
0
35
85
1538/39 G12
0.75
1.00
15
10
60
110
135
1.25
1.50
Transient Response
TEMPERATURE (
C)
40
146
CURRENT SENSE THRESHOLD (mV)
148
150
152
154
15
10
35
60
1538/39 G13
85
110
135
Auxiliary Regulator Load
Regulation
AUXILIARY LOAD CURRENT (mA)
0
AUXILIARY OUTPUT VOLTAGE (V)
12.0
12.1
12.2
160
1538/39 G18
11.9
11.8
11.7
40
80
120
200
EXTERNAL PNP: 2N2907A
V
OUT
50mV/DIV
I
LOAD
= 1A to 3A
1538/39 G15
RUN/SS Pin Current vs
Temperature
TEMPERATURE (
C)
40
0
RUN/SS CURRENT (
A)
1
2
3
4
15
10
35
60
1538/39 G11
85
110
135
Transient Response
Soft Start: Load Current vs Time
V
OUT
50mV/DIV
I
LOAD
= 50mA to 1A
1538/39 G14
1538/39 G17
Burst Mode Operation
V
OUT
20mV/DIV
V
OUT
200mV/DIV
I
LOAD
= 50mA
1538/39 G16
RUN/SS
5V/DIV
INDUCTOR
CURRENT
1A/DIV
Maximum Current Comparator
Threshold Voltage vs Temp
7
LTC1538-AUX/LTC1539
TYPICAL PERFOR
M
A
N
CE CHARACTERISTICS
U
W
Auxiliary Regulator PSRR
Auxiliary Regulator Sink
Current Available
AUX DR VOLTAGE (V)
0
0
AUX DR CURRENT (mA)
5
10
15
20
2
4
6
8
1538/39 G19
10
12
14
16
FREQUENCY (kHz)
10
PSRR (dB)
100
90
80
70
60
50
40
30
20
10
0
100
1000
1538/39 G20
I
L
= 10mA
I
L
= 100mA
PI
N
FU
N
CTIO
N
S
U
U
U
V
IN
: Main Supply Pin. Must be closely decoupled to the
IC's signal ground pin.
INTV
CC
/5V STANDBY: Output of the Internal 5V Regulator
and the EXTV
CC
Switch. The driver and control circuits are
powered from this voltage. Must be closely decoupled to
power ground with a minimum of 2.2
F tantalum or
electrolytic capacitor. The INTV
CC
regulator remains on
when both RUN/SS1 and RUN/SS2 are low. Refer to the
LTC1438/LTC1439 for applications which do not require a
5V standby regulator.
EXTV
CC
: External Power Input to an Internal Switch. This
switch closes and supplies INTV
CC,
bypassing the internal
low dropout regulator whenever EXTV
CC
is higher than 4.8V.
Connect this pin to V
OUT
of the controller with the higher
output voltage. Do not exceed 10V on this pin. See EXTV
CC
connection in Applications Information section.
BOOST 1, BOOST 2: Supplies to the Topside Floating Drivers.
The bootstrap capacitors are returned to these pins. Voltage
swing at these pins is from INTV
CC
to V
IN
+ INTV
CC
.
SW1, SW2: Switch Node Connections to Inductors. Volt-
age swing at these pins is from a Schottky diode (external)
voltage drop below ground to V
IN
.
SGND: Small Signal Ground. Common to both controllers,
must be routed separately from high current grounds to
the () terminals of the C
OUT
capacitors.
PGND: Driver Power Ground. Connects to sources of
bottom N-channel MOSFETs and the () terminals of C
IN
.
SENSE
1, SENSE
2: Connects to the () input for the
current comparators. SENSE
1 is internally connected to
the first controllers V
OUT
sensing point preventing true
remote output voltage sensing operation. The first con-
troller can only be used as a 3.3V or 5.0V regulator
controlled by the V
PROG1
pin. The second controller can be
set to a 3.3V, 5.0V or an adjustable regulator controlled by
the V
PROG2
pin (see Table 1).
Table 1. Output Voltage Table
LTC1538-AUX
LTC1539
CONTROLLER 1
5V or 3.3V Only, Secondary Feedback Loop
CONTROLLER 2
Adjustable Only
5V/3.3V/Adjustable
Remote Sensing
Remote Sensing
POR1 Output
8
LTC1538-AUX/LTC1539
BG1, BG2: High Current Gate Drive Outputs for Bottom N-
Channel MOSFETs. Voltage swing at these pins is from
ground to INTV
CC
.
SFB1: Secondary Winding Feedback Input. This input acts
only on the first controller and is normally connected to a
feedback resistive divider from the secondary winding.
Pulling this pin below 1.19V will force continuous syn-
chronous operation for the first controller. This pin should
be tied to: ground to force continuous operation; INTV
CC
in applications that don't use a secondary winding; and a
resistive divider from the output in applications using a
secondary winding.
POR1: This output is a drain of an N-channel pull-down.
This pin sinks current when the output voltage of the first
controller drops 7.5% below its regulated voltage and re-
leases 65536 oscillator cycles after the output voltage of the
first controller rises to within 5% value of its regulated value.
The POR1 output is asserted when RUN/SS1 and RUN/SS2
are both low, independent of the V
OUT1
.
LBO: This output is a drain of an N-channel pull-down. This
pin will sink current when the LBI pin goes below 1.19V
irrespective of the RUN/SS pin voltage.
LBI: The (+) input of a comparator which can be used as
a low-battery voltage detector irrespective of the RUN/SS
pin voltage. The () input is connected to the 1.19V
internal reference.
PLLIN: External Synchronizing Input to Phase Detector.
This pin is internally terminated to SGND with 50k
. Tie
this pin to SGND in applications which do not use the
phase-locked loop.
PLL LPF: Output of Phase Detector and Control Input of
Oscillator. Normally a series RC lowpass filter network is
connected from this pin to ground. Tie this pin to SGND in
applications which do not use the phase-locked loop. Can
be driven by a 0V to 2.4V logic signal for a frequency
shifting option.
AUXFB: Feedback Input to the Auxiliary Regulator/Com-
parator. When used as a linear regulator, this input can
either be connected to an external resistive divider or
directly to the collector of the external PNP pass device for
12V operation. When used as a comparator, this is the
PI
N
FU
N
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SENSE
+
1, SENSE
+
2: The (+) Input to Each Current
Comparator. Built-in offsets between SENSE
1 and
SENSE
+
1 pins in conjunction with R
SENSE1
set the current
trip threshold (same for second controller).
V
OSENSE2
: Receives the remotely sensed feedback voltage for
the second controller either from the output directly or from
an external resistive divider across the output . The V
PROG2
pin determines which point. V
OSENSE2
must connect to.
V
PROG1
, V
PROG2
: Programs Internal Voltage Attenuators
for Output Voltage Sensing. The voltage sensing for the
first controller is internally connected to SENSE
1 while
the V
OSENSE2
pin allows for remote sensing for the second
controller. For V
PROG1
, V
PROG2
< V
INTVCC
/3, the divider is
set for an output voltage of 3.3V. With V
PROG1
,
V
PROG2
> V
INTVCC
/1.5 the divider is set for an output
voltage of 5V. Leaving
V
PROG2
open (DC) allows the output
voltage of the second controller to be set by an external
resistive divider connected to V
OSENSE2
.
C
OSC
: External capacitor C
OSC
from this pin to ground sets
the operating frequency.
I
TH1
, I
TH2
: Error Amplifier Compensation Point. Each as-
sociated current comparator threshold increases with this
control voltage.
RUN/SS1, RUN/SS2: Combination of Soft Start and RUN
Control Inputs. A capacitor to ground at each of these pins
sets the ramp time to full current output. The time is
approximately 0.5s/
F. Forcing either of these pins below
1.3V causes the IC to shut down the circuitry required for
that particular controller. Forcing both of these pins below
1.3V causes the device to shut down both controllers,
leaving the 5V standby regulator, internal reference and a
comparator active. Refer to the LTC1438/LTC1439 for appli-
cations which do not require a 5V standby regulator.
TGL1, TGL2: High Current Gate Drives for Main Top
N-Channel MOSFET. These are the outputs of floating
drivers with a voltage swing equal to INTV
CC
superim-
posed on the switch node voltage SW1 and SW2.
TGS1, TGS2: Gate Drives for Small Top N-Channel
MOSFET. These are the outputs of floating drivers with a
voltage swing equal to INTV
CC
superimposed on the
switch node voltage SW. Leaving TGS1 or TGS2 open
invokes Burst Mode
operation for that controller.
9
LTC1538-AUX/LTC1539
PI
N
FU
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noninverting input of a comparator whose inverting input
is tied to the internal 1.19V reference. See Auxiliary Regu-
lator Application section.
AUXON: Pulling this pin high turns on the auxiliary regu-
lator/comparator. The threshold is 1.19V. This is a conve-
nient linear power supply logic-controlled on/off input.
AUXDR: Open Drain Output of the Auxiliary Regulator/
Comparator. The base of an external PNP device is con-
nected to this pin when used as a linear regulator. An
external pull-up resistor is required for use as a compara-
tor. A voltage > 9.5V on AUXDR causes the internal 12V
resistive divider to be connected in series with the AUXFB pin.
FU
N
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LTC1539 shown, see specific package pinout for availability of specific functions.
PHASE
DETECTOR
OSCILLATOR
50k
PLLIN**
PLL LPF**
POWER-ON
RESET
POR1**
LBI**
R
LP
V
FB1
1.11V
C
LP
C
OSC
C
OSC
f
IN
BATTERY
SENSE
9V
0.6V
SFB
DROPOUT
DETECTOR
DUPLICATE FOR SECOND CONTROLLER CHANNEL
SWITCH
LOGIC
10k
LBO**
AUXDR
AUXFB
SFB1*
SFB
1
A
AUXON
V
LDO
V
IN
4.8V
V
IN
EXTV
CC
INTV
CC
V
REF
V
FB
V
SEC
+
+
+
+
+
+
+
+
90.8k
+
3
A
6V
1.19V
REF
5V LDO
REGULATOR
RUN
SOFT START
INTERNAL
SUPPLY
SGND
*NOT AVAILABLE ON BOTH CHANNELS
**NOT AVAILABLE ON LTC1538-AUX
FOLDBACK CURRENT LIMITING OPTION
1438 FD
S
R
Q
Q
+
+
+
SHUTDOWN
INTV
CC
INTV
CC
V
IN
I1
I2
BOOST
SENSE
+
V
OSENSE
*
V
OUT
I
TH
V
PROG
*
C
C
C
SS
R
C
RUN/SS
SENSE
PGND
BG
SW
TGS**
TGL
8k
4k
30k
EA
180k
1.28V
1.19V
SHUTDOWN
OV
C
IN
C
B
D
B
R
SENSE
C
OUT
+
C
SEC
+
+
INTV
CC
+
BOLD LINES INDICATE HIGH CURRENT PATHS
2.4V
D
FB
g
m
= 1m
320k
61k
119k
10
LTC1538-AUX/LTC1539
OPERATIO
N
U
Main Control Loop
The LTC1538-AUX/LTC1539 use a constant frequency,
current mode step-down architecture. During normal op-
eration, the top MOSFET is turned on each cycle when the
oscillator sets the RS latch and turned off when the main
current comparator I1 resets the RS latch. The peak
inductor current at which I1 resets the RS latch is con-
trolled by the voltage on the I
TH1
(I
TH2
) pin, which is the
output of each error amplifier (EA). The V
PROG1
pin,
described in the Pin Functions, allows the EA to receive a
selectively attenuated output feedback voltage V
FB1
from
the SENSE
1 pin while V
PROG2
and V
OSENSE2
allow EA to
receive an output feedback voltage V
FB2
from either inter-
nal or external resistive dividers on the second controller.
When the load current increases, it causes a slight de-
crease in V
FB
relative to the 1.19V reference, which in turn
causes the I
TH1
(I
TH2
) voltage to increase until the average
inductor current matches the new load current. After the
large top MOSFET has turned off, the bottom MOSFET is
turned on until either the inductor current starts to reverse,
as indicated by current comparator I2, or the beginning of
the next cycle.
The top MOSFET drivers are biased from floating boot
strap capacitor C
B
, which normally is recharged during
each Off cycle. When V
IN
decreases to a voltage close to
V
OUT
, however, the loop may enter dropout and attempt to
turn on the top MOSFET continuously. The dropout detec-
tor counts the number of oscillator cycles that the top
MOSFET remains on and periodically forces a brief off
period to allow C
B
to recharge.
The main control loop is shut down by pulling the RUN/
SS1 (RUN/SS2) pin low. Releasing RUN/SS1 (RUN/SS2)
allows an internal 3
A current source to charge soft start
capacitor C
SS
. When C
SS
reaches 1.3V, the main control
loop is enabled with the I
TH1
(I
TH2
) voltage clamped at
approximately 30% of its maximum value. As C
SS
contin-
ues to charge, I
TH1
(I
TH2
) is gradually released allowing
normal operation to resume. When both RUN/SS1 and
RUN/SS2 are low, all LTC1538-AUX/LTC1539 functions
are shut down except for the 5V standby regulator, internal
reference and a comparator. Refer to the LTC1438/LTC1439
for applications which do not require a 5V standby regulator.
Comparator OV guards against transient overshoots
> 7.5% by turning off the top MOSFET and keeping it off
until the fault is removed.
Low Current Operation
Adaptive Power Mode allows the LTC1539 to automati-
cally change between two output stages sized for different
load currents. The TGL1 (TGL2) and BG1 (BG2) pins drive
large synchronous N-channel MOSFETs for operation at
high currents, while the TGS1 (TGS2) pin drives a much
smaller N-channel MOSFET used in conjunction with a
Schottky diode for operation at low currents. This allows
the loop to continue to operate at normal operating fre-
quency as the load current decreases without incurring the
large MOSFET gate charge losses. If the TGS1 (TGS2) pin
is left open, the loop defaults to Burst Mode operation in
which the large MOSFETs operate intermittently based on
load demand. Adaptive Power mode provides constant
frequency operation down to approximately 1% of rated
load current. This results in an order of magnitude reduc-
tion of load current before Burst Mode operation com-
mences. Without the small MOSFET (ie: no Adaptive
Power mode) the transition to Burst Mode operation is
approximately 10% of rated load current. The transition to
low current operation begins when comparator I2 detects
current reversal and turns off the bottom MOSFET. If the
voltage across R
SENSE
does not exceed the hysteresis of
I2 (approximately 20mV) for one full cycle, then on follow-
ing cycles the top drive is routed to the small MOSFET at
the TGS1 (TGS2) pin and the BG1 (BG2) pin is disabled.
This continues until an inductor current peak exceeds
20mV/R
SENSE
or the I
TH1
(I
TH2
) voltage exceeds 0.6V,
either of which causes drive to be returned to the TGL1
(TGL2) pin on the next cycle.
Two conditions can force continuous synchronous opera-
tion, even when the load current would otherwise dictate
low current operation. One is when the common mode
voltage of the SENSE
+
1 (SENSE
+
2) and SENSE
1
(SENSE
2) pins are below 1.4V, and the other is when the
SFB1 pin is below 1.19V. The latter condition is used to
assist in secondary winding regulation, as described in the
Applications Information section.
(Refer to Functional Diagram)
11
LTC1538-AUX/LTC1539
OPERATIO
N
U
Frequency Synchronization
A Phase-Locked Loop (PLL) is available on the LTC1539
to allow the oscillator to be synchronized to an external
source connected to the PLLIN pin. The output of the
phase detector at the PLL LPF pin is also the control input
of the oscillator, which operates over a 0V to 2.4V range
corresponding to 30% to 30% in frequency. When
locked, the PLL aligns the turn-on of the top MOSFET to
the rising edge of the synchronizing signal. When PLLIN
is left open, PLL LPF goes low, forcing the oscillator to
minimum frequency.
Power-On Reset
The POR1 pin is an open drain output which pulls low
when the main regulator output voltage of the LTC1539
first controller is out of regulation. When the output
voltage rises to within 5% of regulation, a timer is started
which releases POR1 after 2
16
(65536) oscillator cycles.
Auxiliary Linear Regulator
The auxiliary linear regulator in the LTC1538-AUX and
LTC1539 controls an external PNP transistor for operation
up to 500mA. A precise internal AUXFB resistive divider is
invoked when the AUXDR pin is above 9.5V to allow
regulated 12V VPP supplies to be easily implemented.
When AUXDR is below 8.5V an external feedback divider
may be used to set other output voltages. Taking the
AUXON pin low shuts down the auxiliary regulator provid-
ing a convenient logic-controlled power supply.
The AUX block can be used as a comparator having its
inverting input tied to the internal 1.19V reference. The
AUXDR pin is used as the output and requires an external
pull-up to a supply of less than 8.5V in order to inhibit the
invoking of the internal resistive divider.
INTV
CC
/ EXTV
CC
Power
Power for the top and bottom MOSFET drivers and most
of the other LTC1538-AUX/LTC1539 circuitry is derived
from the INTV
CC
pin. The bottom MOSFET driver supply is
also connected to INTV
CC
. When the EXTV
CC
pin is left
open, an internal 5V low dropout regulator supplies INTV
CC
power. If EXTV
CC
is taken above 4.8V, the 5V regulator is
turned off and an internal switch is turned on to connect
EXTV
CC
to INTV
CC
. This allows the INTV
CC
power to be
derived from a high efficiency external source such as the
output of the regulator itself or a secondary winding, as
described in the Applications Information section.
The 5V/20mA INTV
CC
regulator can be used as a standby
regulator when the two controllers are in shutdown or
when either or both controllers are on. Irrespective of the
signals on the RUN/SS pins, the INTV
CC
pin will follow the
voltage applied to the EXTV
CC
pin when the voltage applied
to the EXTV
CC
pin is taken above 4.8V. The externally
applied voltage is required to be less than the voltage
applied to the V
IN
pin at all times, even when both control-
lers are shut down. This prevents a voltage backfeed
situation from the source applied to the EXTV
CC
pin to the
V
IN
pin. If the EXTV
CC
pin is tied to the first controller's 5V
output, the nominal INTV
CC
pin voltage will stay in the
guaranteed range of 4.7V to 5.2V.
(Refer to Functional Diagram)
APPLICATIO
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The basic LTC1539 application circuit is shown in Fig-
ure 1. External component selection is driven by the load
requirement and begins with the selection of R
SENSE
. Once
R
SENSE
is known, C
OSC
and L can be chosen. Next, the
power MOSFETs and D1 are selected. Finally, C
IN
and C
OUT
are selected. The circuit shown in Figure 1 can be config-
ured for operation up to an input voltage of 28V (limited by
the external MOSFETs).
R
SENSE
Selection for Output Current
R
SENSE
is chosen based on the required output current.
The LTC1538-AUX/LTC1539 current comparator has a
maximum threshold of 150mV/R
SENSE
and an input com-
mon mode range of SGND to INTV
CC
. The current com-
parator threshold sets the peak of the inductor current,
yielding a maximum average output current I
MAX
equal to
the peak value less half the peak-to-peak ripple current,
I
L
.
12
LTC1538-AUX/LTC1539
APPLICATIO
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FOR
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Allowing some margin for variations in the LTC1538-AUX/
LTC1539 and external component values yield:
R
mV
I
SENSE
MAX
=
100
The LTC1538-AUX/LTC1539 work well with values of
R
SENSE
from 0.005
to 0.2
.
C
OSC
Selection for Operating Frequency
The LTC1538-AUX/LTC1539 use a constant frequency
architecture with the frequency determined by an external
oscillator capacitor on C
OSC
. Each time the topside MOSFET
turns on, the voltage on C
OSC
is reset to ground. During the
on-time, C
OSC
is charged by a fixed current plus an
additional current which is proportional to the output
voltage of the phase detector (V
PLLLPF
)(LTC1539 only).
When the voltage on the capacitor reaches 1.19V, C
OSC
is
reset to ground. The process then repeats.
The value of C
OSC
is calculated from the desired operating
frequency. Assuming the phase-locked loop has no exter-
nal oscillator input (V
PLLLPF
= 0V):
C
pF
Frequency kHz
OSC
( )
.
=
( )
( )
1 37 10
11
4
A graph for selecting C
OSC
vs frequency is given in Figure
2. As the operating frequency is increased the gate charge
losses will be higher, reducing efficiency (see Efficiency
Considerations). The maximum recommended switching
frequency is 400kHz. When using Figure 2 for
synchronizable applications, choose C
OSC
corresponding
to a frequency approximately 30% below your center
frequency. (See Phase-Locked Loop and Frequency
Sychronization).
Inductor Value Calculation
The operating frequency and inductor selection are inter-
related in that higher operating frequencies allow the use
of smaller inductor and capacitor values. So why would
anyone ever choose to operate at lower frequencies with
larger components? The answer is efficiency. A higher
frequency generally results in lower efficiency because of
MOSFET gate charge losses. In addition to this basic trade
off, the effect of inductor value on ripple current and low
current operation must also be considered.
The inductor value has a direct effect on ripple current. The
inductor ripple current
I
L
decreases with higher induc-
tance or frequency and generally increases with higher V
IN
or V
OUT
:
I
f L
V
V
V
L
OUT
OUT
IN
=
1
1
( )( )
Accepting larger values of
I
L
allows the use of low
inductances, but results in higher output voltage ripple
and greater core losses. A reasonable starting point for
setting ripple current is
I
L
= 0.4(I
MAX
). Remember, the
maximum
I
L
occurs at the maximum input voltage.
The inductor value also has an effect on low current
operation. The transition to low current operation begins
OPERATING FREQUENCY (kHz)
C
OSC
VALUE (pF)
300
250
200
150
100
50
0
100
200
300
400
LTC1538 F02
500
0
V
PLLLPF
= 0V
Figure 2. Timing Capacitor Value
OPERATING FREQUENCY (kHz)
0
0
INDUCTOR VALUE (
H)
10
20
30
40
60
50
100
150
200
1538 F03
250
300
50
V
OUT
= 5.0V
V
OUT
= 3.3V
V
OUT
= 2.5V
Figure 3. Recommended Inductor Values
13
LTC1538-AUX/LTC1539
APPLICATIO
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when the inductor current reaches zero while the bottom
MOSFET is on. Lower inductor values (higher
I
L
) will cause
this to occur at higher load currents, which can cause a dip
in efficiency in the upper range of low current operation. In
Burst Mode operation (TGS1, 2 pins open), lower inductance
values will cause the burst frequency to decrease.
The Figure 3 graph gives a range of recommended induc-
tor values vs operating frequency and V
OUT
.
Inductor Core Selection
Once the value for L is known, the type of inductor must be
selected. High efficiency converters generally cannot af-
ford the core loss found in low cost powdered iron cores,
forcing the use of more expensive ferrite, molypermalloy
or Kool M
cores. Actual core loss is independent of core
size for a fixed inductor value, but it is very dependent on
inductance selected. As inductance increases, core losses
go down. Unfortunately, increased inductance requires more
turns of wire and therefore copper losses will increase.
Ferrite designs have very low core loss and are preferred
at high switching frequencies, so design goals can con-
centrate on copper loss and preventing saturation. Ferrite
core material saturates "hard," which means that induc-
tance collapses abruptly when the peak design current is
exceeded. This results in an abrupt increase in inductor
ripple current and consequent output voltage ripple. Do
not allow the core to saturate!
Molypermalloy (from Magnetics, Inc.) is a very good, low
loss core material for toroids, but it is more expensive than
ferrite. A reasonable compromise from the same manu-
facturer is Kool M
. Toroids are very space efficient,
especially when you can use several layers of wire. Be-
cause they generally lack a bobbin, mounting is more
difficult. However, designs for surface mount are available
which do not increase the height significantly.
Power MOSFET and D1 Selection
Three external power MOSFETs must be selected for each
controller with the LTC1539: a pair of N-channel MOSFETs
for the top (main) switch and an N-channel MOSFET for
the bottom (synchronous) switch. Only one top MOSFET
is required for each LTC1538-AUX controller.
To take advantage of the Adaptive Power output stage, two
topside MOSFETs must be selected. A large [low R
SD(ON)
]
MOSFET and a small [higher R
DS(ON)
] MOSFET are re-
quired. The large MOSFET is used as the main switch and
works in conjunction with the synchronous switch. The
smaller MOSFET is only enabled under low load current
conditions. The benefit of this is to boost low to midcurrent
efficiencies while continuing to operate at constant fre-
quency. Also, by using the small MOSFET the circuit will
keep switching at a constant frequency down to lower
currents and delay skipping cycles.
The R
DS(ON)
recommended for the small MOSFET is
around 0.5
. Be careful not to use a MOSFET with an
R
DS(ON)
that is too low; remember, we want to conserve
gate charge. (A higher R
DS(ON)
MOSFET has a smaller gate
capacitance and thus requires less current to charge its
gate). For all LTC1538-AUX and cost sensitive LTC1539
applications, the small MOSFET is not required. The circuit
then begins Burst Mode operation as the load current
drops.
The peak-to-peak drive levels are set by the INTV
CC
volt-
age. This voltage is typically 5V during start-up (see
EXTV
CC
Pin Connection). Consequently, logic level thresh-
old MOSFETs must be used in most LTC1538-AUX/
LTC1539 applications. The only exception is applications
in which EXTV
CC
is powered from an external supply
greater than 8V (must be less than 10V), in which standard
threshold MOSFETs (V
GS(TH)
< 4V) may be used. Pay close
attention to the BV
DSS
specification for the MOSFETs as well;
many of the logic level MOSFETs are limited to 30V or less.
Selection criteria for the power MOSFETs include the "ON"
resistance R
SD(ON)
, reverse transfer capacitance C
RSS
,
input voltage and maximum output current. When the
LTC1538-AUX/LTC1539 are operating in continuous mode
the duty cycles for the top and bottom MOSFETs are given
by:
Main Switch Duty Cycle
Synchronous Switch Duty Cycle
=
=
(
)
V
V
V
V
V
OUT
IN
IN
OUT
IN
Kool M
is a registered trademark of Magnetics, Inc.
14
LTC1538-AUX/LTC1539
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The MOSFET power dissipations at maximum output
current are given by:
P
V
V
I
R
k V
C
f
P
V
V
V
I
R
MAIN
OUT
IN
MAX
DS ON
IN
RSS
SYNC
IN
OUT
IN
MAX
DS ON
=
(
)
+
( )
+
( ) (
)(
)( )
=
(
)
+
( )
2
2
1
1
(
)
(
)
I
1.85
MAX
where
is the temperature dependency of R
DS(ON)
and k
is a constant inversely related to the gate drive current.
Both MOSFETs have I
2
R losses while the topside
N-channel equation includes an additional term for transi-
tion losses, which are highest at high input voltages. For
V
IN
< 20V the high current efficiency generally improves
with larger MOSFETs, while for V
IN
> 20V the transition
losses rapidly increase to the point that the use of a higher
R
DS(ON)
device with lower C
RSS
actual provides higher
efficiency. The synchronous MOSFET losses are greatest
at high input voltage or during a short circuit when the duty
cycle in this switch is nearly 100%. Refer to the Foldback
Current Limiting section for further applications information.
The term (1 +
) is generally given for a MOSFET in the
form of a normalized R
DS(ON)
vs Temperature curve, but
= 0.005/
C can be used as an approximation for low
voltage MOSFETs. C
RSS
is usually specified in the MOSFET
characteristics. The constant k = 2.5 can be used to
estimate the contributions of the two terms in the main
switch dissipation equation.
The Schottky diode D1 shown in Figure 1 serves two
purposes. During continuous synchronous operation, D1
conducts during the dead-time between the conduction of
the two large power MOSFETs. This prevents the body
diode of the bottom MOSFET from turning on and storing
charge during the dead-time, which could cost as much as
1% in efficiency. During low current operation, D1 oper-
ates in conjunction with the small top MOSFET to provide
an efficient low current output stage. A 1A Schottky is
generally a good compromise for both regions of opera-
tion due to the relatively small average current.
C
IN
and C
OUT
Selection
In continuous mode, the source current of the top
N-channel MOSFET is a square wave of duty cycle V
OUT
/
V
IN
. To prevent large voltage transients, a low ESR input
capacitor sized for the maximum RMS current must be
used. The maximum RMS capacitor current is given by:
C Required I
IN
RMS
(
)
[
]
I
V
V
V
V
MAX
OUT
IN
OUT
IN
/
1 2
This formula has a maximum at V
IN
= 2V
OUT
, where I
RMS
=
I
OUT
/2. This simple worst-case condition is commonly used
for design because even significant deviations do not offer
much relief. Note that capacitor manufacturer's ripple current
ratings are often based on only 2000 hours of life. This makes
it advisable to further derate the capacitor or to choose a
capacitor rated at a higher temperature than required. Several
capacitors may also be paralleled to meet size or height
requirements in the design. Always consult the manufacturer
if there is any question.
The selection of C
OUT
is driven by the required effective
series resistance (ESR). Typically, once the ESR require-
ment is satisfied the capacitance is adequate for filtering.
The output ripple (
V
OUT
) is approximated by:
V
I
ESR
fC
OUT
L
OUT
+
1
4
where f = operating frequency, C
OUT
= output capacitance
and
I
L
= ripple current in the inductor. The output ripple
is highest at maximum input voltage since
I
L
increases
with input voltage. With
I
L
= 0.4I
OUT(MAX)
the output
ripple will be less than 100mV at max V
IN
assuming:
C
OUT
Required ESR < 2R
SENSE
Manufacturers such as Nichicon, United Chemicon and
Sanyo should be considered for high performance through-
hole capacitors. The OS-CON semiconductor dielectric
capacitor available from Sanyo has the lowest (ESR size)
product of any aluminum electrolytic at a somewhat
15
LTC1538-AUX/LTC1539
APPLICATIO
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higher price. Once the ESR requirement for C
OUT
has been
met, the RMS current rating generally far exceeds the
I
RIPPLE(P-P)
requirement.
In surface mount applications multiple capacitors may
have to be paralleled to meet the ESR or RMS current
handling requirements of the application. Aluminum elec-
trolytic and dry tantalum capacitors are both available in
surface mount configurations. In the case of tantalum, it is
critical that the capacitors are surge tested for use in
switching power supplies. An excellent choice is the AVX
TPS series of surface mount tantalums, available in case
heights ranging from 2mm to 4mm. Other capacitor types
include Sanyo OS-CON, Nichicon PL series and Sprague
593D and 595D series. Consult the manufacturer for other
specific recommendations.
INTV
CC
/ 5V Standby Regulator
An internal P-channel low dropout regulator produces 5V
at the INTV
CC
pin from the V
IN
supply pin. INTV
CC
powers
the drivers and internal circuitry within the LTC1538-AUX/
LTC1539, as well as any "wake-up" circuitry tied externally
to the INTV
CC
pin. The INTV
CC
pin regulator can supply
40mA and must be bypassed to ground with a minimum
of 2.2
F tantalum or low ESR electrolytic capacitor. Good
bypassing is necessary to supply the high transient cur-
rents required by the MOSFET gate drivers.
To prevent any interaction due to the high transient gate
currents being drawn from the external capacitor an
additional series filter of 10
and 10
F to SGND can be
added.
High input voltage applications in which large MOSFETs
are being driven at high frequencies may cause the maxi-
mum junction temperature rating for the LTC1538-AUX/
LTC1539 to be exceeded. The IC supply current is domi-
nated by the gate charge supply current when not using an
output derived EXTV
CC
source. The gate charge is depen-
dent on operating frequency as discussed in the Efficiency
Considerations section. The junction temperature can be
estimated by using the equations given in Note 1 of the
Electrical Characteristics. For example, the LTC1539 is
limited to less than 21mA from a 30V supply:
T
J
= 70
C + (21mA)(30V)(85
C/W) = 124
C
To prevent maximum junction temperature from being
exceeded, the input supply current must be checked while
operating in continuous mode at maximum V
IN
.
EXTV
CC
Connection
The LTC1538-AUX/LTC1539 contain an internal P-chan-
nel MOSFET switch connected between the EXTV
CC
and
INTV
CC
pins. When the voltage applied to EXTV
CC
rises
above
4.8V, the internal regulator is turned off and an
internal switch closes, connecting the EXTV
CC
pin to the
INTV
CC
pin thereby supplying internal power to the IC. The
switch remains closed as long as the voltage applied to
EXTV
CC
remains above 4.5V. This allows the MOSFET
driver and control power to be derived from the output
during normal operation (4.8V < V
OUT
< 9V) and from the
internal regulator when the output is out of regulation
(start-up, short circuit). Do not apply greater than 10V to
the EXTV
CC
pin and ensure that EXTV
CC
V
IN
.
Significant efficiency gains can be realized by powering
INTV
CC
from the output, since the V
IN
current resulting
from the driver and control currents will be scaled by a
factor of Duty Cycle/Efficiency. For 5V regulators this
supply means connecting the EXTV
CC
pin directly to V
OUT
.
However, for 3.3V and other lower voltage regulators,
additional circuitry is required to derive INTV
CC
power
from the output.
The following list summarizes the four possible connec-
tions for EXTV
CC:
1. EXTV
CC
left open (or grounded). This will cause INTV
CC
to be powered from the internal 5V regulator resulting
in an efficiency penalty of up to 10% at high input
voltages.
2. EXTV
CC
connected directly to V
OUT
. This is the normal
connection for a 5V regulator and provides the highest
efficiency.
3. EXTV
CC
connected to an output-derived boost network.
For 3.3V and other low voltage regulators, efficiency
gains can still be realized by connecting EXTV
CC
to an
output-derived voltage which has been boosted to
16
LTC1538-AUX/LTC1539
APPLICATIO
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ATIO
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+
+
V
IN
V
IN
V
OUT
+
C
OUT
1538 F04b
1
F
0.22
F
R
SENSE
C
IN
TGL1
N-CH
N-CH
N-CH
VN2222LL
LTC1538-AUX
LTC1539*
L1
BAT85
BAT85
BAT85
TGS1*
SW1
BG1
PGND
EXTV
CC
*TGS1 ONLY AVAILABLE ON THE LTC1539
+
+
+
V
IN
V
IN
V
SEC
V
OUT
C
OUT
1538 F04a
1
F
R
SENSE
C
IN
TGL1
N-CH
OPTIONAL EXTV
CC
CONNECTION
5V
V
SEC
9V
N-CH
R5
N-CH
1N4148
LTC1538-AUX
LTC1539*
L1
1:1
TGS1*
SW1
BG1
PGND
SGND
SFB1
EXTV
CC
R6
*TGS1 ONLY AVAILABLE ON THE LTC1539
Figure 4a. Secondary Output Loop and EXTV
CC
Connection
Figure 4b. Capacitive Charge Pump for EXTV
CC
greater than 4.8V. This can be done with either the
inductive boost winding as shown in Figure 4a or the
capacitive charge pump shown in Figure 4b. The charge
pump has the advantage of simple magnetics.
4. EXTV
CC
connected to an external supply. If an external
supply is available in the 5V to 10V range (EXTV
CC
V
IN
)
it may be used to power EXTV
CC
providing it is compat-
ible with the MOSFET gate drive requirements. When
driving standard threshold MOSFETs, the external sup-
ply must be always present during operation to prevent
MOSFET failure due to insufficient gate drive. Note: care
must be taken when using the connections in items 3 or
4. These connections will effect the INTV
CC
voltage
when either or both controllers are on.
Topside MOSFET Driver Supply (C
B
,D
B
)
External bootstrap capacitors C
B
connected to the BOOST
1 and BOOST 2 pins supply the gate drive voltages for the
topside MOSFETs. Capacitor C
B
in the Functional Diagram
is charged through diode D
B
from INTV
CC
when the
SW1(SW2) pin is low. When one of the topside MOSFETs
is to be turned on, the driver places the C
B
voltage across
the gate source of the desired MOSFET. This enhances the
MOSFET and turns on the topside switch. The switch node
voltage SW1(SW2) rises to V
IN
and the BOOST 1(BOOST
2) pin follows. With the topside MOSFET on, the boost
voltage is above the input supply: V
BOOST
= V
IN
+ V
INTVCC
.
The value of the boost capacitor C
B
needs to be 100 times
that of the total input capacitance of the topside MOSFET(s).
The reverse breakdown on D
B
must be greater than
V
IN(MAX)
.
Output Voltage Programming
The LTC1538-AUX/LTC1539 have pin selectable output
voltage programming. The output voltage is selected by
the V
PROG1
(V
PROG2
) pin as follows:
V
PROG1,2
= 0V
V
OUT1,2
= 3.3V
V
PROG1,2
= INTV
CC
V
OUT1,2
= 5V
V
PROG2
= Open (DC)
V
OUT2
= Adjustable
The top of an internal resistive divider is connected to
SENSE
1 pin in Controller 1. For fixed output voltage
applications the SENSE
1 pin is connected to the output
voltage as shown in Figure 5a. When using an external
resistive divider for Controller 2, the V
PROG2
pin is left open
LTC1538-AUX
LTC1539
V
PROG2
*
V
OSENSE2
SGND
OPEN (DC)
1.19V
V
OUT
9V
1538 F05b
100pF
R2
R1
R2
R1
V
OUT
= 1.19V 1 +
( )
*LTC1539 ONLY
Figure 5b. LTC1538-AUX/LTC1539 Adjustable Applications
Figure 5a. LTC1538-AUX/LTC1539 Fixed Output Applications
LTC1538-AUX
LTC1539
V
PROG1
SENSE
1
SGND
GND: V
OUT
= 3.3V
INTV
CC
: V
OUT
= 5V
+
V
OUT
1538 F05a
C
OUT
17
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APPLICATIO
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(DC) and the V
OSENSE2
pin is connected to the feedback
resistors as shown in Figure 5b. Controller 2 will force the
externally attenuated output voltage to 1.19V.
Power-On Reset Function (POR)
The power-on reset function monitors the output voltage
of the first controller and turns on an open drain device
when it is below its properly regulated voltage. An external
pull-up resistor is required on the POR1 pin.
When power is first applied or when coming out of
shutdown, the POR1 output is held at ground. When the
output voltage rises above a level which is 5% below the final
regulated output value, an internal counter starts. After this
counter counts 2
16
(65536) clock cycles, the POR1 pull-
down device turns off. The POR1 output is active when both
controllers are shut down as long as V
IN
is powered.
The POR1 output will go low whenever the output voltage
of the first controller drops below 7.5% of its regulated
value for longer than approximately 30
s, signaling an
out-of-regulation condition. In shutdown, when RUN/SS1
and RUN/SS2 are both below 1.3V, the POR1 output is
pulled low even if the regulator's output is held up by an
external source.
RUN/ Soft Start Function
The RUN/SS1 and RUN/SS2 pins each serve two func-
tions. Each pin provides the soft start function and a
means to shut down each controller. Soft start reduces
surge currents from V
IN
by providing a gradual ramp-up of
the internal current limit.
Power supply sequencing can
also be accomplished using this pin.
An internal 3
A current source charges up an external
capacitor C
SS.
When the voltage on RUN/SS1 (RUN/SS2)
reaches 1.3V the particular controller is permitted to start
operating. As the voltage on the pin continues to ramp
from 1.3V to 2.4V, the internal current limit is also ramped
at a proportional linear rate. The current limit begins at
approximately 50mV/R
SENSE
(at V
RUN/SS
= 1.3V) and ends
at 150mV/R
SENSE
(V
RUN/SS
2.7V). The output current
thus ramps up slowly, reducing the starting surge current
required from the input power supply. If RUN/SS has been
pulled all the way to ground there is a delay before starting
of approximately 500ms/
F, followed by a similar time to
reach full current on that controller.
By pulling both RUN/SS controller pins below 1.3V, the
LTC1538-AUX/LTC1539 are put into shutdown
(I
Q
< 200
A). These pins can be driven directly from logic
as shown in Figure 6. Diode D1 in Figure 6 reduces the start
delay but allows C
SS
to ramp up slowly providing the soft
start function; this diode and C
SS
can be deleted if soft start
is not needed. Each RUN/SS pin has an internal 6V Zener
clamp (See Functional Diagram).
Foldback Current Limiting
As described in Power MOSFET and D1 Selection, the
worst-case dissipation for either MOSFET occurs with a
short-circuited output, when the synchronous MOSFET
conducts the current limit value almost continuously. In
most applications this will not cause excessive heating,
even for extended fault intervals. However, when heat
sinking is at a premium or higher R
DS(ON)
MOSFETs are
being used, foldback current limiting should be added to
reduce the current in proportion to the severity of the fault.
Foldback current limiting is implemented by adding diode
D
FB
between the output and the I
TH
pin as shown in the
Functional Diagram. In a hard short (V
OUT
= 0V) the
current will be reduced to approximately 25% of the
maximum output current. This technique may be used for
all applications with regulated output voltages of 1.8V or
greater.
D1
C
SS
3.3V
OR 5V
RUN/SS1
(RUN/SS2)
C
SS
1538 F06
RUN/SS1
(RUN/SS2)
Figure 6. RUN/SS Pin Interfacing
18
LTC1538-AUX/LTC1539
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ATIO
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Figure 7. Operating Frequency vs V
PLLLPF
V
PLLLPF
(V)
0
NORMALIZED FREQUENCY
1.3
f
O
0.7
1538 F07
1.5
2.0
1.0
0.5
2.5
*PLLIN
SGND
50k
1538 F08
*PLL LPF
C
OSC
PHASE
DETECTOR*
OSC
R
LP
C
LP
C
OSC
EXTERNAL
FREQUENCY
2.4V
DIGITAL
PHASE/
FREQUENCY
DETECTOR
*LTC1539 ONLY
Figure 8. Phase-Locked Loop Block Diagram
Phase-Locked Loop and Frequency Synchronization
The LTC1539 has an internal voltage-controlled oscillator
and phase detector comprising a phase-locked loop. This
allows the top MOSFET turn-on to be locked to the rising
edge of an external source. The frequency range of the
voltage-controlled oscillator is
30% around the center
frequency f
O
.
The value of C
OSC
is calculated from the desired operating
frequency (f
O
). Assuming the phase-locked loop is
locked
(V
PLLLPF
= 1.19V):
C
pF
Frequency kHz
OSC
( )
.
(
)
=
( )
2 1 10
11
4
Stating the frequency as a function of V
PLLLPF
and C
OSC
:
Frequency kHz
C
pF
A
A
V
V
OSC
PLLLPF
(
)
.
.
=
( )
( )
+
[
]
+
+
8 4 10
11
1
17
18
2 4
2000
8
The phase detector used is an edge sensitive digital type
which provides zero degrees phase shift between the
external and internal oscillators. This type of phase detec-
tor will not lock up on input frequencies close to the
harmonics of the VCO center frequency. The PLL hold-in
range,
f
H
, is equal to the capture range,
f
C:
f
H
=
f
C
=
0.3 f
O
.
The output of the phase detector is a complementary pair
of current sources charging or discharging the external
filter network on the PLL LPF pin. A simplified block
diagram is shown in Figure 8.
If the external frequency f
PLLIN
is greater than the oscilla-
tor frequency f
OSC
, current is sourced continuously, pull-
ing up the PLL LPF pin. When the external frequency is less
than f
0SC
, current is sunk continuously, pulling down the
PLL LPF pin. If the external and internal frequencies are the
same but exhibit a phase difference, the current sources
turn on for an amount of time corresponding to the phase
difference. Thus the voltage on the PLL LPF pin is adjusted
until the phase and frequency of the external and internal
oscillators are identical. At this stable operating point the
phase comparator output is open and the filter capacitor
C
LP
holds the voltage. The LTC1539 PLLIN pin must be
driven from a low impedance such as a logic gate located
close to the pin. Any external attenuator used needs to be
referenced to SGND.
The loop filter components C
LP
, R
LP
smooth out the
current pulses from the phase detector and provide a
19
LTC1538-AUX/LTC1539
APPLICATIO
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ATIO
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stable input to the voltage-controlled oscillator. The filter
components C
LP
and R
LP
determine how fast the loop
acquires lock. Typically, R
LP
= 10k and C
LP
is 0.01
F to 0.1
F.
The low side of the filter needs to be connected to SGND.
The PLL LPF pin can be driven with external logic to obtain
a 1:1.9 frequency shift. The circuit shown in Figure 9 will
provide a frequency shift from f
O
to 1.9f
O
as the voltage on
V
PLLLPF
increases from 0V to 2.4V. Do not exceed 2.4V on
V
PLLLPF
.
SFB1 Pin Operation
When the SFB1 pin drops below its ground referenced
1.19V threshold, continuous mode operation is forced. In
continuous mode, the large N-channel main and synchro-
nous switches are used regardless of the load on the main
output.
In addition to providing a logic input to force continuous
synchronous operation, the SFB1 pin provides a means to
regulate a flyback winding output. The use of a synchro-
nous switch removes the requirement that power must be
drawn from the inductor primary in order to extract power
from the auxiliary winding. With the loop in continuous
mode, the auxiliary output may be loaded without regard
to the primary output load. The SFB1 pin provides a way
to force continuous synchronous operation as needed by
the flyback winding.
The secondary output voltage is set by the turns ratio of the
transformer in conjunction with a pair of external resistors
returned to the SFB1 pin as shown in Figure 4a. The
secondary regulated voltage V
SEC
in Figure 4a is given by:
V
N
V
V
R
R
SEC
OUT
+
( )
>
+
1
1 19
1
6
5
.
where N is the turns ratio of the transformer, and V
OUT
is
the main output voltage sensed by SENSE
1.
Auxiliary Regulator/Comparator
The auxiliary regulator/comparator can be used as a
comparator or low dropout regulator (by adding an exter-
nal PNP pass device).
When the voltage present at the AUXON pin is greater than
1.19V the regulator/comparator is on. The amplifier is
stable when operating as a low dropout regulator. This
same amplifier can be used as a comparator whose
inverting input is tied to the 1.19V reference.
The AUXDR pin is internally connected to an open drain
MOSFET which can sink up to 10mA. The voltage on
AUXDR determines whether or not an internal 12V resis-
tive divider is connected to AUXFB as described below. A
pull-up resistor is required on AUXDR and the voltage
must not exceed 28V.
Figure 9. Directly Driving PLL LPF Pin
18k
3.3V OR 5V
PLL LPF
2.4V
MAX
LTC1538 F09
Low Battery Comparator
The LTC1539 has an on-chip low battery comparator
which can be used to sense a low battery condition when
implemented as shown in Figure 10. This comparator is
active during shutdown allowing battery charge level
interrogation prior to and after powering up part or all of
the system. The resistor divider R3/R4 sets the compara-
tor trip point as follows:
V
V
R
R
LBITRIP
=
+
1 19
1
4
3
.
The divided down voltage at the negative () input to the
comparator is compared to an internal 1.19V reference. A
20mV hysteresis is built in to assure rapid switching. The
output is an open drain MOSFET and requires a pull-up
resistor. This comparator is active when both the RUN/
SS1 and RUN/SS2 pins are low. The low side of the resistive
divider needs to be connected to SGND.
Figure 10. Low Battery Comparator
+
LBI
V
IN
SGND
LBO
R4
R3
1538 F10
1.19V REFERENCE
LTC1539
20
LTC1538-AUX/LTC1539
APPLICATIO
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ATIO
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With the addition of an external PNP pass device, a linear
regulator capable of supplying up to 0.5A is created. As
shown in Figure 11a, the base of the external PNP con-
nects to the AUXDR pin together with a pull-up resistor.
The output voltage V
OAUX
at the collector of the external
PNP is sensed by the AUXFB pin.
The input voltage to the auxiliary regulator can be taken
from a secondary winding on the primary inductor as
shown in Figure 11a. In this application, the SFB1 pin
regulates the input voltage to the PNP regulator (see SFB1
Pin Operation) and should be set to approximately 1V to
2V above the required output voltage of the auxiliary
regulator. A Zener clamp diode may be required to keep the
secondary winding resultant output voltage under the 28V
AUXDR pin specification when the primary is heavily
loaded and the secondary is not.
The AUXFB pin is the feedback point of the regulator. An
internal resistor divider is available to provide a 12V output
by simply connecting AUXFB directly to the collector of the
external PNP. The internal resistive divider is switched in
when the voltage at AUXFB goes above 9.5V with 1V built-
in hysteresis. For other output voltages, an external resis-
tive divider is fed back to AUXFB as shown in Figure 11b.
The output voltage V
OAUX
is set as follows:
V
V
R
R
OAUX
=
+
<
=
1 19
1
8
7
.
8V AUX DR < 8.5V
V
12V AUX DR
12V
OAUX
When used as a voltage comparator as shown in Figure
11c, the auxiliary block has a noninverting characteristic.
When AUXFB drops below 1.19V, the AUXDR pin will be
pulled low. A minimum current of 5
A is required to pull up
the AUXDR pin to 5V when used as a comparator output in
order to counteract a 1.5
A internal pull-down current source.
Efficiency Considerations
The efficiency of a switching regulator is equal to the
output power divided by the input power times 100%. It is
often useful to analyze individual losses to determine what
is limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as:
Efficiency = 100% (L1 + L2 + L3 + ...)
AUXDR
AUXFB
SFB1
AUXON
+
+
1538 F11b
V
SEC
SECONDARY
WINDING
1:N
ON/OFF
V
OAUX
R6
10
F
R5
R8
R7
R6
R5
V
SEC
= 1.19V
> (V
OAUX
+ 1V)
1 +
( )
LTC1538-AUX/
LTC1539
Figure 11b. 5V Output Auxiliary Regulator Using
External Feedback Resistors
Figure 11a. 12V Output Auxiliary Regulator
Using Internal Feedback Resistors
LTC1538-AUX/
LTC1539
AUXDR
AUXFB
SFB1
AUXON
+
+
1538 F11a
V
SEC
SECONDARY
WINDING
1:N
ON/OFF
V
OAUX
12V
R6
10
F
R5
R6
R5
V
SEC
= 1.19V
> 13V
1 +
( )
Figure 11c. Auxiliary Comparator Configuration
+
AUXON
AUXFB
ON/OFF
INPUT
V
PULL-UP
<
7.5V
AUXDR
OUTPUT
1538 F11c
1.19V REFERENCE
LTC1538-AUX/LTC1539
21
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the resistance of one MOSFET can simply be summed
with the resistances of L and R
SENSE
to obtain I
2
R
losses. For example, if each R
DS(ON)
= 0.05
, R
L
=
0.15
and R
SENSE
= 0.05
, then the total resistance is
0.25
. This results in losses ranging from 3% to 10%
as the output current increases from 0.5A to 2A. I
2
R
losses cause the efficiency to roll off at high output
currents.
4. Transition losses apply only to the topside MOSFET(s)
and only when operating at high input voltages (typically
20V or greater). Transition losses can be estimated from:
Transition Loss
2.5(V
IN
)
1.85
(I
MAX
)(C
RSS
)(f)
Other losses including C
IN
and C
OUT
ESR dissipative
losses, Schottky conduction losses during dead-time,
and inductor core losses, generally account for less
than 2% total additional loss.
Checking Transient Response
The regulator loop response can be checked by looking at
the load transient response. Switching regulators take
several cycles to respond to a step in DC (resistive) load
current. When a load step occurs, V
OUT
shifts by an
amount equal to (
I
LOAD
)(ESR) where ESR is the effective
series resistance of C
OUT
.
I
LOAD
also begins to charge or
discharge C
OUT
generating the feedback error signal which
forces the regulator loop to adapt to the current change
and return V
OUT
to its steady-state value. During this
recovery time V
OUT
can be monitored for overshoot or
ringing which would indicate a stability problem. The I
TH
external components shown in Figure 1 will prove ad-
equate compensation for most applications.
A second, more severe transient is caused by switching in
loads with large (> 1
F) supply bypass capacitors. The
discharged bypass capacitors are effectively put in parallel
with C
OUT
, causing a rapid drop in V
OUT
. No regulator can
deliver enough current to prevent this problem if the load
switch resistance is low and it is driven quickly. The only
solution is to limit the rise time of the switch drive so that
the load rise time is limited to approximately (25)(C
LOAD
).
Thus a 10
F capacitor would require a 250
s rise time,
limiting the charging current to about 200mA.
where L1, L2, etc. are the individual losses as a percentage
of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of the
losses in LTC1538-AUX/LTC1539 circuits. LTC1538-AUX/
LTC1539 V
IN
current, INTV
CC
current, I
2
R losses and
topside MOSFET transition losses.
1. The V
IN
current is the DC supply current given in the
Electrical Characteristics which excludes MOSFET driver
and control currents. V
IN
current typically results in a
small (<< 1%) loss which increases with V
IN
.
2. INTV
CC
current is the sum of the MOSFET driver and
control currents. The MOSFET driver current results
from switching the gate capacitance of the power
MOSFETs. Each time a MOSFET gate is switched from
low to high to low again, a packet of charge dQ moves
from INTV
CC
to ground. The resulting dQ/dt is a current
out of INTV
CC
which is typically much larger than the
control circuit current. In continuous mode, I
GATECHG
=
f(Q
T
+ Q
B
), where Q
T
and Q
B
are the gate charges of the
topside and bottom side MOSFETs. It is for this reason
that the large topside and synchronous MOSFETs are
turned off during low current operation in favor of the
small topside MOSFET and external Schottky diode,
allowing efficient, constant-frequency operation at low
output currents.
By powering EXTV
CC
from an output-derived source,
the additional V
IN
current resulting from the driver and
control currents will be scaled by a factor of Duty Cycle/
Efficiency. For example, in a 20V to 5V application,
10mA of INTV
CC
current results in approximately 3mA
of V
IN
current. This reduces the midcurrent loss from
10% or more (if the driver was powered directly from
V
IN
) to only a few percent.
3. I
2
R losses are predicted from the DC resistances of the
MOSFET, inductor and current sense R. In continuous
mode the average output current flows through L and
R
SENSE
, but is "chopped" between the topside main
MOSFET and the synchronous MOSFET. If the two
MOSFETs have approximately the same R
DS(ON)
, then
22
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Automotive Considerations: Plugging into the
Cigarette Lighter
As battery-powered devices go mobile, there is a natural
interest in plugging into the cigarette lighter in order to
conserve or even recharge battery packs during operation.
But before you connect, be advised: you are plugging into
the supply from hell. The main battery line in an automo-
bile is the source of a number of nasty potential transients,
including load dump, reverse battery and double battery.
Load dump is the result of a loose battery cable. When the
cable breaks connection, the field collapse in the alternator
can cause a positive spike as high as 60V which takes
several hundred milliseconds to decay. Reverse battery is
just what it says, while double battery is a consequence of
tow-truck operators finding that a 24V jump start cranks
cold engines faster than 12V.
The network shown in Figure 12 is the most straightfor-
ward approach to protect a DC/DC converter from the
ravages of an automotive battery line. The series diode
prevents current from flowing during reverse battery,
while the transient suppressor clamps the input voltage
during load dump. Note that the transient suppressor
should not conduct during double battery operation, but
must still clamp the input voltage below breakdown of the
converter. Although the LTC1538-AUX/LTC1539 has a
maximum input voltage of 36V, most applications will be
limited to 30V by the MOSFET BV
DSS
.
Design Example
As a design example, assume V
IN
= 12V(nominal), V
IN
=
22V(max), V
OUT
= 3.3V, I
MAX
= 3A and f = 250kHz, R
SENSE
and C
OSC
can immediately be calculated:
R
SENSE
= 100mV/3A = 0.033
C
OSC
= (1.37(10
4
)/250) 11
43pF
Referring to Figure 3, a 10
H inductor falls within the
recommended range. To check the actual value of the
ripple current the following equation is used :
I
V
f L
V
V
L
OUT
OUT
IN
=
( )( )
1
The highest value of the ripple current occurs at the
maximum input voltage:
I
V
kHz
H
V
V
A
L
=
=
3 3
250
10
1
3 3
22
1 12
.
(
)
.
.
The power dissipation on the topside MOSFET can be
easily estimated. Using a Siliconix Si4412DY for example;
R
DS(ON)
= 0.042
, C
RSS
= 100pF. At maximum input
voltage with T(estimated) = 50
C:
P
V
V
C
C
V
A
pF
kHz
mW
MAIN
=
( )
+
(
)
-
(
)
[
]
(
)
+
( ) ( )(
)(
)
=
3 3
22
3
1
0 005 50
25
0 042
2 5 22
3
100
250
122
2
1 85
.
.
.
.
.
The most stringent requirement for the synchronous
N-channel MOSFET is with V
OUT
= 0V (i.e. short circuit).
During a continuous short circuit, the worst-case dissipa-
tion rises to:
P
SYNC
= [I
SC(AVG)
]
2
(1 +
)R
DS(ON)
1538 F12
50A IPK RATING
LTC1538-AUX/
LTC1539
TRANSIENT VOLTAGE
SUPPRESSOR
GENERAL INSTRUMENT
1.5KA24A
V
IN
12V
Figure 12. Automotive Application Protection
23
LTC1538-AUX/LTC1539
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With the 0.033
sense resistor I
SC(AVG)
= 4A will result,
increasing the Si4412DY dissipation to 950mW at a die
temperature of 105
C.
C
IN
will require an RMS current rating of at least 1.5A at
temperature and C
OUT
will require an ESR of 0.03
for low
output ripple. The output ripple in continuous mode will be
highest at the maximum input voltage. The output voltage
ripple due to ESR is approximately:
V
ORIPPLE
= R
ESR
(
I
L
) = 0.03
(1.12A) = 34mV
P-P
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC1538-AUX/LTC1539. These items are also illustrated
graphically in the layout diagram of Figure 13. Check the
following in your layout:
1. Are the high current power ground current paths using
or running through any part of signal ground? The
LTC1438/LTC1438X/LTC1439 IC's have their sensitive
pins on one side of the package. These pins include the
signal ground for the reference, the oscillator input, the
voltage and current sensing for both controllers and the
low battery/comparator input. The signal ground area
used on this side of the IC must return to the bottom
plates of all of the output capacitors. The high current
power loops formed by the input capacitors and the
ground returns to the sources of the bottom
N-channel MOSFETs, anodes of the Schottky diodes,
and (-) plates of C
IN
, should be as short as possible and
tied through a low resistance path to the bottom plates
of the output capacitors for the ground return.
2. Do the LTC1538-AUX/LTC1539 SENSE
1 and V
OSENSE2
pins connect to the (+) plates of C
OUT
? In adjustable
applications, the resistive divider R1/R2 must be con-
nected between the (+) plate of C
OUT
and signal ground
and the HF decoupling capacitor should be as close as
possible to the LTC1538-AUX/LTC1539.
3. Are the SENSE
and SENSE
+
leads routed together with
minimum PC trace spacing? The filter capacitors be-
tween SENSE
+
1 (SENSE
+
2) and SENSE
1 (SENSE
2)
should be as close as possible to the LTC1538-AUX/
LTC1539.
4. Do the (+) plates of C
IN
connect to the drains of the
topside MOSFETs as closely as possible? This capaci-
tor provides the AC current to the MOSFETs.
5. Is the INTV
CC
decoupling capacitor connected closely
between
INTV
CC
and the power ground pin? This ca-
pacitor carries the MOSFET driver peak currents.
6. Keep the switching nodes, SW1 (SW2), away from
sensitive small-signal nodes. Ideally the switch nodes
should be placed at the furthest point from the
LTC1538-AUX/LTC1539.
7. Use a low impedance source such as a logic gate to drive
the PLLIN pin and keep the lead as short as possible.
PC BOARD LAYOUT SUGGESTIONS
Switching power supply printed circuit layouts are cer-
tainly among the most difficult analog circuits to design.
The following suggestions will help to get a reasonably
close solution on the first try.
The output circuits, including the external switching
MOSFETs, inductor, secondary windings, sense resistor,
input capacitors and output capacitors all have very large
voltage and/or current levels associated with them. These
components and the radiated fields (electrostatic and/or
electromagnetic) must be kept away from the very sensi-
tive control circuitry and loop compensation components
required for a current mode switching regulator.
The electrostatic or capacitive coupling problems can be
reduced by increasing the distance from the radiator,
typically a very large or very fast moving voltage signal.
The signal points that cause problems generally include:
the "switch" node, any secondary flyback winding voltage
and any nodes which also move with these nodes. The
switch, MOSFET gate, and boost nodes move between VIN
and Pgnd each cycle with less than a 100ns transition time.
The secondary flyback winding output has an AC signal
component of V
IN
times the turns ratio of the trans-
former, and also has a similar < 100ns transition time. The
feedback control input signals need to have less than a few
millivolts of noise in order for the regulator to perform
properly. A rough calculation shows that 80dB of isolation
at 2MHz is required from the switch node for low noise
switcher operation. The situation is worse by a factor of the
24
LTC1538-AUX/LTC1539
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turns ratio for the secondary flyback winding. Keep these
switch-node-related PC traces small and away from the
"quiet" side of the IC (not just above and below each other
on the opposite side of the board).
The electromagnetic or current-loop induced feedback
problems can be minimized by keeping the high AC-
current (transmitter) paths and the feedback circuit (re-
ceiver) path small and/or short. Maxwell's equations are at
work here, trying to disrupt our clean flow of current and
voltage information from the output back to the controller
input. It is crucial to understand and minimize the suscep-
tibility of the control input stage as well as the more
obvious reduction of radiation from the high-current out-
put stage(s). An inductive transmitter depends upon the
frequency, current amplitude and the size of the current
loop to determine the radiation characteristic of the gen-
erated field. The current levels are set in the output stage
once the input voltage, output voltage and inductor value(s)
have been selected. The frequency is set by the output-
stage transition times. The only parameter over which we
have some control is the size of the antenna we create on
the PC board, i.e., the loop. A loop is formed with the input
capacitance, the top MOSFET, the Schottky diode, and the
path from the Schottky diode's ground connection and the
input capacitor's ground connection. A second path is
formed when a secondary winding is used comprising the
secondary output capacitor, the secondary winding and
the rectifier diode or switching MOSFET (in the case of a
synchronous approach). These "loops" should be kept as
small and tightly packed as possible in order to minimize
their "far field" radiation effects. The radiated field pro-
duced is picked up by the current comparator input filter
circuit(s), as well as by the voltage feedback circuit(s). The
current comparator's filter capacitor placed across the
sense pins attenuates the radiated current signal. It is
important to place this capacitor immediately adjacent to
the IC sense pins. The voltage sensing input(s) minimizes
the inductive pickup component by using an input capaci-
tance filter to SGND. The capacitors in both case serve to
integrate the induced current, reducing the susceptibility
to both the "loop" radiated magnetic fields and the trans-
former or inductor leakage fields.
The capacitor on INTV
CC
acts as a reservoir to supply the
high transient currents to the bottom gates and to re-
charge the boost capacitor. This capacitor should be a
4.7
F tantalum capacitor placed as close as possible to the
INTV
CC
and PGND pins of the IC. Peak current driving the
MOSFET gates exceeds 1A. The power ground pin of the
IC, connected to this capacitor, should connect directly to
the lower plates of the output capacitors to minimize the
AC ripple on the INTV
CC
IC power supply.
The previous instructions will yield a PC layout which has
three separate ground regions returning separately to the
bottom plates of the output capacitors: a signal ground, a
MOSFET gate/INTV
CC
ground and the ground from the
input capacitors, Schottky diode and synchronous
MOSFET. In practice, this may produce a long power
ground path from the input and output capacitors. A long,
low resistance path between the input and output capaci-
tor power grounds will not upset the operation of the
switching controllers as long as the signal and power
grounds from the IC pins does not "tap in" along this path.
25
LTC1538-AUX/LTC1539
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Figure 13. LTC1539 Physical Layout Diagram
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
RUN/SS1
SENSE
+
1
SENSE
1
V
PROG1
I
TH1
POR2
C
OSC
SGND
LBI
LBO
SFB1
I
TH2
V
PROG2
V
OSENSE2
SENSE
2
SENSE
+
2
RUN/SS2
AUXDR
PLL LPF
PLLIN
BOOST 1
TGL1
SW1
TGS1
V
IN
BG1
INTV
CC
PGND
BG2
EXTV
CC
TGS2
SW2
TGL2
BOOST 2
AUXON
AUXFB
LTC1539
D
B1
D
B2
M3
M1
C
IN1
C
IN2
C
OUT1
+
C
OUT2
R
SENSE1
R
SENSE2
C
B1
0.1
F
C
LP
0.01
F
C
C1A
1000pF
R
LP
10k
EXT
CLOCK
C
B2
0.1
F
M2
D1
L1
L2
GROUND PLANE
D2
M5
1538 F13
M6
M4
4.7
F
+
+
+
+
+
R
C1
10k
R
C2
10k
+
V
OUT1
+
V
IN
V
OUT2
1000pF
1000pF
220pF
NOT ALL PINS CONNECTED FOR CLARITY
BOLD LINES INDICATE HIGH CURRENT PATHS
INTV
CC
INT V
CC
V
IN
100k
1000pF
C
OSC
C
C1B
220pF
C
SS
0.1
F
C
C2B
470pF
C
C2A
1000pF
C
SS
0.1
F
OUTPUT DIVIDER
REQUIRED WITH
V
PROG
OPEN
100pF
22pF
10
10
56pF
26
LTC1538-AUX/LTC1539
TYPICAL APPLICATIO
N
S
U
LTC1538-AUX 5V/3A, 3.3V/3.5A, 12V/0.2A Regulator
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
BOOST1
RUN/SS1
SENSE
+
1
SENSE
1
V
PROG1
I
TH1
C
OSC
SGND
SFB1
I
TH2
V
OSENSE2
SENSE
2
SENSE
+
2
RUN/SS2
TGL1
SW1
V
IN
BG1
INTV
CC
PGND
BG2
EXTV
CC
SW2
TGL2
BOOST 2
AUXON
AUXFB
AUXDR
LTC1538-AUX
1538 TA01
100
10k
10k
CMDSH-3
0.1
F
1000pF
1000pF
4.7
F 16V
10
H
SUMIDA
CDRH125-100MC
CMDSH-3
1000pF
1000pF
100
56pF
220pF
1000pF
470pF
56pF
221k, 1%
392k, 1%
10
10
220pF
0.1
F
V
OUT1
0.1
F
0.1
F
0.1
F
+
22
F
35V
2
10
M1A
M1B
M3
M2
MBRS140T3
MBRS140T3
+
100
F
10V,
2
0.033
T1 1: 1.8
0.033
+
10
F
25V
+
100
F
10V
2
+
22
F
35V
2
+
4.7
F
47k
2N2905
R6
1M
1%
R5
90.9k
1%
V
IN
5.2V TO 28V
V
OUT1
5V/3A
GND
V
OUT2
3.3V/3.5A
V
OUT3
12V
+
1N4148
1k
1N4148
22pF
5V STANDBY
MBRS1100T3
V
IN
5.2 TO 28V: SWITCHING FREQUENCY = 200kHz
T1: DALE LPE6562-A262 GAPPED E-CORE OR BH ELECTRONICS #501-0657 GAPPED TOROID
M1A, M1B = SILICONIX Si4936DY
M2, M3 = SILICONIX Si4412DY
ALL INPUT AND OUTPUT CAPACITORS ARE AVX-TPS SERIES
27
LTC1538-AUX/LTC1539
TYPICAL APPLICATIO
N
S
U
LTC1539 High Efficiency Low Noise 5V/20mA Standby, 5V/3A, 3.3V/3.5A and 12V/200mA Regulator
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
RUN/SS1
SENSE
+
1
SENSE
1
V
PROG1
I
TH1
POR2
C
OSC
SGND
LBI
LBO
SFB1
I
TH2
V
PROG2
V
OSENSE2
SENSE
2
SENSE
+
2
RUN/SS2
AUXDR
PLL LPF
PLLIN
BOOST 1
TGL1
SW1
TGS1
V
IN
BG1
INTV
CC
PGND
BG2
EXTV
CC
TGS2
SW2
TGL2
BOOST 2
AUXON
AUXFB
LTC1539
D2
CMDSH-3
D4
CMDSH-3
D1
MBRS140T3
T1*
1: 1.8
D3
MBRS140T3
M3
M1
0.1
F
C
LP
0.01
F
C
C1
1000pF
R
LP
10k
EXT
CLOCK
0.1
F
M2
M5
1538 TA02
M6
M4
V
OUT1
4.7
F 16V
+
R
C1
10k
R
C
10k
1000pF
1000pF
INTV
CC
100k
LBO
1000pF
C
OSC
56pF
C
C1A
220pF
C
SS1
0.1
F
C
C2
1000pF
C
SS2
0.1
F
220pF
C
C2A
470pF
100pF
390k, 1%
110k, 1%
100k
POR2
D7
MBRS1100T3
R
SENSE1
0.03
+
10
F
25V
+
C
OUT2
220
F
10V
+
C
OUT1
220
F
10V
V
OUT1
5V/3A
R
SENSE2
0.03
V
OUT2
3.3V
3.5A
L2
10
H
+
C
IN2
22
F
35V
2
47k
R6
1M
1%
R5
90.9k
1%
+
4.7
F
25V
Q1
MMBT
2907
V
OUT2
12V
200mA
V
IN
6V TO 28V
*
T1 = DALE LPE6562-A262 OR BH ELECTRONICS #501-0657
M1, M2, M4, M5 = IRF7403
M3, M6 = IRLML2803
L2 = SUMIDA CDRH125-100MC
ALL INPUT CAPACITORS ARE AVX-TPS SERIES
ALL OUTPUT CAPACITORS ARE AVX-TPSV LEVEL II SERIES
+
CIN1
22
F
35V
2
5V
STANDBY
D6
1N4148
1k
D5
1N4148
10
10
100
100
28
LTC1538-AUX/LTC1539
TYPICAL APPLICATIO
N
S
U
1
2
3
5
6
7
8
9
10
11
12
13
14
15
16
17
18
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
RUN/SS1
SENSE
+
1
SENSE
1
I
TH1
POR2
C
OSC
SGND
LBI
LBO
SFB1
I
TH2
V
PROG2
V
OSENSE2
SENSE
2
SENSE
+
2
RUN/SS2
AUXDR
PLL LPF
PLLIN
BOOST 1
TGL1
SW1
TGS1
V
IN
BG1
INTV
CC
PGND
BG2
EXTV
CC
TGS2
SW2
TGL2
BOOST 2
AUXON
AUXFB
LTC1539
D2
CMDSH-3
D4
CMDSH-3
D1
MBRS140T3
T1*
9
H
1:3.74
D3
MBRS140T3
M3
M1
0.1
F
C
LP
0.01
F
C
C1
, 1000pF
R
LP
10k
EXT
CLOCK
0.1
F
M2
M5
1538 TA03
M6
M4
V
OUT1
4.7
F 16V
+
R
C1
10k
R
C
10k
1000pF
1000pF
220pF
100k
LBO
1000pF
C
OSC
56pF
C
C1A
, 220pF
C
SS1
0.1
F
C
C2
1000pF
C
SS2
0.1
F
22pF
C
C2A
470pF
100pF
390k, 1%
110k, 1%
100k
POR2
MBRS1100T3
R
SENSE1
0.025
+
3.3
F
35V
+
C
OUT2
470
F
10V
24V
+
C
OUT1
330
F
10V
V
OUT1
3.3V/4A
R
SENSE2
0.02
V
OUT2
2.5V
5A
L2
10
H
+
C
IN2
22
F
35V
2
47k
R6
1M
1%
R5
90.9k
1%
+
4.7
F
25V
MMBT2907
ALTI
V
OUT2
12V
200mA
V
IN
4V TO 28V
4
V
PROG1
100pF
110k
1%
121k
1%
OUTPUT DIVIDER
REQUIRED WITH
V
PROG
OPEN DC
10
10
100
100
0.1
F
10
+
C
IN1
22
F
35V
2
*
T1 = DALE LPE-6562-A214
M1, M2, M4, M5 = Si4412DY
M3, M6 = IRLML2803
L2 = SUMIDA CDRH127-100MC
INPUT CAPACITORS ARE AVX-TPS SERIES
OUTPUT CAPACITORS ARE AVX-TPSV LEVEL II SERIES
56pF
5V STANDBY
LTC1539 High Efficiency 5V/20mA Standby, 3.3V/2.5V Regulator with Low Noise 12V Linear Regulator
29
LTC1538-AUX/LTC1539
TYPICAL APPLICATIO
N
S
U
LTC1539 5-Output High Efficiency Low Noise 5V/3A, 3.3V/3A, 2.9V/2.6A, 12V/200mA, 5V/20mA Notebook Computer Power Supply
(See PCB LAYOUT AND FILM for Layout of Schematic)
1
2
3
5
6
7
8
9
10
11
12
13
14
15
16
17
18
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
RUN/SS1
SENSE
+
1
SENSE
1
I
TH1
POR2
C
OSC
SGND
LBI
LBO
SFB1
I
TH2
V
PROG2
V
OSENSE2
SENSE
2
SENSE
+
2
RUN/SS2
AUXDR
PLL LPF
PLLIN
BOOST 1
TGL1
SW1
TGS1
V
IN
BG1
INTV
CC
PGND
BG2
EXTV
CC
TGS2
SW2
TGL2
BOOST 2
AUXON
AUXFB
LTC1539
D2
CMDSH-3
D4
CMDSH-3
D1
MBRS140
T1*
10
H
1:1.42
D3
MBRS140
M1A
C20
0.1
F
C15
1000pF
C2
1000pF
C27, 0.1
F
M1B
M5
1538 TA04
M4
V
OUT1
C24, 4.7
F, 16V
+
R13, 10k
R15
10k
C10, 1000pF
LBO
LB1
C3
56pF
C8
220pF
C14, 0.1
F
C7,
470pF
POR2
INTV
CC
D6
CMDSH-3
R10
+
C16, C19
100
F
10V
+
C28, C29
100
F
10V
V
OUT1
5V
3A
V
OUT3
12V
120mA
V
IN
(28V MAX)
R12
0.02
1W
V
OUT2
3.3V
3A
L2
10
H
C25, C26
22
F
35V
R9
47k
R2
100
R1
27
+
C5
330
F
6.3V
+
OPTIONAL
330
F
6.3V
Q1
2N2907
V
LDO
2.9V/1A
2.6A PEAK
4
V
PROG1
R20
10
R21
10
R19, 100
R18, 100
C23, 0.1
F
R22
10
+
C1, C21
C22
22
F
35V
V
IN
5.2V TO 28V: SWITCHING FREQUENCY = 200kHz
5V/3A, 3.3V/3A, 2.9V/1A, 2.6A PEAK, LINEAR 12V/200mA
M1 = SILICONIX, Si4936DY
M4, M5 = SILICONIX, Si4412DY
M3, M6 = IRLML2803
M7 = INTERNATIONAL RECTIFIER, IRLL014
C11
0.1
F
C9
220pF
C6,
1000pF
C13, 1000pF
M7
R5
4.7k
C18, 0.01
F
+
C12
6.8nF
Q2 ZETEX
FZT849
R11
10
R7
221k
1%
R8, 316k,1%
C17, 22pF
+
C4
3.3
F
25V
D5
MMBD914L
R3
100k
1%
R4
11.3k
1%
Q1 = MOTOROLA, MMBT2907ALT1
Q2 = ZETEX, FZT849
T1 = DALE, LPE-6562-A236
L2 = SUMIDA, CDRH127-100MC
ALL INPUT AND OUTPUT CAPACITORS
ARE AVX-TPS SERIES
R12
1k
D7
MMBD914L
5V/20mA
STANDBY
5V STANDBY
(
20mA)
30
LTC1538-AUX/LTC1539
(Gerber files for this circuit board are available. Call the LTC factory.)
Copper Layer 1
Silkscreen Top
Silkscreen Bottom
Copper Layer 4
Copper Layer 3
Copper Layer 2 Ground Plane
PCB LAYOUT A D FIL
U
W
31
LTC1538-AUX/LTC1539
Dimensions in inches (millimeters) unless otherwise noted.
PACKAGE DESCRIPTIO
N
U
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
G Package
28-Lead Plastic SSOP (0.209)
(LTC DWG # 05-08-1640)
G28 SSOP 0694
0.005 0.009
(0.13 0.22)
0
8
0.022 0.037
(0.55 0.95)
0.205 0.212**
(5.20 5.38)
0.301 0.311
(7.65 7.90)
1
2 3
4
5
6 7 8
9 10 11 12
14
13
0.397 0.407*
(10.07 10.33)
25
26
22 21 20 19 18 17 16 15
23
24
27
28
0.068 0.078
(1.73 1.99)
0.002 0.008
(0.05 0.21)
0.0256
(0.65)
BSC
0.010 0.015
(0.25 0.38)
DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
*
**
GW Package
36-Lead Plastic SSOP (Wide 0.300)
(LTC DWG # 05-08-1642)
GW36 SSOP 0795
0
8
TYP
0.009 0.012
(0.231 0.305)
0.024 0.040
(0.610 1.016)
0.292 0.299**
(7.417 7.595)
45
0.010 0.016
(0.254 0.406)
0.090 0.094
(2.286 2.387)
0.005 0.012
(0.127 0.305)
0.097 0.104
(2.463 2.641)
0.031
(0.800)
TYP
0.012 0.017
(0.304 0.431)
0.602 0.612*
(15.290 15.544)
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
0.400 0.410
(10.160 10.414)
36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19
DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
*
DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
**
32
LTC1538-AUX/LTC1539
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
q
FAX
: (408) 434-0507
q
TELEX
: 499-3977
LT/GP 0896 7K PRINTED IN USA
LINEAR TECHNOLOGY CORPORATION 1996
TYPICAL APPLICATIO
N
U
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PART NUMBER
DESCRIPTION
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Shutdown Current < 30
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LTC1539
AUXDR
AUXFB
AUXON
1538 TA05
6.8nF
22pF
47k
27
100
316k
1%
221k
1%
Q1
MMBT2907ALTI
10
+
330
F
2
ZETEX
FZT849
(SURFACE MOUNT)
3.3V
5V
2.9V
3A
2.9V
ON/OFF
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